JPH0640638B2 - Synchronization method and device in spread spectrum communication - Google Patents

Description

The present invention relates to a synchronization method and a synchronization device in spread spectrum communication.

(Prior art and its problems) In the conventional synchronization method in spread spectrum communication, John Wiley & Sons
R Dixon (RC
Dixon's Spread Spectrum Systems (Sp
Delay locked loops such as those shown on pages 210 to 212 of the Read Spectrum Systems are typically used. Of course, this delay lock loop synchronization method works well if the transmission path is ideal. However, this delay lock loop uses the waveform characteristics of the signal received by correlation, and for example, considering a system that performs spread spectrum communication using a commercial power line as a transmission line,
Since the transmission line characteristics change drastically due to load characteristic fluctuations, the waveform of the signal after correlation reception also changes greatly, and there is a possibility that synchronization may be lost or an erroneous synchronization state may occur. Here, I will briefly explain the operation of the conventional delay locked loop,
State the drawbacks. A basic configuration diagram of this delay locked loop is shown in FIG. The input spread spectrum signal that has passed through the transmission line is input from the signal line 350, and the multipliers 300 and 301 take the product of the pseudo random sequence generated from the pseudo random sequence generator 306. Here, the pseudo random sequence of the signal line 351 and the signal line 352 is a sequence shifted by 2 bits. The output of each multiplier passes through the low-pass filters 302 and 303, and so-called correlated reception is performed. Here, the output of the low-pass filter, that is, the signals of the signal line 353 and the signal line 354, which are correlation reception outputs, are shown in FIGS. 4 (a) and 4 (b), respectively, if the transmission line is ideal. The waveform looks like this. Here, the horizontal axis of FIG. 4 represents time, and when the input spread spectrum signal from the signal line 350 and the generation clock of the pseudo random sequence on the receiving side from the signal lines 351 and 352 are slightly deviated,
Periodic waveforms as shown in FIGS. 4 (a) and 4 (b) are obtained on the signal lines 353 and 354 at the reciprocal period of the beat frequency. Since the signals on the signal lines 353 and 354 are subtracted by the subtractor 304, the signal on the signal line 355 has a waveform as shown in FIG. 4 (c). Therefore, for example, when the voltage controlled oscillator 305 moves so as to advance the phase when a voltage higher than the reference voltage comes and moves so as to delay the phase when the voltage is lower than the reference voltage, Fourth
The control shown by the dotted line in Figure (c) is applied, and the position of the black circle is the only stable point, and the pseudo-random sequence is synchronized. However, if there is distortion in the transmission line, the correlation output will differ greatly from the ideal state as shown in FIGS. 5 (a) and 5 (b), and as a result, the signal line 35
The control signal for the voltage controlled oscillator 5 is also as shown in FIG. 5 (c). As can be seen from FIG. 5 (c), when the control of the voltage controlled oscillator is considered as described above, there are two stable points, which are indicated by black circles and white circles in the figure. The stable point indicated by the white circle is a quasi-stable point, and it is not certain which one is stable, and there is a possibility that an erroneous synchronization state may occur. As described above, in the synchronization method using the conventional delay lock loop, it becomes impossible to secure stable synchronization in the presence of transmission line distortion. When a commercial power line is used as a transmission line, a signal is supplied to or received from the commercial power line by transformer coupling.For example, the polarity of the signal changes depending on how the outlet plug is inserted, and synchronization with the conventional delay lock loop is performed. In the method, the stable point of the loop may be lost, and there was a phenomenon that synchronization was not applied at all. As described above, it is difficult for the conventional method to establish synchronization of spread spectrum communication under a poor transmission environment such as using a commercial power line as a transmission line.

(Object of the Invention) An object of the present invention is to eliminate the drawbacks of the conventional method and to provide a synchronization method and a synchronization device that operate stably even under a poor transmission line environment such as a commercial power line. .

(Structure of the Invention) According to the present invention, in spread spectrum communication, a pseudo random sequence is generated by a clock independently generated on the receiving side, and the product of the input spread spectrum signal and the pseudo random sequence is calculated. First, the peak position of the absolute value of the output obtained by passing the signal obtained as a result of the multiplication through the low-pass filter is detected, and after the peak position is detected, the peak value detected is constant at the receiving side so that the detected peak value becomes constant. A synchronizing method and a synchronizing device in spread spectrum communication characterized by synchronizing a pseudo-random sequence by controlling the phase of a generated clock can be obtained.

(Principle of the Invention) The principle of the synchronization method of the present invention will be described with reference to the drawings. FIG. 6 shows a correlation reception waveform in which the spread spectrum signal input to the receiver is subjected to correlation reception using a pseudo random sequence locally generated by the synchronizer. Since a large peak value is obtained in the correlation reception output when the phase of the input spread spectrum signal and the phase of the pseudo-random sequence generated in the synchronizer match, this peak is detected as the first step of the synchronization operation. It is possible to detect the peak position by observing the absolute value of the correlation output level by slightly shifting the generation clock of the pseudo-random sequence generated in the synchronizer. The amount by which the phase of the generated clock is shifted corresponds to the delay amount T'as shown in FIG. 6 on the correlation output waveform. Then, as soon as the peak position is detected, the second stage of the synchronization operation is started. This is an operation for making the amount of phase shift of the generated clock of the pseudo-random sequence fine and keeping the peak position constant. As shown in Fig. 7, g (t + T) -g (t), that is, the difference between the correlation output after the phase shift and before the phase shift is calculated and binarized by positive or negative. This is a control for determining the direction of shifting the next clock phase by taking the exclusive OR with the shifted phase direction. This control will be described with reference to the truth table of FIG. Now the 7th
As shown in the figure, in the clock phase control in the phase delay direction, the correlation output moves to the left side in the figure, and in the clock phase control in the phase advance direction, the opposite is assumed. Further, the clock control in the phase delay direction is set to 1 and the clock control in the phase advance direction is set to 0, and a logical value is set to 1 when the difference value is negative and 0 when the difference value is positive. For example, when the i-th control direction is 0, that is, when the clock phase is moved in the forward direction and the difference value is 0, that is, when the difference value is positive, the exclusive OR is 0, and the next i + 1-th clock phase control The direction is 0, that is, the phase advance direction, and control is performed so as to approach the peak position. Further, when the i-th control direction is 1 and the difference is 0, it can be seen that the next clock phase control direction is 1, that is, control is performed in the phase delay direction, and control is performed to approach the peak position. As described above, according to the present method, it is possible to establish stable synchronization of the pseudo-random sequence even by the presence of transmission line distortion, by performing control to follow the peak position. Here, the phase control amount and the time interval for performing the control are determined according to the difference between the clock frequencies for generating the pseudo random sequence on the transmitting side and the receiving side. That is, the phase control amount can be reduced and the control time interval can be lengthened when the transmission / reception clock frequency difference is small, but the phase control amount must be increased and the control time interval must be shortened when the clock frequency difference is large.

(Effects of the Invention) According to the synchronization method and device of the present invention, as described above, it is possible to maintain a stable synchronization state even if distortion is present in the transmission line in spread spectrum communication. Also,
By observing the polarity of the peak value in the peak detection, it is possible to determine the positive or negative of the signal polarity. For example, a great effect can be obtained when communication is performed by spread spectrum communication using a commercial power line as a transmission medium.

(Example) Hereinafter, it demonstrates, referring to the Example which implement | achieves this invention. FIG. 1 is a block diagram showing an embodiment of a synchronizer for realizing the present invention. The spread spectrum signal input to the receiving apparatus from the signal line 150 is multiplied by the pseudo random sequence from the signal line 162 by the multiplier of 100, and the multiplication result is output to the signal line 151. The signal on the signal line 151 passes through the low-pass filter 101, and the low-frequency component is extracted and output to the signal line 152. The signal line 152 is a correlation output of the input spread spectrum signal described above. The signal on the signal line 152 passes through the full-wave rectifier circuit 102, and the negative signal component is returned to the positive line and output to the signal line 153. A peak of the signal on the signal line 153 is detected by the peak detector 103, and when the peak position is detected, a peak detection signal is output to the signal line 154. The signal on the signal line 153 is input to the difference circuit 104, and the difference between the signal in the previous phase control state and the signal in the current phase control state is calculated and converted to a logical value (for example, if the difference value is positive, For example, logic 0, and if the difference value is negative, logic 1) is output to the signal line 155 as a difference signal. In the exclusive OR gate of 105, the signal line 15
The signal of No. 5 and the signal of the signal line 157 are exclusive-ORed and output to the signal line 156. The signal on the signal line 156 is
This is a logic signal indicating the control direction of the next clock phase control. The signal on the signal line 156 is latched at each control time interval in the 106 latch circuit and output to the signal line 157. That is, the signal on the signal line 157 is a logic signal indicating the direction of the previous phase control. In the phase control circuit 107, the signal line 1
In the state where the peak is not detected by the peak detection signal from 54, the signal indicating the phase control in the constant direction on the signal line 158 and the constant amount of phase change θ ₁ on the signal line 159 are output. When a peak is detected by the peak detection signal from 154, a signal indicating the phase control direction from the signal line 156 is output to the signal line 158 and another fixed amount of phase change θ ₂ is output to the signal line 159. To do. The amount of phase change θ ₂ is smaller than θ ₁ . Reference numeral 108 denotes an oscillator that generates a clock signal having a certain frequency and uses a signal line 1
Output to 60. In the phase change circuit 109, the signal line 1
The clock signal from 06 is moved in phase according to the direction of phase change from the signal line 158 and the amount of phase change from the signal line 159, and is output to the signal line 161. A pseudo random sequence generator 110 generates a pseudo random sequence by the clock signal from the signal line 161, and outputs it to the signal line 162.

FIG. 2 is a block diagram showing an embodiment for digitally implementing the phase change circuit shown by 109 in FIG. The clock signal from the signal line 161 is 1/204
It is counted down by the N ₁ frequency division counter and output to the signal line 254. Reference numeral 203 denotes a pulse insertion / deletion circuit that gives a phase change by inserting or deleting a pulse in the input clock. Before the peak detection of the signals from the signal line 158 and the signal line 159, this circuit is operated. The signal line 158 and the signal line 15 after the peak is detected.
A pulse is inserted or deleted in accordance with the signal from 9 and output to the signal line 253. The clock signal on the signal line 253 is counted down by the 1 / N ₂ frequency dividing counter 202 and output to the signal line 252. Reference numeral 201 denotes a pulse insertion / deletion circuit that inserts or deletes a pulse in an input clock to give a phase change. Signals from the signal line 158 and the signal line 159 are the signal line 158 and the signal before the peak detection. The pulse is inserted or deleted according to the signal from the line 159 to output a signal to the signal line 251, and after the peak is detected, the circuit of 201 does not operate so that the signal from the signal line 252 passes through and is output to the signal line 251. Signal line 2
The signal of 51 is counted down by the 1 / N ₃ frequency dividing counter of 200 and output to the signal line 162. As described above, the pulse insertion / deletion circuit 201 operates before detecting the peak of the correlation output, and relatively coarse phase control is performed to detect the peak of the correlation output at high speed and After the detection, the pulse insertion / deletion circuit 203 is switched, and fine phase control is performed, so that the synchronization state can be maintained by the precise peak tracking control.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a synchronizer of the present invention, FIG. 2 is a block diagram showing an embodiment of a phase change circuit in the synchronizer of the present invention, and FIG. 3 is a delay of the prior art. Block diagram showing the basic configuration of the lock loop, Fig. 4 (a),
(b), (c) and FIG. 5 (a), (b), (c) are diagrams showing the correlation output of the delay locked loop and the waveform of the control signal of the voltage controlled oscillator, FIG. 6, FIG. FIG. 8 is a diagram showing a correlation output waveform for explaining the synchronization system of the present invention, and FIG. 8 is a diagram showing a truth table of the synchronization system of the present invention. In the figure, 100, 300, 301 ... Multiplier, 10
1,302,303 …… Low-pass filter, 102 ……
Full wave harmonic wave circuit, 103 ... Peak detector, 104 ... Difference circuit, 105 ... Exclusive OR gate, 106 ... Latch circuit, 107 ... Phase control circuit, 108 ... Oscillator, 109 ... Phase Change circuit, 110, 306 ... Pseudo random sequence generator, 200, 202, 204 ... Counter, 201, 203 ... Pulse insertion / deletion circuit, 30
4 ... Subtractor, 305 ... Voltage controlled oscillator.

Front Page Continuation (72) Inventor Kaoru Endo 1-8-17 Umeda, Kita-ku, Osaka City, Osaka Prefecture Nihon Denki Home Electronics Co., Ltd. (56) References Satoshi Tateno et al., Robert C. Dixon, "Latest spread spectrum communication method", 4th system (October 25, 1981), Japan Technology Economic Center Co., Ltd., pp. 220-225.

Claims (2)

[Claims] 1. A pseudo random sequence is generated by a clock independently generated on the receiving side, a product of an input spread spectrum signal and the pseudo random sequence is taken, and a signal obtained as a result of the product is low-passed. The absolute value of the filtered signal is taken to obtain the correlation output, and the phase at which the correlation output becomes large is searched while changing the phase of the clock at predetermined time intervals. When the phase position corresponding to the peak of the lobe is detected, thereafter, a logical value is assigned by assigning "0" or "1" depending on whether the differential signal between the current correlation output and the correlation output at the time point before the predetermined time interval is positive or negative. And a logical value obtained by assigning "0" or "1" in accordance with the control direction of the lead or lag of the signal indicating the current control direction, the next phase control direction of the clock is determined, How synchronization in spread spectrum communication, characterized by controlling the phase of independently generated in the receiving clock. 2. An oscillator for generating a clock signal having a fixed frequency, a phase changing means for changing the phase of a clock generated by the oscillator, and a pseudo-random operating with a clock signal obtained as an output of the phase changing means. Sequence generation means, multiplication means for multiplying the pseudo-random sequence generated by the pseudo-random generation means and the input spread spectrum signal, and low-pass for extracting the low-frequency component of the output of the multiplication means. A filter, a full-wave rectifying unit that takes an absolute value of the output of the low-pass filter, a peak detecting unit that detects a peak of the output of the full-wave rectifying unit, and a predetermined value for the output of the full-wave rectifying unit. The difference means for taking the difference for each time T and binarizing the difference signal and outputting the difference signal, the exclusive OR gate having the output of the difference means as one input, and the output of the exclusive OR gate. Is latched for each T and its output is the other input of the exclusive OR gate, and is constant when a signal indicating that a peak is being detected by the peak detection means is supplied. When a signal indicating that a peak has been detected by the peak detecting means is supplied to the phase varying means for each T, a phase transition of a constant amount θ _{1 in} the phase direction of the exclusive OR gate of the exclusive OR gate is supplied. And a phase control means for giving a phase shift of a constant amount θ _{2 to} the phase varying means for each T in the phase direction determined by the output, and θ ₂ is smaller than θ _{1 in the} spread spectrum communication. .