RU2248097C2 - Method for transmitting information - Google Patents

Abstract

FIELD: electronic engineering.

SUBSTANCE: method involves applying two-channel transmitter having unit for building masking signals, the third adder unit, the third multiplier, the fourth adder unit, pseudo-random sequence generator and low frequency filter. Receiver unit has the third multiplier, synchronization unit, pseudo-random sequence generator with decoder connected to it, the first and the second delay units, controlled clock pulse oscillator, key unit and the second adder unit. Pilot signal is formed as complex signal built from four sinusoid oscillations. Each pair of the oscillations is phase-manipulated with its pseudo-random sequence.

EFFECT: data transmission protection against reconnaissance.

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Description

The present invention relates to the field of radio engineering and can be used to protect information transmitted over radio channels.

There is a known information transmission system (E.V. Kalyanov. Information transmission using encoding of masking chaotic oscillations. - Radio engineering and Electronics, 2002, v. 47, No. 4, Fig. 1, p. 469), in which the masking of the transmitted message is as follows way: the sum of the message and noise is transmitted on one channel, and only noise on the other. In the receiver at the output of the subtractor, a message is allocated without noise. However, this system does not provide measures to prevent demodulation of the radio signal, i.e. masking is carried out only at the level of modulating signals.

Closest to the proposed information transmission system is a two-channel system with quadrature modulation (Franks L. Theory of signals. Translation from English under the editorship of D.E. Wackman. - M .: Sov. Radio, 1974, Fig. 4.12), adopted for prototype. In this system, for the separation of the quadrature components of the radio signal during demodulation, it is necessary to have a reference sinusoidal oscillation, coherent with the carrier oscillation. To receive it in the case of analog modulating signals, the transmitter must emit a pilot signal, usually in the form of the carrier itself, but with less power. (N.I. Chistyakov, V. M. Sidorov. Radio receivers. Textbook for high schools. - M .: Communication, 1974, p. 362).

Functional diagram of the information transmission system adopted for the prototype, taking into account the formation of the pilot signal is presented in figure 1.

On the functional diagram of the transmitter of the system (figa) is indicated:

1 - message generation unit;

1 ¹ , 1 ² - the first and second bandpass low-pass filters (low-pass filters);

2 ¹ , 2 ² - the first and second attenuators;

3 ¹ , 3 ² - the first and second adders;

4 ¹ , 4 ² - the first and second multipliers;

5 - phase shifter 90 °;

6 - carrier frequency generator f ₀ .

On the functional diagram of the receiver of the system (figb) is indicated:

7 - phase locked loop (PLL);

8 - phase shifter 90 °;

9 - adder;

10 ¹ , 10 ² - the first and second multipliers;

11 ¹ , 11 ² - the first and second band pass low-pass filters.

The prototype information transmission system consists of a transmitter and a receiver. The transmitter consists of two quadrature channels, the first of which (in-phase) contains in series the first pass-band low-pass filter 1 ¹ , the first attenuator 2 ¹ , the first adder 3 ¹ , the first multiplier 4 ¹ , the output of which is connected to the first input of the second adder 3 ² , the output which is the output of the transmitter. The second quadrature channel contains serially connected the second bandpass low-pass filter 1 ² and the second multiplier 4 ² , the output of which is connected to the second input of the second adder 3 ² . In addition, the inputs of the first 1 ¹ and second 1 ² band pass LPFs are the first and second inputs of the transmitter, and the output of the second band pass LPF 1 ^{2 is} connected to the second input of the first adder 3 ¹ . The output of the carrier frequency generator 6 is connected through the second attenuator 2 ² to the third input of the second adder 3 ² , and also to the second input of the first multiplier 4 ¹ and, through the phase shifter 90 ° 5, with the second input of the second multiplier 4 ² .

The prototype receiver contains two quadrature channels, the first of which consists of a series-connected first multiplier 10 ¹ and a first bandpass low-pass filter 11 ¹ , the output of which is the first output of the receiver and connected to the first input of the adder 9, the output of which is the third output of the receiver. The second quadrature channel contains a second multiplier 10 ² and a second bandpass low-pass filter 11 ² connected in series, the output of which is the second output of the receiver and connected to the second input of the adder 9. In addition, the first inputs of the first 10 ¹ and second 10 ² multipliers and the input of the PLL 7 are combined and are the input of the receiver, and the output of the PLL 7 is connected to the second input of the first multiplier 10 ¹ and, through the phase shifter 90 ° 8, with the second input of the second multiplier 10 ² .

The prototype system works as follows. In the message generation unit I of the transmitter, modulating signals ζ ₁ and ζ ₂ are generated from messages η ₁ and η ₂ . In the particular case, η ₁ is speech, and η ₂ is masking noise.

Both messages η ₁ and η _{2 are} filtered by bandpass low-pass filters 1 ¹ and 1 ² , which can have a standard frequency band of 300 Hz -3400 Hz.

The attenuator 2 ¹ serves to attenuate the level of the speech signal η ₁ relative to the level of masking noise η _2.

The modulating signal in the first quadrature channel of the transmitter is formed according to the formula

ζ ₁ = Kη $\genfrac{}{}{0ex}{}{\text{F}}{\text{one}}$ + η $\genfrac{}{}{0ex}{}{\text{<figure-callout id="2" label="F" filenames="00000011.png,00000012.png" state="{{state}}">F</figure-callout>}}{\text{2}}$ , (1)

and in the second quadrature channel

ζ ₂ = η $\genfrac{}{}{0ex}{}{\text{<figure-callout id="2" label="F" filenames="00000011.png,00000012.png" state="{{state}}">F</figure-callout>}}{\text{2}}$ , (2)

where η $\genfrac{}{}{0ex}{}{\text{F}}{\text{one}}$ , η $\genfrac{}{}{0ex}{}{\text{F}}{\text{2}}$ - filtered signals η ₁ and η ₂ ;

K is the attenuator attenuation coefficient.

Thus, the signal ζ ₁ is quasi-noise, and the signal ζ ₂ is noise. The generator 6 generates a sinusoidal carrier oscillation with a frequency f ₀ . Part of this oscillation after attenuation in attenuator 2 ² as a pilot signal is summed in adder 3 ² with information quadrature components formed in multipliers 4 ¹ and 4 ² . The total signal from the output of block 3 ² is broadcast.

In the receiver (figb), the pilot signal is filtered by the PLL 7 and in the form of a reference oscillation is supplied to the multiplier 10 ¹ and, through the phase shifter 90 ° 8, to the multiplier 10 ² . After filtration, the outputs of bandpass LPF January ¹¹ and 11 are formed by ^two posts ζ ₁ and ζ ₂ .Polosy pass filters ¹¹ January ² and 11 are the same as the filter 1 ¹ and 1 ² at the transmitter. At the output of the adder 9, which plays the role of a subtracting device, a clear speech signal is allocated, because

ζ ₁ -ζ ₂ = Kη $\genfrac{}{}{0ex}{}{\text{F}}{\text{one}}$ . (3)

Separately, the signals ζ ₁ and ζ _{2 are} tapped as noise.

The system also allows you to transmit two independent speech signals η ₁ and η ₂ (without summing them in block 3 ¹ ), which in the receiver will be allocated in the form of messages ζ ₁ and ζ ₂ .

The disadvantage of the prototype system, due to the use of a sinusoidal pilot signal, is the ability to demodulate (highlight) messages ζ ₁ , ζ ₂ and (ζ ₁ -ζ ₂ ) by any receiver similar to the receiver of the system, i.e. the possibility of unauthorized access to transmitted messages.

The problem solved by the invention is to increase the reconnaissance of the carrier signal by complicating and classifying the structure of the pilot signal, which eliminates the possibility of demodulation of messages without knowledge of the law of the formation of the pilot signal.

To solve this problem, the information transmission system, consisting of a transmitter and a receiver, includes two quadrature channels, the first quadrature channel contains the first pass-band low-pass filter, the first attenuator, the first adder, the first multiplier, the output of which is connected to the first input of the second adder the output of which is the output of the transmitter, the second quadrature channel contains a second bandpass low-pass filter and a second multiplier connected in series with the second input house of the second adder, while the inputs of the first and second bandpass low-pass filters are the first and second inputs of the transmitter, and the output of the second bandpass low-pass filter is connected to the second input of the first adder, the output of the carrier frequency generator is connected to the second input of the first multiplier and, through the phase shifter, 90 °, the second input of the second multiplier, the output of the second attenuator is connected to the third input of the second adder, the receiver includes two quadrature channels, the first of which contains the first multiply connected in series l and the first bandpass low-pass filter, the output of which is the first output of the receiver and connected to the first input of the first adder, the output of which is the third output of the receiver, the second quadrature channel contains a second multiplier and a second bandpass low-pass filter, the output of which is the second output of the receiver and connected to the second the input of the first adder, in addition, the first inputs of the first and second multipliers are combined and are the input of the receiver, the first output of the PLL is connected to the second input of the first resident and, through the 90 ° phase shifter, with the second input of the second multiplier, according to the invention, a masking signal generating unit (BFMS), a third adder connected in series, a third multiplier, a fourth adder, a pseudo-random sequence generator (PSP) and a low-pass filter are connected in series to the transmitter frequencies, and the output of the carrier frequency generator is connected to the first inputs of the third adder and the BFMS, the second input of which is connected to the output of the phase shifter 90 °. The first and second outputs of the BFMS are connected to the second inputs of the third and fourth adders, the third output of the BFMS is connected to the input of the PSP generator, the output of the low-pass filter is connected to the second input of the third multiplier, and the output of the fourth adder is connected to the input of the second attenuator. A third multiplier, a synchronization unit, a PSP generator with a decoder connected to it, a first delay element, as well as a series-controlled controlled clock generator (UGTI), a second delay element, a key block and a second adder, the first input of the third multiplier and the third, are introduced into the receiver the input of the synchronization unit is connected to the input of the receiver, the output of the third multiplier is connected to the input of the PLL, the first output of which is connected to the fourth input of the synchronization unit, the output of which is connected to the input ohm UGTI whose output is connected to a second input of the second adder, the output of which is connected to the clock input of the generator cap, whose output is connected to a first input of the synchronization unit and, via a first delay element to the second inputs of the multiplier and the third sync block. In addition, the decoder output is connected to the second input of the key block, the third input of which is connected to the second output of the PLL.

Graphic materials presented in the application:

Figure 1. Functional diagram of the prototype system:

a) prototype transmitter;

b) the prototype receiver.

Figure 2. Functional diagram of the proposed information transfer system:

a) transmitter;

b) the receiver.

Figure 3. The shape of the total pilot signal.

Figure 4. Spectrum of the total pilot signal.

Figure 5. The spectrum of the output signal of the transmitter.

6. Masked pilot waveform.

7. Spectrum of masking pilot.

Fig. 8. The spectrum of the pilot signal after removing the first SRP.

Fig.9. Functional diagram of the masking signal generation block.

Figure 10. Functional diagram of the phase locked loop.

11. Functional diagram of the synchronization unit.

Fig. 12. Functional diagram of the key block.

Functional diagram of the proposed information transfer system is presented in figure 2.

On the functional diagram of the transmitter of the system (figa) is indicated:

I - message generation unit;

II - block secret pilot;

1 ¹ , 1 ² - the first and second bandpass low-pass filters (low-pass filters);

2 ¹ , 2 ² - the first and second attenuators;

3 ¹ , 3 ² , 3 ³ , 3 ⁴ - first, second, third, fourth adders;

4 ¹ , 4 ² , 4 ³ - the first, second, third multipliers;

5 - phase shifter 90 °;

6 - carrier frequency generator f ₀ ;

7 - block generating masking signals (BFMS);

8 - low pass filter;

9 - pseudo-random sequence generator (PSP).

On the functional diagram of the receiver of the system (figb) is indicated:

10 ¹ , 10 ² , 10 ³ - the first, second, third multipliers;

11 ¹ , 11 ² - the first and second band pass low-pass filters;

12 ¹ , 12 ² - the first and second delay elements;

13 - generator PSP;

14 - decoder;

15 - phase locked loop (PLL);

16 - synchronization unit;

17 - key block;

18 ¹ , 18 ² - the first and second adders;

19 - controlled clock generator (UGTI);

20 - phase shifter 90 °.

The proposed information transmission system consists of a transmitter and a receiver. The transmitter includes two quadrature channels, the first of which contains the first pass-band low-pass filter 1 ¹ , the first attenuator 2 ¹ , the first adder 3 ¹ , the first multiplier 4 ¹ , the output of which is connected to the first input of the second adder 3 ² , the output of which is the output the transmitter. The second quadrature channel contains serially connected the second bandpass low-pass filter 1 ² and the second multiplier 4 ² , the output of which is connected to the second input of the second adder 3 ² . The inputs of the first 1 ¹ and second 1 ² bandpass low-pass filters are the first and second inputs of the transmitter, and the output of the second strip low-pass filter 1 ^{2 is} connected to the second input of the first adder 3 ¹ . The block of classified pilot signal II contains BFMS 7, a third adder 3 ³ , a third multiplier 4 ³ , a fourth adder 3 ⁴ and a second attenuator 2 ² connected in series, the output of which is connected to the third input of the second adder 3 ² , and also a PSP 9 generator connected in series and a low-pass filter 8, the output of which is connected to the second input of the third multiplier 4 ³ . In addition, the output of the carrier frequency generator 6 is connected to the first inputs of the third adder 3 ³ and BFMS 7, with the second input of the first multiplier 4 ¹ and the input of the phase shifter 90 ° 5, the output of which is connected to the second inputs of the second multiplier 4 ² and BFMS 7, the first and the second outputs of which are connected to the second inputs of the third 3 ³ and fourth 3 ⁴ adders. The third output of the BFMS 7 is connected to the input of the generator PSP 9.

The receiver consists of two quadrature channels, the first of which contains the first multiplier 10 ¹ and the first band pass low-pass filter 11 ¹ , the output of which is the first output of the receiver and connected to the first input of the first adder 18 ¹ , the output of which is the third output of the receiver, and connected in series to the second multiplier 10 ² and the second band pass low-pass filter 11 ² , the output of which is the second output of the receiver and connected to the second input of the first adder 18 ¹ . In addition, the receiver contains a third multiplier 10 ³ and a PLL 15 connected in series, the first output of which is connected to the second input of the first multiplier 10 ¹ and, through the phase shifter 90 ° 20, with the second input of the second multiplier 10 ² . The first inputs of the first 10 ¹ , second 10 ² , third 10 ³ multipliers and the third input of the synchronization block 16 are combined and are the input of the receiver, which also includes the generator PSP 13 with a decoder 14 connected to it and the first delay element 12 ¹ , the output of which is connected with the second inputs of the third multiplier 10 ³ and the synchronization unit 16, the first input of which is connected to the output of the generator PSP 13 and the input of the first delay element 12 ¹ . In addition, series-connected UGTI 19, the second delay element 12 ² , the key block 17 and the second adder 18 ² , the output of which is connected to the clock input of the PSP generator 13. The first output of the PLL 15 is connected to the fourth input of the synchronization block 16, the output of which is connected to input UGTI 19, the output of which is connected to the second input of the second adder 18 ² . The output of the decoder 14 is connected to the second input of the key block 17, the third input of which is connected to the second output of the PLL 15.

The proposed information transfer system operates as follows.

In the transmitter (figa), the formation of information quadrature components occurs in the same way as in the prototype transmitter (figa). The difference lies in the classification of the pilot signal (carrier frequency f ₀ ), which is carried out in block II. As a result of security, a sinusoidal signal with a frequency of f _{0 is} converted into a complex amplitude-modulated - phase-shifted - frequency-modulated oscillation (figure 3), the spectrum of which does not contain a discrete line at a frequency f ₀ (figure 4). The generated pilot signal is transmitted in the frequency band f ₀ ± 300 Hz (figure 5), not occupied by the information signal.

For classification, a sinusoidal signal with a frequency f ₀ from the output of the generator 6 and three sinusoidal signals with frequencies f ₀ + F ₁ , f ₀ + F ₂ and f ₀ + F ₃ formed in the BFSM 7 block are used:

F ₁ <F ₂ <F ₃ , F ₁ = F ₃ -F ₂ (4)

At the output of the adder 3 ³ a beat signal is generated with the useful component f ₀ according to the formula

The masking signal at the second output of the BFMS 7 is a beating signal obtained by the formula

phase-manipulated second PSP, also developed in BFMS 7 (Fig.6). Its spectrum is presented in Fig.7.

A useful signal is generated at the output of multiplier 4 ³ by phase manipulation of the beat signal (5) with the first pseudorandom sequence generated by the PSP 9 generator. To limit the spectrum of phase-shifted signals, the first PSP is filtered by a low-pass filter 8, and the second by a similar filter in the BFMS 7.

The resulting pilot signal is generated by summing in the adder 3 ⁴ phase modulated by different SRP beats signals (5) and (6), attenuator 2 ² attenuates, it is added in the adder 3 ² with information quadrature components formed in multipliers 4 ¹ and 4 ² , and is being broadcast.

In the receiver (fig.2b) after restoration of the carrier frequency f ₀ from the pilot signal, the demodulation of the transmitted messages is carried out in the same way as in the receiver prototype (fig.1b).

The restoration of the carrier frequency f ₀ is as follows. In the multiplier 10 ^3, phase manipulation is removed from the useful signal, as a result of which the beat signal is restored (5). The spectrum of this pilot signal is shown in Fig. 8 by two discrete lines with frequencies f ₀ and f ₀ + F ₁ . A sinusoidal signal with frequency f ₀ is allocated by the PLL 15 and supplied as a reference oscillation to the multiplier 10 ¹ and, through the phase shifter 90 ° 20, to the multiplier 10 ² . The search for a useful phase-manipulated signal by the delay is carried out by blocks 15, 17, 18 ² , 12 ² and 14. The shift of the reference SRP generated by the generator 13 occurs due to the insertion of an additional pulse from the output of the delay element 12 ² into the sequence of clock pulses generated by UGTI 19. Insert occurs by a signal from the decoder 14, through which the key block 17 passes an additional pulse from the output of the delay element 12 ² to the first input of the adder 18 ² . The search takes place until the reference SRP does not coincide in time with the manipulating one. When they coincide, the PLL 15 generates a signal to stop the search, which from the second output enters the key block 17 and locks it. After stopping the search, the receiver enters the delay tracking mode. The synchronization unit 16 performs the function of a discriminator that controls the UGTI 19.

The block for the formation of masking signals (BFMS) 7 (Fig.2A) can be performed according to the scheme shown in Fig.9, where it is indicated:

7.1 ¹ , 7.1 ² , 7.1 ³ - low-frequency generators;

7.2 ¹ ... 7.2 ⁷ - multipliers;

7.3 ¹ , 7.3 ² , 7.3 ³ - phase shifters 90 °;

7.4 ¹ , 7.4 ² - adders;

7.5 ¹ , 7.5 ² - formers of clock pulses;

7.6 - PSP generator;

7.7 - low pass filter.

Block 7 contains multipliers 7.2 ¹ , 7.2 ² , 7.2 ³ , the first inputs of which are combined and are the first input of the BFMS 7, as well as multipliers 7.2 ⁴ , 7.2 ⁵ , 7.2 ⁶ , the first inputs of which are combined and are the second input of the BFMS 7. Outputs of low-frequency generators 7.1 ¹ , 7.1 ² , 7.1 ^{3 are} connected to the second inputs of the multipliers 7.2 ¹ , 7.2 ² , 7.2 ^3, respectively, and through phase shifters 90 ° 7.3 ¹ , 7.3 ² , 7.3 ³ , with the second inputs of the multipliers 7.2 ⁴ , 7.2 ⁵ , 7.2 ⁶ respectively. The outputs of the multipliers 7.2 ¹ and 7.2 ^{4 are} connected to the first and second inputs of the adder 7.4 ¹ , the output of which is the first output of the BFMS 7. The outputs of the multipliers 7.2 ² and 7.2 ^{5 are} connected to the first and second inputs of the adder 7.4 ² , the third and fourth inputs of which are connected to the outputs multipliers 7.2 ³ and 7.2 ⁶ respectively. The output of the adder 7.4 ^{2 is} connected to the first input of the multiplier 7.2 ⁷ , the output of which is the second output of the BFMS 7. In addition, the output of the low-frequency oscillator 7.1 ^{3 is} connected to the input of the pulse shaper 7.5 ² , the output of which is through the series-connected oscillator PSP 7.6 and the low-pass filter 7.7 connected to the second input of the multiplier 7.2 ⁷ . The output of the phase shifter by 90 ° 7.3 ^{2 is} connected to the input of the pulse shaper 7.5 ¹ , the output of which is the third output of the BFMS 7.

The unit for the formation of masking signals 7 as follows.

The formation of frequencies f ₀ + F _i , where i = 1, 2, 3, is carried out according to the formula

Sin [2π (f ₀ + F _i ) t] = Sin2π f ₀ t Cos2π F _i t + Cos2π f ₀ t Sin2π F _i t. (7)

The formation of clock pulses blocks 7.5 ¹ and 7.5 ² comes from limited in amplitude sinusoidal oscillations with frequencies F ₂ and F ₃ . The second SRP is generated by the generator 7.6 and filtered by a low-pass filter 7.7. The phase-manipulating masking signal is generated at the output of the multiplier 7.2 ⁷ .

Block phase-locked loop (PLL) 15 (Fig.2B) can be performed according to the scheme shown in Fig.10, where it is indicated:

15.1 ¹ , 15.1 ² - multipliers;

15.2 - integrator;

15.3 - threshold device;

15.4 - loop filter;

15.5 - controlled generator;

15.6 - phase shifter 90 °.

The PLL 15 contains a series-connected multiplier 15.1 ¹ , a loop filter 15.4, a controlled oscillator 15.5 and a 90 ° 15.6 phase shifter, the output of which is the first output of the block 15. The first inputs of the multipliers 15.1 ¹ and 15.1 ^{2 are} combined and are the input of the PLL 15, and the output of the controlled generator 15.5 is connected to the second input of the multiplier 15.1 ¹ . The phase shifter output by 90 ° 15.6 is connected to the second input of the multiplier 15.1 ² , the output of which through the integrator 15.2 is connected to the first input of the threshold device 15.3, the output of which is the second output of the PLL 15. The second input of the block 15.3 is the threshold voltage input.

The PLL unit operates as follows.

Serially connected blocks 15.1 ¹ , 15.4, 15.5, and 15.6 represent a typical PLL (Tuzov G.I. Isolation and processing of information in Doppler systems. M: Soviet Radio, 1967, Fig. 3.1, p. 79).

When the frequency f _{0 is} captured, a constant component is formed at the output of the multiplier 15.1 ² , upon accumulation of which by the integrator 15.2 the threshold is exceeded in the threshold device 15.3, as a result of which a search termination signal is generated at the second output of the PLL 15.

The synchronization unit 16 (figb) can be implemented according to the circuit shown in Fig.11, where it is indicated:

16.1 ¹ , 16.1 ² , 16.1 ³ - multipliers;

16.2 - delay element;

16.3 - block subtraction;

16.4 - the integrator.

The synchronization block 16 contains a multiplier 16.1 ¹ , the first and second inputs of which are the third and fourth inputs of the synchronization block. The output of the multiplier 16.1 ^{1 is} connected to the first inputs of the multipliers 16.1 ² and 16.1 ³ , the outputs of which are connected to the first and second inputs of the subtraction block 16.3, respectively. The output of the subtraction block 16.3 through the integrator 16.4 is connected to the output of the synchronization block 16. In addition, the second input of the multiplier 16.1 ² is the first input of the synchronization block 16, the second input of which is the input of the delay element 16.2, the output of which is connected to the second input of the multiplier 16.1 ³ .

The synchronization unit 16 operates as follows.

In the multiplier 16.1 ¹ is the synchronous detection of the signal with a frequency f ₀ . The second inputs of the multipliers 16.1 ² and 16.1 ³ receive shifted relative to each other copies of the first SRP. Blocks 16.1 ² , 16.1 ³ , 16.2, 16.3 and 16.4 form a discriminator, at the output of which a delay mismatch signal is generated.

The key block 17 (Fig.2b) can be performed according to the scheme shown in Fig.12.

The key block 17 contains the first and second logical elements AND, as well as the logical element NOT. Moreover, the first input of the key block is the input of the element NOT, the output of which is connected to the first input of the first element And, the second input of which is the second input of the key block 17. The output of the first element And is connected to the first input of the second element And, the second input of which is the third input of the block keys 17, the output of which is the output of the second element I.

The key block 17 works as follows.

When a positive signal to stop the search appears at the first input of block 17, the second AND element is blocked and the receipt of additional clock pulses from the third input of block 17 is stopped.

Claims (1)

An information transmission system consisting of a transmitter and a receiver, the transmitter includes two quadrature channels, the first of which contains a first-pass low-pass filter in series, a first attenuator, a first adder, a first multiplier, the output of which is connected to the first input of the second adder, the output of which is the transmitter output, the second quadrature channel contains a second low-pass filter and a second multiplier connected in series with the second input the second adder, while the inputs of the first and second low pass bandpass filters are the first and second inputs of the transmitter, and the output of the second lowpass bandpass filter is connected to the second input of the first adder, the output of the carrier frequency generator is connected to the second input of the first multiplier and, through the phase shifter to 90 °, with the second input of the second multiplier, the output of the second attenuator is connected to the third input of the second adder, the receiver includes two quadrature channels, the first of which contains the first multiplier and the first low pass bandpass filter, the output of which is the first output of the receiver and connected to the first input of the first adder, the output of which is the third output of the receiver, the second quadrature channel contains the second multiplier and the second lowpass bandpass filter, the output of which is the second output of the receiver and connected to the second input of the first adder, in addition, the first inputs of the first and second multipliers are combined and are the input for receiver, the first output of the phase-locked loop is connected to the second input of the first multiplier and, through a 90 ° phase shifter, to the second input of the second multiplier, characterized in that the masking signal generation unit (BFMS) is introduced into the transmitter, the third adder, the third multiplier connected in series , a fourth adder, a pseudo-random sequence generator and a low-pass filter connected in series, the output of the carrier frequency generator being connected to the first inputs of the third adder and a masking signal generating unit, the second input of which is connected to the phase shifter output by 90 °, the first and second outputs of the masking signal forming unit are connected to the second inputs of the third and fourth adders, the third output of the masking signal generating unit is connected to the input of the pseudo-random sequence generator, low-pass filter output connected to the second input of the third multiplier, and the output of the fourth adder connected to the input of the second attenuator, the third multiplier is introduced into the receiver, bl to synchronization, a pseudo-random sequence generator with a decoder connected to it, a first delay element, as well as a controllable clock generator, a second delay element, a key block and a second adder, the first input of the third multiplier and the third input of the synchronization block connected to the input of the receiver, the output of the third multiplier is connected to the input of the phase-locked loop, the first output of which is connected to the fourth input of the synchronization block, the output of which is connected inen with an input of a controlled clock generator, the output of which is connected to the second input of the second adder, the output of which is connected to the clock input of a pseudo-random sequence generator, the output of which is connected to the first input of the synchronization block and, through the first delay element, with the second inputs of the third multiplier and synchronization block in addition, the decoder output is connected to the second input of the key block, the third input of which is connected to the second output of the phase-locked loop, while the whose signal passes an additional pulse from the output of the second delay element to the signal from the decoder and stops receiving additional pulses when there is a signal at the first input, and the masking signal generating unit contains the first, second, and third multipliers, the first inputs of which are combined and are the first input of the BFMS, the fourth, fifth and sixth multipliers; the first inputs of which are combined and are the second input of the BFMS, the outputs of the first, second, and third low-frequency generators are connected to the second inputs of the first, second, and third multipliers, respectively, and the outputs of these generators are connected to the second inputs of the fourth, fifth, and sixth multipliers through the first, second, and third 90 ° phase shifters, the outputs of the first and fourth multipliers are connected to the first and second inputs of the first adder, respectively, the output of which is the first output of the BFMS, the outputs of the second and fifth multipliers are connected to the first and second inputs of the second adder, the third and fourth inputs of which are connected to the outputs of the third and sixth multipliers, respectively, the output of the second adder is connected to the first input of the seventh multiplier, the output of which is the second output of the BFMS, the output of the third low-frequency generator is connected to the input of the second shaper clock pulses, the output of which through a series-connected PSP generator and a low-pass filter is connected to the second input of the seventh multiplier, the output is W cerned ° phase shifter 90 is connected to the input of the first clock pulse generator whose output is a third output BFMS.

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