JPH0640122B2 - Semiconductor integrated circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to semiconductor integrated circuit technology and further to theoretical LSI.
The present invention relates to a technique particularly effective when applied to the configuration of (large-scale integrated circuit), for example, a technique effectively used when it is desired to give a logic LSI having an analog circuit therein a function that facilitates testing.

[Background Art] A logic L having a basic configuration of a combination of logic gate circuits.
In SI, a testing (functional test) is performed to inspect whether the LSI has reached a desired quality level. In that case, conventionally, a device called an LSI tester inserts a test pattern composed of appropriate binary data into each input pin of the LSI. Then, the output at that time is monitored and evaluated to diagnose which logic gate circuit has a failure.

However, the number of gates and the number of input / output pins of the logic LSI to be tested tend to increase in recent years, and the larger the number of gates, the larger the amount of test patterns required. Therefore, it becomes difficult to create such a complicated and large amount of test patterns, and the time required to create and test the test patterns becomes long.
As a result, if the integration scale of the LSI increases, the logic circuit cannot be fully diagnosed.

Therefore, there has been proposed an invention relating to a logic LSI in which a test circuit is provided inside the chip and the generation of a test pattern and the function check can be automatically performed (Japanese Patent Publication No. 58-166275).

By the way, as the scale of integration of LSI increases, logic L
By providing an analog circuit in the SI chip, it is expected that an LSI will be developed in which a digital logic circuit and an analog circuit coexist on the same chip.

However, conventionally, an analog tester for applying an analog signal to an LSI has been used for testing an analog circuit (LSI), and an LSI tester capable of testing both a logic LSI and an analog IC has not been developed. Further, no invention has been proposed regarding a test circuit in an LSI in which a digital circuit and an analog circuit coexist.

Therefore, when a logic LSI with a built-in analog circuit is developed, in order to test the LSI using an existing tester, both the logic LSI tester and the analog IC tester pass through the LSI through the digital circuit section and the analog circuit section. And must be tested separately. However, this makes the test very tedious and increases the time required for the test.

[Object of the Invention] An object of the present invention is to provide a semiconductor integrated circuit technology capable of facilitating the testing of an LSI in which an analog circuit and a digital circuit coexist and shortening the test time.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[Outline of Invention] The outline of a typical invention disclosed in the present application will be described below.

That is, L in which analog circuits and digital circuits coexist
In the case of SI, it is considered that the scale will be tens of thousands of gates or more. Therefore, paying attention to the fact that the test circuit is allowed to bear a considerable amount of hardware, the D / A The conversion circuit and the A / D conversion circuit are arranged on the chip, and when testing, the test D / A conversion circuit and the A / D conversion circuit are inserted before and after the analog circuit to form a digital interface. Thus, it is possible to test a digital / analog coexistent LSI with only a logic LSI tester, thereby facilitating the testing of the digital / analog coexistent LSI and achieving the above-described object of shortening the test time. It is a thing.

Hereinafter, the present invention will be described in detail with examples.

[Embodiment] FIG. 1 shows a first embodiment of the present invention.

In the figure, 1 is a digital circuit 2 and an analog circuit 3.
Is an LSI (Large Scale Integrated Circuit) formed on a single semiconductor chip such as a single crystal silicon substrate. This embodiment shows an LSI having an analog input and no analog output, and 5 is an analog input terminal for the analog circuit 3. Further, 6 and 7 are digital input terminals for the digital circuit 2, and 8 and 9 are digital output terminals for the digital circuit 2.

In this embodiment, a D / A conversion circuit 4 as a test circuit is formed on the same semiconductor chip together with the digital circuit 2 and the analog circuit 3. 1
Reference numeral 0 is a digital input terminal for the D / A conversion circuit 4, and 11 is an analog output terminal of the D / A conversion circuit 4.

In the LSI of this embodiment, the analog output terminal 11 of the D / A conversion circuit 4 and the analog input terminal 5 of the analog circuit 3 are connected at the time of the test, as indicated by a broken line A in the figure. Then, an appropriate digital signal is applied to the digital input terminal 10 of the D / A conversion circuit 4.
Then, an analog signal formed by D / A converting the digital signal by the D / A conversion circuit 4 inside the chip is output from the analog output terminal 11, and this is output from the analog input terminal 5 to the analog circuit 3 inside the chip. It will be entered.

Therefore, according to this embodiment, it is not necessary to directly apply the analog test signal to the analog output terminal 11 by the LSI tester. As a result, even in an LSI in which an analog circuit and a digital circuit coexist, a test can be performed only by a digital LSI (logical LSI) tester.

The test D / A conversion circuit 4 is not required to be a highly accurate circuit as long as it can form a test analog signal based on a digital signal. Therefore, since a very simple D / A conversion circuit can be used, even if the D / A conversion circuit is provided only for the purpose of testing, the chip size is not increased so much.

[Second Embodiment] FIG. 2 shows a second embodiment of the present invention.

This embodiment is a modification of the first embodiment, and instead of directly applying the digital input signal to the D / A conversion circuit 4 provided as the test circuit to the terminal 10 by the tester, the digital circuit is used. D / indirectly via 2
A digital signal for generating a test analog signal is supplied to the A conversion circuit 4.

That is, in this embodiment, when the LSI is tested, the analog output terminal 11 of the D / A conversion circuit 4 and the analog input terminal 5 to the analog circuit 3 are connected as shown by a broken line A, and the D / A A predetermined test pattern that causes a digital signal for generating an analog signal of a desired level in the conversion circuit 4 to be supplied from the digital circuit 2 to the D / A conversion circuit 4 is input terminals 6 and 7 of the digital circuit 2. I'll put it in. Then, the D / A conversion circuit 4
At, the test analog signal is automatically formed and input to the analog circuit 3 via the terminals 11 and 5.
Therefore, it is possible to test the digital circuit 2 and the analog circuit 3 using only the digital LSI tester.

In this embodiment, in the case where the input terminals 6 and 7 are shared by the test signal and the normal input signal, the signal applied to the input terminals 6 and 7 of the digital circuit 2 is the normal LSI signal. In some cases, it may be desired to distinguish between the signal applied by the operation and the test signal. In that case, for example, a test mode switching circuit or a terminal for receiving a mode switching signal may be provided to distinguish the test signal from a normal input signal. Also, in such a case, the digital circuit 2 to the D / A conversion circuit 4 are used except during the analog circuit test.
It is also possible to prevent signals from being input to the D / A converter circuit 4 or to prevent the D / A conversion circuit 4 from operating except during the analog circuit test.

[Embodiment 3] FIG. 3 shows a third embodiment of the present invention.

The LSI to which this embodiment is applied is a digital / analog coexisting LSI having an analog output as well as an analog input.

In the figure, 3 is an analog circuit on the input side connected to the analog input terminal 5, and 13 is an analog circuit on the output side connected to the analog output terminal 12.

In this embodiment, in addition to the D / A conversion circuit 4 for testing,
A test A / D conversion circuit 14 and its output terminal 15 are provided. The method of forming the test analog signal for the analog circuit 3 by the test D / A conversion circuit 4 is the same as the method shown in the second embodiment. However, the method of the first embodiment can be adopted for this portion.

When testing the analog circuit 13, the output of the analog circuit 13 is put into the test A / D conversion circuit 14, and the A / D converted output is taken out from the terminal 15 and observed by the LSI tester. A pass / fail judgment is made.

Also in this embodiment, a test mode switching circuit or a mode switching signal input terminal is further provided, and the output signal of the analog circuit 13 is output from the output terminal 12 to the test A / A circuit.
It may be switched to the D conversion circuit 14, or the A / D conversion circuit 14 may be operated only during the test.

In this embodiment, the test output terminal 15 connected to the A / D conversion circuit 14 has the digital circuit 2
It is also possible to share it with the digital output terminal 8 of.

[Effect] In an LSI in which a digital circuit and an analog circuit coexist, a test D / A conversion circuit or an A / D conversion circuit is provided on a chip, and the test D / A conversion circuit is provided before and after the analog circuit at the time of testing. Alternatively, since the digital interface is configured by inserting the A / D conversion circuit, the test can be performed only by the digital LSI tester, which facilitates the LSI testing in which the digital circuit and the analog circuit coexist. As a result, the test time is shortened, so that the good products of the LSI can be efficiently selected, and the productivity is remarkably improved.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention. Nor. For example, each of the test terminals 10, 11, and 15 in the above embodiments may be not only terminals such as external pins but also external terminals such as pads.

[Field of Use] In the above description, the invention mainly made by the present inventor was applied to an LSI mainly composed of a digital circuit partially having an analog circuit which is a field of use in the background. The present invention is not limited to this, and the present invention can be used when it is desired to test an LSI mainly composed of an analog circuit having a digital circuit as a part so that it can be tested only by the analog LSI tester.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of a semiconductor integrated circuit (LSI) according to the present invention, FIG. 2 is a block diagram showing a second embodiment of the present invention, and FIG. It is a block diagram which shows the 3rd Example of invention. 1 ... LSI (Large Scale Integrated Circuit), 2 ... Digital circuit, 3,13 ... Analog circuit, 4 ... D / A conversion circuit, 5 ... Analog input terminal, 6,7 ... Digital input terminal, 8, 9 ... Digital output terminal, 10 ... Test digital input terminal, 11 ... Test analog output terminal, 12 ... Analog output terminal, 14 ... A / D conversion circuit, 15 ... Test digital output Terminal.

Claims (3)

[Claims] 1. An analog input terminal, an analog circuit for receiving an analog signal supplied from the outside through the analog input terminal, a digital circuit whose input is coupled to an output of the analog circuit, and an external circuit for the digital circuit. From the digital input terminal for supplying the digital signal from the test digital signal directly from the outside, and the test digital signal supplied from the digital input terminal for the test. To a test analog signal for the analog circuit, and a test analog output terminal for outputting the test analog signal output from the D / A converter circuit to the outside. A semiconductor integrated circuit comprising a semiconductor substrate. 2. An analog input terminal, an analog circuit for receiving an analog signal supplied from the outside through the analog input terminal, a digital circuit whose input is coupled to an output of the analog circuit, and an external circuit for the digital circuit. From the digital input terminal for supplying the digital signal from the digital input terminal and the test digital signal generated by the digital circuit based on the digital signal supplied from the digital input terminal. And a test analog output terminal for outputting a test analog signal output from the D / A conversion circuit to the outside. A semiconductor integrated circuit characterized by the above. 3. An analog input terminal, a first analog circuit that receives an analog signal supplied from the outside through the analog input terminal, and a digital circuit whose input is coupled to the output of the first analog circuit. A digital input terminal for supplying a digital signal to the digital circuit from the outside, a second analog circuit for receiving the digital signal output from the digital circuit, and an output of the second analog circuit to the outside An analog output terminal for receiving a first test digital signal generated by the digital circuit based on the digital signal supplied from the digital input terminal, and receiving the first test digital signal from the first analog circuit. To a D / A conversion circuit for converting into a D / A conversion circuit and a test analog signal output from the D / A conversion circuit to an external device. And a test analog output terminal for outputting to the second analog circuit, an A / D conversion circuit for receiving the output of the second analog circuit and converting the output to a second test digital signal, and the A / D conversion circuit A semiconductor integrated circuit, comprising: a single semiconductor substrate; and a test digital output terminal for outputting the output second test digital signal to the outside.