JPH063803B2 - Method for manufacturing semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device in which an insulating film is thickly formed on a peripheral portion of a wiring in a self-aligned manner.

[Technical background of the invention and its problems]

In the conventional technique, the peripheral portion of the wiring layer is covered with the insulator having the same film thickness as that of the central portion. Therefore, when an insulator on the wiring layer, such as a contact hole, is opened, a shift occurs in the mask alignment process. In the case of occurrence of, the insulating film was opened even to the lower part of the wiring, and this often caused a defect.

This situation will be described with reference to the drawings. 4 (a) to 4 (e) are examples of the prior art, in which the wiring 3 is formed by forming the oxide film 2 on the substrate 1 and further processing it. The wiring 3 is covered with an insulating film 4. In (b), a contact hole portion 7 is formed by applying a resist 7 on this, mask alignment, exposure and development steps. (b) is an example of proper mask alignment. Further, in (c), it is a cross-sectional view in which the insulating film 4 is etched and the resist 6 is removed. after this,
Further, by forming the second wiring layer, proper connection with the first wiring layer can be obtained.

In FIGS. (D) and (e), when the mask alignment is not properly performed, a part of the opening 7 of the resist 6 in (d) is attached to the peripheral portion of the wiring layer 3. After this, etching, resist,
In (e) after the chipping, the contact opening 7 reaches the substrate 1 due to the misalignment of the mask. After this, the second
When the wiring layer is to be formed, the wiring layer and the substrate 1 are short-circuited at the portion 8.

Therefore, it is considered important to deposit a thick insulating film in the peripheral portion of the wiring layer in order to relieve the semiconductor element from such a defect caused by the mask shift.

[Object of the Invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device, which is an improvement of the above-mentioned drawbacks of the prior art and which forms a thick insulating film on the peripheral portion of a wiring in a self-aligned manner.

[Outline of Invention]

If a relatively thick wiring layer is formed on a semiconductor substrate and the insulating material is uniformly etched until the upper portion of the wiring layer is exposed after the insulating material is deposited, the wiring layer side part and the part without the wiring layer are insulated. The film layer remains. Here, if the wiring layer is etched using the insulator as a mask to a desired thickness, the insulating film on the side of the wiring layer becomes a new step. Here, by further depositing the second insulating film, a thick insulating film layer can be formed on the step side portion of the first insulating film, that is, on the peripheral portion of the wiring layer.

〔The invention's effect〕

FIGS. 2 (a) to 2 (c) show a case in which misalignment of the mask occurs when the contact hole portion is to be opened on the structure formed by the above steps.

That is, FIG. 2 (a) shows the structure of the insulating films 4 and 5 on the wiring 3 made according to the present invention. After that, the case where the mask misalignment occurs during the patterning of the resist is shown in FIG. After that, the state where the resist is peeled off after etching the insulating film is shown in FIG. In this case, in the conventional example, the bottom of the contact hole reaches the substrate,
When the method shown in the present invention is used, the bottom 9 of the contact hole is prevented from reaching the substrate 1 due to the thick insulating film around the wiring layer. Therefore, it is possible to prevent defects due to misalignment of the contact masks.

According to the present invention, for example, a contact opening can be directly formed on a fine pattern such as a gate, so that the degree of integration of elements can be dramatically improved.

Example of Invention

3 (a) to (e) show an embodiment of the present invention. Fig. 3 (a)
For example, after forming a thermal oxide film on the semiconductor substrate 1 to, for example, 200 Å, a wiring layer such as polysilicon is formed from 6000 Å to 800
The wiring layer is formed by the photomask process and the etching process after the 0Å deposition.

After that, a sectional view when the first insulating film layer is deposited or applied, for example, 8000 to 10000Å is shown in (b). In this case, the film thickness of the first insulating film becomes thinner in the order of the step side portion of the wiring 3, the portion without the wiring 3, and the upper portion of the wiring 3.

In this state, when the insulating film is etched until the upper part of the wiring layer is exposed, the side wall of the insulating film remains on the side portion of the wiring 3 because the thickness of the insulating film is different. This state
Shown in (c).

Here, the wiring 3 is uniformly etched using the insulating film 4 as a mask. At this time, in order for the insulating film 4 to serve as a mask, it is desirable that the insulating film 4 is superior in etching resistance to the wiring layer 3 by a factor of 5 or more, depending on the amount of etching. Then, the etching of the wiring layer 3 is finished while leaving a desired film thickness, for example, 3000 to 4000 Å.
FIG. Here, the side wall of the insulating film 4 shown in FIG. Next, when the second insulating film 5 is deposited, a thick insulator is formed inside the protrusion, that is, in the peripheral portion of the wiring layer 3 and in the central portion of the wiring layer 3 (FIG. (E)). .

FIGS. 1 (a) to 1 (e) are examples using the second claim. The description is the same as that in FIGS. 3 (a) to (e). However, FIG. 1 (b) shows a method of depositing an insulating film such that the film thickness is 1/2 or less compared to the portion above the step due to the wiring layer 3, such as bias sputtering or coating of a resin-based insulating film. Is the case of using. At this time, if the insulating film 4 is entirely etched, it can be made almost flat with the wiring layer 3. This is shown in FIG. 1 (c). By using the same method as shown in FIGS. 3 (d) and 3 (e), the shape shown in FIG. 1 (e) can be obtained. Since this has a shape in which only the central portion of the wiring layer is covered with a thin insulating film, the structure is further resistant to misalignment of the contact mask. When connecting only the wiring layer and the upper wiring layer, for example, the first layer of Al
This is advantageous for connection between the wiring and the second-layer Al wiring.

Although the description has been made using polycrystalline silicon as the wiring material, any other material such as aluminum, tungsten, molybdenum, or a silicide thereof can be used as the wiring material.

The same applies to insulating film materials, such as SiO ₂ , SiN, phosphor glass,
A polymer etc. may be used. Also, regarding the deposition method, C
A VD method, an LP-CVD method, a plasma CVD method, a bias sputtering method, or the like may be used, or a coating type is also possible.

As for the etching method, any method may be used as long as a sufficient selection ratio between the wiring layer and the insulating film can be obtained.

[Brief description of drawings]

1 (a) to 1 (e) are sectional views of respective steps in an embodiment of the present invention,
2 (a) to (c) are cross-sectional views showing a case where mask misalignment occurs, FIGS. 3 (a) to (e) are cross-sectional views showing another embodiment, and FIG. 4 (a)- (e) is a sectional view illustrating a conventional example. In the figure, 1 ... Semiconductor substrate, 2 ... Oxide film, 3 ... Wiring layer, 4 ... First insulating film, 5 ... Second insulating film.

Claims (2)

[Claims] 1. A step of processing a wiring on a semiconductor substrate and then covering the entire surface of the semiconductor substrate with a first insulating film; a step of etching the first insulating film until an upper layer of the wiring layer is exposed; The method includes a step of etching the wiring layer to reduce the thickness of the wiring layer by an etching method having excellent selectivity with respect to the first insulating film, and a step of forming a second insulating film on the entire surface. A method of manufacturing a semiconductor device, comprising: 2. A first insulating film having a film thickness ratio of the first insulating film in a region where no wiring layer is present and in a region on the wiring is at least twice as large as that of the first insulating film. A method of manufacturing a semiconductor device according to claim 1.