JPH0637103A - Bipolar transistor and its manufacture - Google Patents

Abstract

PURPOSE:To increase the operating speed of an element by eliminating the parasitic capacitance of the element and, at the same time, to easily make the element precise by reducing the number of masks. CONSTITUTION:An emitter area 4a, base area 5a, and collector area 4b are formed in the lateral direction on an insulating substrate and the emitter and collector areas 4a and 4b are formed of Si layers and the base area 5a is formed of an SiGe layer. The Si layers are crystallized into single crystals by laser annealing. etc., after forming the layers in poly-semiconductor layers.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bipolar transistor and its manufacturing method. More specifically, a self-aligned bipolar transistor capable of speeding up the device by eliminating parasitic capacitance, reducing the number of masks to easily achieve miniaturization of the device, and speeding up the process. And its manufacturing method.

[0002]

2. Description of the Related Art Bipolar transistors are currently used in various applications because of their high speed and high driving capability.
It is formed as a discrete device or in an IC or LSI. FIG. 8 shows a sectional structure of a bipolar transistor portion incorporated in a conventional IC or the like.

FIG. 8 is a structural diagram of an ordinary lateral bipolar transistor portion. An n-type epitaxial layer is formed on a p-type semiconductor substrate 11 to form a collector region 12, and a p ^- type base is formed on the surface of the collector region 12 by diffusion or ion implantation. Region 13, n ⁺
Type is of the emitter region 14 is formed, the electrode take-out portion of the base region 13 high concentration region 15 of p ⁺ -type are formed. A buried layer 16 for preventing collector parasitic resistance is formed at the boundary between the epitaxial layer to be the collector region 12 and the semiconductor substrate 11, and an isolating layer for electrically isolating this transistor portion from other regions is formed. A ration 17 is formed on both sides. A protective film 18 such as SiO ₂ is formed on the surface of the substrate, and a field insulating film 19 which is a thick oxide film for separating each element is formed. Collector area
Since the electrode connection with 12 and the emitter region 14 forms a thin emitter diffusion layer, contact electrodes 21 and 22 made of polycrystalline silicon are respectively formed in the connection portion with the semiconductor region, and further via the insulating film 20. A collector electrode 23, a base electrode 24, and an emitter electrode 25 are each formed of Al or the like.

[0004]

However, in the above-mentioned conventional bipolar transistor, the transistor portion and the substrate portion are not completely separated from each other.
There is a problem that parasitic capacitance, parasitic resistance, etc. are generated, which impedes the high speed operation of the device.

Further, it is necessary to separately prepare a mask for forming the base region and a mask for forming the emitter region and the collector region, and further it is necessary to allow an alignment margin of these masks. There is a problem that it is difficult to miniaturize the device.

Further, L for separating the elements in the lateral direction from each other
Since the OCOS structure is required, there is also a problem that the isolation width of the element is large.

Further, since the conventional bipolar transistor uses silicon, which is the same semiconductor material as that of the base region, in the emitter region and the collector region, if the base region is narrowed in order to increase the speed of the device, holes will flow from the base to the collector. There is a problem that it is injected to prevent the diode from operating at high speed.

On the other hand, "Prediction of base-collector heterojunction effect in SiGe-based HBT" (Ugagami, Amemiya, The Institute of Electronics, Information and Communication Engineers, SDM88-142, 1988, 25-).
HBTs using narrow bandgap silicon germanide in the base region, as disclosed in (p. 30).
In the (heterojunction bipolar transistor), injection of holes into the collector region (n type) is blocked by the difference in bandgap due to the heterojunction between the base region and the collector region, so that electron accumulation in the base region (p type) is prevented. The amount determines the operation speed, the width of the base region can be narrowed down to about 10 nm, the number of electrons accumulated in this region is small, and high-speed operation can be realized, but a device such as MBE must be used when forming a heterojunction However, there are problems in terms of productivity and cost.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a bipolar transistor in which the above-mentioned drawbacks of the prior art are eliminated. That is, an object of the present invention is to provide a bipolar transistor which can speed up the element and can easily achieve miniaturization of the element.

[0010]

In a bipolar transistor of the present invention, emitter, base and collector regions are directly formed in a lateral direction on an insulating substrate, and the emitter region and collector region are of a first conductivity type silicon layer. And the base region is formed of a second conductivity type germanium silicon layer.

According to the method of manufacturing a bipolar transistor of the present invention, (a) metal films electrically connected to the emitter region and the collector region are provided on an insulating substrate so as to face each other, and (b) the metal film is formed. A polysilicon layer of the first conductivity type is provided on the insulating substrate, and an emitter region and a collector region are provided by etching back, leaving the polysilicon layer only on the opposing surface of the metal film, and (c) the surface of the insulating substrate. A second conductivity type germanium silicon layer on the
By etching back, the base region is formed by leaving the germanium silicon layer only in the opposing portions of the emitter region and the collector region, (d) the polysilicon layer is monocrystallized, and (e) the surface of the insulating substrate is insulated. Provide a membrane,
In addition, it is characterized in that electrodes in each region are formed.

[0012]

In the bipolar transistor of the present invention, since the substrate and the element portion are completely separated by the insulating film, the parasitic capacitance is eliminated. In addition, the emitter region and the collector region are formed of silicon (hereinafter referred to as Si), and the base region is formed of germanium silicon (hereinafter referred to as Si).
Since it is formed of Ge), the base region can be formed narrower and the speed can be further increased.

Since the emitter region and the collector region and the base region are formed by etching back, respectively, a mask for forming these regions is unnecessary, the number of masks can be reduced, and the alignment margin by the masks can be reduced. There is no need to anticipate and miniaturization can be achieved. Further, after the etching back, the poly-Si layer forming the emitter region and the collector region is made into a single crystal, whereby a further increase in speed can be achieved.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The bipolar transistor portion of the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a sectional view showing an embodiment of the bipolar transistor portion of the semiconductor device of the present invention. In FIG. 1, 1 is a semiconductor substrate made of Si or the like, and an insulating film 2 such as a silicon oxide film or a silicon nitride film is provided on the semiconductor substrate 1 to form an insulating substrate. An emitter region 4a and a collector region 4b are formed of a first conductivity type poly-Si layer on the insulating film 2, and a base region 5a is formed of a second conductivity type SiGe semiconductor layer between the emitter region 4a and the collector region 4b. Metal films 3a and 3b are provided which are electrically connected to the region 4a and the collector region 4b, respectively. A protective film 9 is provided on these, a contact hole is formed, and an emitter electrode 6, a base electrode 7 and a collector electrode 8 are formed respectively, and a bipolar transistor portion is constituted. The semiconductor layer is transformed into a single crystal from a polycrystal by being subjected to a high temperature treatment such as laser annealing.

In the above description, an example in which an insulating film such as a silicon oxide film is formed on a semiconductor substrate as an insulating substrate has been described, but when such a semiconductor substrate is used, when an IC is formed together with other elements, Although convenient, it is also possible to use a glass substrate, an insulating substrate such as sapphire, or the like, and form the semiconductor layer on the insulating substrate.

Further, the metal films 3a and 3b are for electrically connecting the emitter region 4a and the collector region 4b to the external terminals, respectively.
It must withstand temperatures above 00 ° C, and is preferably a refractory metal such as tungsten or titanium.

With this structure, a heterojunction bipolar transistor can be completely isolated on the insulating substrate, and a high-performance element capable of high-speed operation with no parasitic capacitance can be obtained.

A method of manufacturing the bipolar transistor portion of this semiconductor device will be described.

First, metal films 3a and 3b electrically connected to the emitter region 4a and the collector region 4b are provided on the substrate 1 on which the insulating film 2 is formed. Specifically, a metal film is provided on the entire surface, and the metal film 3 is formed by etching away the formation locations 10 of the emitter, base, and collector regions.
Although a and 3b are formed to face each other, they may be formed by another method such as forming them separately.

Next, a poly-Si layer of the first conductivity type is formed on the gaps between the metal films 3a and 3b facing each other and on the metal films 3a and 3b and etched back to form a side having a 1/4 circular cross section. The poly-Si layer is a metal film 3a, 3 in the form of a wall.
An emitter region 4a and a collector region 4b are formed on the opposite surface side of b, respectively.

Further, a second conductivity type poly-SiGe layer is formed on the gap between the emitter region 4a and the collector region 4b and the metal film 3.
By providing on a and 3b and etching back again,
The second conductivity type SiGe layer remains and the base region 5a is formed only between the emitter region 4a and the collector region 4b.

Next, the poly-Si layer is monocrystallized. As the method of single crystallization, a method of irradiating a laser or an electron beam from the surface of the semiconductor substrate to perform single crystallization or ZM
There is a method of performing crystallization by heating the substrate surface while sequentially heating from the edge of the semiconductor substrate while irradiating with a heat irradiation source called R method (Zone Melting Recristalization).

As a result, the crystal direction of the poly-Si layer becomes uniform and has a single crystal structure, so that the electron mobility is increased, high-speed operation can be performed, and device characteristics and the like are improved.

Next, an insulating film is provided on the entire surface, and the emitter electrode 6, the base electrode 7, and the collector electrode 8 are respectively formed, whereby the transistor portion of the semiconductor device of the present invention is formed. By connecting the emitter electrode 6 and the collector electrode 8 to the metal films 3a and 3b, respectively, it is not necessary to directly contact the narrow emitter region 4a and the collector region 4b, and the emitter electrode 6 and the collector electrode 8 can be easily formed with high reliability.

The metal films 3a and 3b can be formed by a method such as a sputtering method, a vapor deposition method or a MOCVD method, and the etching is a known method such as an etching solution or RIE method or ion milling depending on the material by a lithography process. Done by.

Further, the poly Si layer and the SiGe layer can be formed by a known method such as a CVD method,
The etch back can be performed by an etching method such as the RIE method. Other insulating film formations and electrode film formations can also be performed using conventional techniques.

Embodiment 1 Next, a concrete manufacturing method of the bipolar transistor portion of the present invention will be described with reference to FIGS.

First, 80 sc of TEOS (Si (OC ₂ H ₅ ) ₄ ) is deposited on the silicon substrate 1 using an LP-CVD apparatus.
It is introduced into the apparatus at a flow rate of cm and the silicon oxide film 2 is deposited under the condition of 750 ° C. and 1 Torr. Further, a tungsten film is deposited on the silicon oxide film 2 by the sputtering method. Then, a photoresist film is applied on the tungsten film and patterned with the first mask to form the opening 10 of the tungsten film (see FIG. 2).

Next, as shown in FIG. 3, n-type poly-Si
Layer 4 is processed by LP-CVD equipment to SiH ₄ 120 sccm, PH ₃ 50s
It was deposited on the entire surface under the conditions of ccm, 650 ° C and 0.2 Torr. Then, the poly-Si layer is etched back by RIE, and sidewalls 4 each having a ¼ circular cross section as shown in FIG. 4 are formed on both sides of the opening of the tungsten film.
The n-type poly-Si layer was removed to the extent that a and 4b remained. Thereafter, using the p-type UHV-CVD apparatus poly SiGe layer 5 of, by introducing SiH ₄ and GeH ₄ and B ₂ H ₆ respectively flow, 75 sccm, 75 sccm, at 130 sccm, 700 to 800
It was deposited on the entire surface under conditions of ℃ and about 10 minutes (see FIG. 5).

Next, the p-type SiGe layer is etched by the RIE method so as to fill the gap between the n-type poly-Si layers left in the etch-back step so as to have almost the same level as the tungsten (see FIG. 6).

Next, the n-type poly-Si layer is annealed by irradiating it with a laser from the surface to perform single crystallization. after that,
Using an LP-CVD apparatus, TEOS was introduced into the apparatus at a flow rate of 80 sccm, and the silicon oxide film 9 was deposited on the entire surface under the conditions of 750 ° C. and 1 Torr (see FIG. 7).

Finally, contact holes were formed by the RIE method to form the emitter electrode 6, the base electrode 7 and the collector electrode 8 to complete the bipolar transistor portion (see FIG. 1).

[0034]

As described above, in the bipolar transistor of the semiconductor device of the present invention, since the substrate and the element forming region are completely separated by the insulating material, the parasitic capacitance and the parasitic resistance are eliminated and the element The speed can be increased. Moreover, in the present invention, SiGe is formed in the base region.
Since the heterojunction is used, holes are not injected even if the base region is narrowed, and the speed can be further increased.

Further, since the emitter region and the collector region and the base region are formed by the etching back utilizing the step difference of the metal film for connecting to the electrode, the emitter, the collector region and the base region are formed. No mask is required, the number of masks can be reduced, and the device can be easily miniaturized.

Furthermore, according to the present invention, since a polycrystalline semiconductor is formed and then monocrystallized, a special device such as an MBE device is not used to form a heterojunction of poly-Si and poly-SiGe. The semiconductor device can be easily formed by using a simple LP-CVD device, the productivity is greatly improved, and a semiconductor device having high characteristics can be obtained.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of a bipolar transistor portion of a semiconductor device of the present invention.

FIG. 2 is a process sectional view of an example of a bipolar transistor portion of the present invention.

FIG. 3 is a process sectional view of an example of a bipolar transistor portion of the present invention.

FIG. 4 is a process sectional view of an example of a bipolar transistor portion of the present invention.

FIG. 5 is a process sectional view of an example of a bipolar transistor portion of the present invention.

FIG. 6 is a process sectional view of an example of a bipolar transistor portion of the present invention.

FIG. 7 is a process sectional view of an example of a bipolar transistor portion of the present invention.

FIG. 8 is a cross-sectional explanatory view of a conventional bipolar transistor.

[Explanation of symbols]

 1 Silicon substrate 2 Insulating film 3a, 3b Metal film 4a Emitter region 4b Collector region 5a Base region

Claims (2)

[Claims] 1. An emitter, a base and a collector region are directly formed in a lateral direction on an insulating substrate, the emitter region and the collector region are made of a first conductivity type silicon layer, and the base region is a second conductivity type. Bipolar transistor consisting of a germanium silicon layer of. 2. (a) A metal film electrically connected to an emitter region and a collector region is provided on an insulating substrate so as to face each other, and (b) a first conductive film is formed on the insulating substrate on which the metal film is formed. Type polysilicon layer is provided, and an emitter region and a collector region are formed by etching back, leaving the polysilicon layer only on the facing surface of the metal film, and (c) germanium of the second conductivity type is formed on the surface of the insulating substrate. A silicon layer is provided, and a base region is formed by etching back, leaving the germanium silicon layer only in the opposing portions of the emitter region and the collector region; (d) single-crystallizing the polysilicon layer; A method for manufacturing a bipolar transistor, comprising forming an insulating film on a surface of an insulating substrate and forming electrodes in respective regions.