JPH06349774A - Method of forming buried plug - Google Patents

Abstract

PURPOSE:To form a satisfactory buried plug in a contact hole securely with a high reliability. CONSTITUTION:A contact hole 2 in an insulating layer 1 is coated with a Ti layer 3 which is an ohmic contact forming metal layer and a TiN layer 4 successively by a plasma CVD method, and then, a TiN buried layer 5 is buried in the contact hole 2 by a thermal CVD method to form a TiN/Ti buried plug 6.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a buried plug in, for example, a semiconductor integrated circuit.

[0002]

2. Description of the Related Art In various electronic devices such as semiconductor integrated circuits which are required to be small in size and high in density, an upper wiring is ohmic-contacted with a lower semiconductor region or a wiring or an electrode (hereinafter referred to as a contacted portion). As a method, there is often adopted a method in which a conductive embedded plug is embedded in a contact hole formed in an insulating layer formed on a lower contacted portion, and the contact is performed through the embedded plug.

A CVD (chemical vapor deposition) method (hereinafter referred to as BLK-W) of tungsten W, which is excellent in so-called step coverage, is widely used as a technique for burying a buried plug in this contact hole.

However, the BLK-W has poor adhesion to the underlying oxide film, that is, the insulating layer, and the BLK-W has a poor adhesion.
When W is directly formed on the diffusion layer, there is a problem of erosion of the diffusion layer by WF ₆ of the source gas during the film formation. For this reason, a TiN / Ti underlayer for forming a Ti layer for securing adhesion for good ohmic contact and a TiN layer as a barrier metal against WF ₆ erosion is formed in advance, and then the BLK is formed. The method of embedding -W is adopted.

However, with the demand for smaller size and higher density of electronic devices, the contact hole diameter is further miniaturized, and accordingly, the aspect ratio (thickness / diameter) becomes large, The embedded diameter of the BLK-W is further narrowed by the formation of the underlying layer of the Ti layer or the TiN layer.
-It becomes difficult to embed W.

Therefore, attention has been paid to a method in which the buried plug of the contact hole is formed not by BLK-W but by the TiN / Ti laminated film itself as the underlying metal layer, and the W layer is formed thereon. ing.

In order to carry out this method, it is necessary to convert TiN / Ti which is excellent in burying property into CVD. Currently TiN
As a method for forming a CVD film on both the Ti layer and the Ti layer, N ₂
And ECR (Electron Cyclotron Resonance) plasma CV for promoting reduction and nitridation of TiCl _{4 with} H ₂ plasma
D, ie E of TiN with TiCl ₄ + H ₂ + N ₂
E of Ti by CR plasma CVD, TiCl ₄ + H ₂
Only CR plasma CVD.

However, in the TiN / Ti film formation by this ECR plasma CVD, the film thickness of the film is influenced by the incident angle of the plasma, and the film thickness on the side wall of the contact hole where the plasma is difficult to enter is at the bottom of the contact hole. It is considerably thinner than the film thickness, and it is difficult to uniformly form TiN / Ti in the contact hole.

Therefore, in order to fill the contact hole with TiN / Ti, there is a disadvantage that the film thickness of each of TiN and Ti must be increased so that TiN / Ti is deposited from the bottom of the contact hole. .

Therefore, it is expected that a TiN / Ti film having a uniform film thickness can be formed by a thermal CVD method in which the film is formed only by thermal energy without using anisotropic plasma. However, for TiN CVD, TiCl
_Although it is realized by the reaction of ₄ + NH ₃ , etc.
With respect to VD, reduction of TiCl ₄ with H ₂ requires a high temperature close to 2000 ° C. based on thermodynamic calculations, and therefore has not been applied to semiconductor integrated circuits.

Therefore, at present, a technique for forming a TiN / Ti film with a uniform thickness by CVD is not yet realized, which is a major obstacle to the formation of a TiN / Ti buried plug in a contact hole. Has become.

[0012]

SUMMARY OF THE INVENTION The present invention provides a method of forming a buried plug which can reliably and satisfactorily form a buried plug for a contact hole.

[0013]

The first aspect of the present invention will be described with reference to FIGS.
As shown in the process diagram of FIG. 3, a Ti layer 3 of a metal layer for forming an ohmic contact and a TiN layer 4 are sequentially formed in a contact hole 2 formed in the insulating layer 1 by plasma CVD.
(Plasma-Chemical Vapor Deposition) method for depositing (FIG. 1), and then thermal CVD (Thermochemical vapor deposition)
A TiN / Ti embedded plug 6 is formed (FIG. 3) by the step of filling the TiN embedded layer 5 in the contact hole 2 by the method (FIG. 2).

In the second aspect of the present invention, as shown in FIGS. 4 to 7, a Ti layer 3 which is a metal layer for ohmic contact formation is formed in a contact hole 2 formed in an insulating layer 1 by plasma CV.
Step D (FIG. 4), then an annealing step (FIG. 5) of nitriding the Ti layer 3 and then heat C
Buried layer 5 of TiN in contact hole 2 by VD
Is embedded (FIG. 6) to form a TiN / Ti embedded plug (FIG. 7).

[0015]

As described above, in the present invention, the Ti layer 3 for making good ohmic contact is formed by plasma CVD.
It is formed by the above method, and by doing so, the film is formed without being accompanied by a high temperature as in the thermal CVD. In this case, Ti formed by plasma CVD
Can be formed to have a necessary and sufficient thickness satisfactorily at least on the bottom surface of the ohmic contact hole, that is, on the bottom surface of the contact hole that requires good ohmic contact.

Then, thermal CVD capable of filling TiN in the ohmic contact hole 2 with good coverage.
The TiN burying layer 5 is buried by the above method. In this case, in order to avoid the inconvenience that Ti, which is easily oxidized, is oxidized during the work of moving from the plasma CVD processing chamber to the thermal CVD processing chamber, thermal CVD of Ti is performed. Ti before
After the plasma CVD of the layer 3, the plasma CV is similarly continuously applied.
By using D or a nitriding annealing step, the TiN layer 4 for preventing oxidation is formed without exposing the Ti layer 3 to the outside air, so that the buried plug 6 of Ti can be stably formed.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the first method of the present invention shown in FIG. 1 will be described in detail with reference to an embodiment thereof.

In this example, in the semiconductor region 12, which is formed so as to face one main surface of the semiconductor substrate, for example, the silicon substrate 11,
A case is shown in which an embedded plug for making a wiring connection is ohmic-contacted through a contact hole formed in the insulating layer 1 made of SiO ₂ formed on the surface of the substrate.

As shown in FIG. 1, the entire surface including the inside of the contact hole 2 formed in the insulating layer 1, that is, the bottom surface of the contact hole 2, that is, the semiconductor region 12, and the inner peripheral surface of the contact hole 2. Over the entire surface, a Ti layer 3 as a metal layer for forming an ohmic contact and a TiN layer 4 for preventing its oxidation are sequentially formed by an ECR plasma CVD method.

The Ti layer 3 and the TiN layer 4 are formed by first treating the contact holes 2 with dilute hydrofluoric acid, and then having a natural oxide film reducing ability, and silicidizing and stable by reacting with the silicon of the base substrate 11. A Ti layer 3 capable of forming a proper ohmic contact is formed by ECR plasma CVD, and then a TiN layer 4 is formed by the same ECR plasma CVD apparatus.

The Ti layer 3 is formed to have a thickness of 5 to 10 nm capable of forming the above-mentioned silicide, for example, a substrate temperature of 420 ° C., a pressure of 0.23 Pa, and TiCl ₄ and H ₂ as source gases. 10 scc for Ar and Ar
It is carried out by feeding at m, 50 sccm and 43 sccm.

The TiN layer 4 is formed to a thickness of, for example, 30 nm, which prevents the Ti layer 3 of the lower layer from being oxidized when it is opened to the atmosphere in the transition to the next step, for example, a substrate temperature of 420 ° C. The pressure was set to 0.12 Pa, and TiCl ₄ , H ₂ , N _2, and Ar were used as source gases at 20 sccm, respectively.
It is carried out by feeding at 26 sccm, 8 sccm and 43 sccm.

Next, the substrate 11 is transferred from the above-mentioned ECR plasma CVD apparatus to a thermal CVD apparatus, and the contact hole 2 is completely buried as shown in FIG. , TiN buried layer 5 over the entire surface
To form.

The TiN burying layer 5 is formed, for example, at a substrate temperature of 450 ° C. to 650 ° C. and a pressure of 2660 Pa, using TiCl ₄ , NH ₃ and N ₂ as source gases respectively.
It is performed by feeding at 0 to 100 sccm, 300 sccm, and 500 sccm.

Then, as shown in FIG. 3, TiN on the insulating layer 1 is etched back by, for example, using a Cl-based gas.
By etching the buried layer 5, the TiN layer 4, and the Ti layer 3,
A buried plug 6 made of TiN / Ti is formed while leaving only the TiN buried layer 5, the TiN layer 4, and the Ti layer 3 in the contact hole 2.

The conditions of this etch back process are, for example, Cl ₂ and Ar of 10 to 10 respectively as an etching gas.
Supply with 30sccm and 100-300sccm, 150
It is performed with a high frequency power of ~ 300W.

Next, one embodiment of the second method of the present invention is shown in FIG.
~ It demonstrates with reference to FIG. Also in this case, in the semiconductor substrate 12, for example, the semiconductor region 12 formed facing the one main surface of the silicon substrate 11, a buried plug for making a wiring connection thereto is formed on the surface of the SiO substrate.
_In this case, ohmic contact is made through a contact hole formed in the insulating layer 1 by ₂ .

In this case, as shown in FIG. 4, the entire surface including the inside of the contact hole 2 formed in the insulating layer 1, that is, the bottom surface of the contact hole 2, that is, the semiconductor region 1.
Only the Ti layer 3 of the ohmic contact forming metal layer is formed by ECR plasma CVD method over the entire surface of the contact hole 2 and the inner peripheral surface of the contact hole 2.

In the formation of the Ti layer 3 as well, similarly to the above-mentioned example, the contact hole 2 is first treated with dilute hydrofluoric acid, then has a natural oxide film reducing ability, and reacts with silicon of the base substrate 11. The Ti layer 3 which can be silicided to form a stable ohmic contact is formed by ECR plasma C
Formed by VD.

The Ti layer 3 is formed so as to have a thickness of 5 to 10 nm on the bottom surface in the contact hole 2 under the same method and conditions as in the above example.

Then, in the second invention, the Ti layer 3 is formed.
A nitriding annealing process is performed on the TiN layer 4 to form the TiN layer 4. This nitriding annealing treatment is performed by using, for example, N ₂ or NH
_It can be carried out by heating at 600 ° C. to 900 ° C. in ₃ gases.

With this annealing treatment, as shown in FIG.
The Ti layer 3 generates a silicide layer 13 that can obtain a good ohmic contact by a reaction between Ti and Si at a contact portion with the silicon substrate 11, that is, a contact portion with the semiconductor region 12, and also nitrides the Ti layer 3. As described above, the Ti layer 3 is formed in the contact hole 2 as described above.
When the bottom surface of the contact hole 2 is formed to a thickness of 5 to 10 nm, the side surface of the contact hole 2 has a thickness of about 1 to 4 nm. Therefore, the surface of the Ti layer 3 deposited on the side surface of the contact hole 2 is To almost the entire thickness, and the TiN layer 4 is formed.

Then, as shown in FIG. 6 and FIG.
Then, the TiN burying layer 5 is formed by burying the contact hole 2 in the same manner as described with reference to FIG. 3, and the burying plug 6 is formed by etching back.

Although the buried plug 6 is formed in the contact hole according to each of the above-mentioned present invention, it is not shown in the drawings, but
An upper wiring such as a metal having excellent conductivity such as Al or W is formed in a predetermined pattern so as to be electrically connected to the embedded plug 6.

In each of the above-mentioned examples, the lower layer contacted portion is the semiconductor region 12, and the buried plug 6 for contacting the upper layer wiring is formed on it. For example, the present invention can be applied to the formation of a buried plug in the case where the contact portion serves as a lower layer wiring, for example, in the case of making contact with a polycrystalline silicon semiconductor layer, etc., not limited to the above examples, semiconductor integrated circuits having various aspects, The present invention can be applied to other electronic devices.

In each of the above examples, the Ti layer 3 is formed,
Further, although the TiN layer 4 is formed by ECR plasma CVD in the first aspect of the present invention, it may be formed by plasma CVD which does not depend on ECR.

[0037]

According to the present invention, since the TiN burying layer 5 is finally deposited by thermal CVD having excellent burying property, that is, good step coverage, the contact hole is filled to form the burying plug 6. A buried plug having excellent mechanical and electrical characteristics can be formed.

Since the Ti layer 3 as an underlayer for forming the TiN burying layer 5 is formed by plasma CVD which does not require high temperature heating, it can be applied to the manufacture of semiconductor devices, and the contact holes can be miniaturized. Therefore, the semiconductor integrated circuit can be miniaturized and highly densified.

In the present invention, since the lower Ti layer 3 is formed by plasma CVD, for example, ECR plasma CVD, a stable and highly reliable buried plug can be formed, and the ECR plasma is thus formed. Even though the TiN layer 4 is exposed to the atmosphere by the shift from the CVD to the thermal CVD, the TiN layer 4 is formed on the Ti layer 3 by the ECR plasma CVD or the nitriding annealing process. Oxidation of the Ti layer 3 can be effectively prevented by this, and a highly reliable buried plug can be formed.

[Brief description of drawings]

FIG. 1 is a process chart of an example of the method of the present invention.

FIG. 2 is a process chart of an example of the method of the present invention.

FIG. 3 is a process chart of an example of the method of the present invention.

FIG. 4 is a process chart of another example of the method of the present invention.

FIG. 5 is a process chart of another example of the method of the present invention.

FIG. 6 is a process chart of another example of the method of the present invention.

FIG. 7 is a process chart of another example of the method of the present invention.

[Explanation of symbols]

 1 Insulating Layer 2 Contact Hole 3 Ti Layer 4 TiN Layer 5 TiN Buried Layer 6 Buried Plug

Claims (2)

[Claims] 1. A Ti layer of a metal layer for forming an ohmic contact and a TiN layer in a contact hole formed in an insulating layer.
Embedded plug characterized in that it comprises a step of sequentially forming a layer by plasma chemical vapor deposition and a step of burying a TiN embedded layer in the contact hole by thermochemical vapor deposition. Forming method. 2. A step of plasma-enhanced chemical vapor deposition of a Ti layer of a metal layer for forming an ohmic contact in a contact hole formed in the insulating layer, an annealing step of nitriding annealing the Ti layer, and thereafter, And a step of burying a TiN burying layer in the contact hole by a thermochemical vapor deposition method.