JPH0634676A - Power supply voltage detection circuit and semiconductor integrated circuit provided with the circuit - Google Patents

Abstract

PURPOSE:To output a control signal so that an IC can perform an initial function regardless of a supply voltage by outputting a comparison result between a divided voltage of the supply voltage and a reference voltage as a control voltage. CONSTITUTION:When a supply voltage VDD of an IC is lower than a specific voltage and the output voltage of a node S2 of a voltage-division circuit 2 is lower than that of a node S3 of a reference voltage generation circuit 3, the gate voltage of an N-channel MOSFET 15 becomes smaller than that of an N-channel MOSFET 16 of a comparison circuit 1, thus causing the level of the output voltage of a node 51 to be high. On the other hand, when the voltage VDD is higher than a specific voltage and the output voltage of the node S2 is higher than that of the node S3, the level of the output voltage of the node S1 becomes high. Therefore, using the output signal of the node S1 as a control signal, an optimum circuit configuration for a used supply voltage can be formed by switching the configuration of the circuit on a semiconductor chip and the IC can be controlled so that it can perform an initial function fully regardless of the voltage VDD.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply voltage detection circuit applied to a semiconductor integrated circuit.

[0002]

2. Description of the Related Art Currently, most ICs (integrated circuits) on the market have a recommended power supply voltage of 5V. However, an IC that can be used with a power supply voltage lower than 5 V is required depending on the application. For example, when the IC is mounted on a device that uses a battery as a power source, it is desired that the power source voltage of the IC be about 3.3V. However, when each element of the IC is optimally designed assuming that the power supply voltage used is 5V, if the power supply voltage is lowered to a certain level or less than 5V, the electrical characteristics of each element change significantly, and the desired IC May not be able to exert its function. For example, MOSFE
T (field-effect transistor having a metal-oxide film-semiconductor structure) has a low driving capability when the power supply voltage is low, and cannot supply a sufficient driving current to a load. Therefore, the operation of each element is significantly delayed, and the electrical performance of the IC is significantly deteriorated. In particular, in the case of an analog circuit, in many cases, the desired function is not fulfilled at all because the current flowing through the MOSFET decreases. Therefore, conventionally, I
In the case where the range of the power supply voltage used by the user C is wide, ICs suitable for each power supply voltage have been separately produced.

[0003]

As described above, in spite of having the same function in the related art, a plurality of kinds of power supply voltages within the range are considered in consideration of the range of the power supply voltage used by each user. However, there is a problem in that the manufacturing cost increases because the ICs are separately manufactured. Further, the optimum circuit configuration for exhibiting desired performance, such as the transistor size, often differs depending on the power supply voltage used. In such a case, it cannot be dealt with by changing the manufacturing conditions, and it is necessary to change the circuit configuration depending on the power supply voltage used even for ICs having the same function. Therefore, in order to manufacture each IC corresponding to each power supply voltage to be used, it is necessary to prepare different masks, and there is a problem that the manufacturing cost further increases. The present invention has been made in view of the above circumstances, and provides a power supply voltage detection circuit that outputs a control signal for controlling a semiconductor integrated circuit to perform a desired function regardless of the power supply voltage. To aim.

[0005]

The invention according to claim 1 is
A voltage divider circuit that divides and outputs a power supply voltage, a reference voltage generation circuit that outputs a reference voltage, a comparison circuit that compares the output voltage of the voltage divider circuit with the reference voltage, and outputs the comparison result as a control signal. And a circuit. According to a second aspect of the present invention, the power supply voltage detection circuit is formed on a semiconductor chip, and a circuit which performs a predetermined function and whose state is switched based on the control signal is formed. Characterize.

[0006]

According to the first aspect of the invention, the result of comparison between the voltage obtained by dividing the power supply voltage and the reference voltage is output as the control signal. According to the invention of claim 2, the configuration of the circuit on the semiconductor chip is switched by the control signal.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. 1 is a circuit diagram showing the configuration of a power supply voltage detection circuit according to an embodiment of the present invention. This power supply voltage detection circuit detects the power supply voltage of the IC.
It is formed on a semiconductor chip together with a circuit that realizes the function of.

In FIG. 1, reference numeral 2 is a voltage dividing circuit, which includes P-channel MOSFETs 21 to 23 and an N-channel MOSFE.
T24 and T25 are connected in series between the power source of the IC and the ground. P-channel MOSFETs 21-23 and N
The drains and gates of the channel MOSFETs 24 and 25 are commonly connected, and when a power supply voltage is applied to the IC, both MOSFETs are turned on. With such a configuration, P-channel MOSFE
From the node S2 where the drain of T23 and the drain of the N-channel MOSFET are connected, a voltage obtained by dividing the power supply voltage VDD by a predetermined dividing ratio can be obtained.

The reference voltage generating circuit 3 is a P channel MOS.
The FET 31 and N-channel MOSFETs 32 and 33 are sequentially connected in series between a power source and ground. The source of the P-channel MOSFET 31 is connected to the power supply terminal. When operating this power supply voltage detection circuit, a low level voltage is applied to the gate of the P-channel MOSFET 31 to turn it on. The N-channel MOSFET 32 is a depletion type FET having a negative gate threshold voltage, and the drain is a P-channel MO.
It is connected to the drain of the SFET 31, and its gate and source are connected to the drain of the N-channel MOSFET 33. As described above, in the N-channel MOSFET 32, the voltage between the gate and the source is fixed to 0V, and the difference between the voltage between the gate and the source (0V) and the gate threshold voltage (<0V) becomes the net gate bias. Form an inversion layer between the source and drain. Therefore, in the N-channel MOSFET 32, a substantially constant drain current always flows even if the voltage between the drain and the source changes due to the change in the power supply voltage VDD. The N-channel MOSFET 33 has a source grounded and a drain and a gate N-channel MOSFET.
It is commonly connected to the source and gate of T32. Then, the current supplied from the power supply side through the N-channel MOSFET 32 flows into the N-channel MOSFET 33 as a drain current. As mentioned above, N-channel MOSF
Since the magnitude of the drain current of the ET32 is almost constant regardless of the power supply voltage VDD, the N-channel MOSFET 33
Drain voltage, that is, the voltage of the node S3 in FIG. 1 is substantially constant regardless of the power supply voltage VDD.

Reference numeral 4 is a reference voltage generating circuit having the same structure as the reference voltage generating circuit 3, and is a P-channel MOSF.
The ET 41 and the N-channel MOSFETs 42 and 43 output a substantially constant voltage from the node S4 regardless of the power supply voltage VDD.

The comparison circuit 1 is a P-channel MOSFET 1
1 to 12 and N-channel MOSFETs 14 to 16. The source of the P-channel MOSFET 11 is connected to the power supply terminal. When operating this power supply voltage detection circuit, a low level voltage is applied to the gate of the P-channel MOSFET 11 to turn it on. The sources of the P-channel MOSFETs 12 and 13 are commonly connected to the drain of the P-channel MOSFET 11, and the drains of the P-channel MOSFETs 12 and 13 are connected to the drains of the N-channel MOSFETs 15 and 16. The gates of these P-channel MOSFETs 12 and 13 are P
Drain of channel MOSFET 13 and N channel MO
It is commonly connected to the connection point with the drain of the SFET 16. The gates of the N-channel MOSFETs 15 and 16 are connected to the node S2 of the voltage dividing circuit 2 and the reference voltage generating circuit 3 respectively.
Node S3 of each. The sources of the N-channel MOSFETs 15 and 16 are N-channel M
The drains of the OSFETs 14 are commonly connected. The N-channel MOSFET 14 has a source grounded and a gate connected to the node S4 of the reference voltage generation circuit 3.

FIG. 2 shows a simulation result of changes in the voltages of the nodes S1 to S4 when the power supply voltage VDD is gradually increased from 0V. Below, refer to this figure,
The operation of this power supply voltage detection circuit will be described.

First, the output voltage of the node S2 of the voltage dividing circuit 2 is almost proportional to the power supply voltage VDD as shown in FIG. On the other hand, the output voltage of the node S3 of the reference voltage generating circuit 3 changes as follows with respect to the power supply voltage VDD. First, when the power supply voltage VDD is equal to or lower than the gate threshold voltage of the P-channel MOSFET 31, the P-channel MOS
N-channel MOSFE because FET 31 is off
The drain current does not flow in T33, and the output voltage of the node S3 becomes 0V. Power supply voltage VDD is P channel MOSF
When the voltage exceeds the gate threshold voltage of ET31, the P-channel MOSFET 31 is turned on to cause a drain current to flow in the N-channel MOSFET 33, and the node S
The output voltage of 3 rapidly increases. However, after that, as described above, the drain current of the depletion type MOSFET 32 becomes substantially constant regardless of the power supply voltage VDD,
The output voltage of the node S3 exhibits a saturation tendency as the power supply voltage VDD rises. The node S4 of the reference voltage generating circuit 4 changes just like the node S3.

When power supply voltage VDD is lower than a predetermined value and the output voltage of node S2 of voltage dividing circuit 2 is lower than the output voltage of node S3 of reference voltage generating circuit 3, N channel M
N-channel MOS compared to the gate voltage of OSFET16
The gate voltage of the FET 15 is insufficient. Therefore, the output voltage of the node S1 is at a high level, that is, the drain of the P-channel MOSFET 11 and the N-channel MOSFET.
The voltage is almost the same as the voltage at the common connection point of the drains 12 and 13 (region A).

On the other hand, when the power supply voltage VDD is higher than the predetermined voltage and the output voltage of the node S2 of the voltage dividing circuit 2 is higher than the output voltage of the node S3 of the reference voltage generating circuit 3, the gate voltage of the N-channel MOSFET 16 is set. In comparison, the gate voltage of the N-channel MOSFET 15 becomes excessive. Therefore, the output voltage of the node S1 is low level, that is,
The voltage is almost the same as the drain voltage of the N-channel MOSFET 14 (region B). VDD = 3.5V in FIG.
It is shown that the voltage of the node S1 changes from high level to low level in the vicinity.

As described above, according to the power supply voltage detection circuit of this embodiment, a high level signal is output from the node S1 when the power supply voltage of the IC is lower than a predetermined value, and a low level signal when it is high. Is output. Therefore, the output signal of the node S1 is used as a control signal, and the configuration of the circuit formed on the semiconductor chip is switched by the control signal.
The circuit configuration can be optimized for the power supply voltage used. For example, the following application examples are possible. (1) MO that requires driving capability according to the power supply voltage used
The SFET has a configuration in which a plurality of MOSFETs are connected in parallel in advance. When the power supply voltage is high, the other MOSFET
Is forcibly turned off (for example, a method of cutting off the supply of the input signal to the gate and applying 0V as the gate voltage instead of the input signal) is considered, and one MOSFET
Use only. On the contrary, when the power supply voltage is low, both MOSFETs are supplied with an input signal and both MOSFETs are used. (2) The number of stages of the delay circuit for timing compensation is set so that the driving order of each circuit can be made appropriate. When the power supply voltage is higher than the predetermined value, the number of stages of the delay circuit is reduced to the minimum required stage to improve the operation speed. Further, when the power supply voltage is lower than the predetermined value, the number of stages of the delay circuit is increased to surely prevent timing malfunction.

[0017]

As described above, according to the present invention, the power supply voltage of the semiconductor integrated circuit can be detected,
Based on the detection result, it is possible to control the semiconductor integrated circuit so as to exert its intended function regardless of the power supply voltage. Therefore, it is possible to obtain the effect that a semiconductor integrated circuit having a wide range of power supply voltage to be used can be manufactured at low cost.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a power supply voltage detection circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing a simulation result of the operation of the example.

[Explanation of symbols]

1 ... Comparison circuit, 2 ... Voltage dividing circuit, 3 and 4 ... Reference voltage generating circuit.

Claims (2)

[Claims] 1. A voltage dividing circuit for dividing a power supply voltage and outputting the divided voltage, a reference voltage generating circuit for outputting a reference voltage, an output voltage of the voltage dividing circuit and the reference voltage, and controlling the comparison result. A power supply voltage detection circuit comprising: a comparison circuit for outputting as a signal. 2. A power supply voltage detection circuit is formed on a semiconductor chip, and a circuit which performs a predetermined function and whose state is switched based on the control signal is formed. A semiconductor integrated circuit comprising the power supply voltage detection circuit according to claim 1.