JP2001092544A - Constant voltage circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To supply a fixed voltage not depending on external power voltage to a reference voltage generation circuit for generating a reference voltage and a comparator for controlling a transistor(TR) for dropping voltage as power supply voltage. SOLUTION: This constant voltage circuit is provided with terminals 11, 12, a depression type TR 13 connecting one end of a current passage between its source and drain to the terminal 11, connecting its gate to the terminal 12 and capable of generating limited voltage VLIM, a reference voltage generation circuit 14 allowed to be driven by the voltage VLIM and capable of generating reference voltage VREF, and a TR 17 connecting one end of a current passage between its source and drain to the terminal 11. The constant voltage circuit is also provided with a voltage division circuit 20 for dividing voltage generated between the other end of the current passage of the TR 17 and the terminal 11 and generating divided voltage and a comparator 21 allowed to be driven by the voltage VLIM and capable of comparing the reference voltage VREF with the divided voltage VKEN.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage circuit built in a semiconductor integrated circuit, and more particularly to a constant voltage circuit for generating a constant voltage lower than a power supply voltage supplied from the outside.

[0002]

2. Description of the Related Art Conventionally, in a large-scale semiconductor integrated circuit (hereinafter, referred to as LSI) using a power supply whose voltage fluctuates, such as a battery power supply, (1) a power supply voltage supplied to the LSI is specified by a rating. Do not exceed the operating power supply voltage range,
Power supplied from outside for the purpose of (2) keeping the value of the power supply voltage inside the LSI low to reduce current consumption, and (3) adjusting the power supply voltage to interface with the LSI external circuit. 2. Description of the Related Art There is a system in which a voltage is reduced to a constant voltage by a constant voltage circuit built in an LSI and supplied as a power supply for an LSI internal circuit. In such a system, strict accuracy is often required for constant voltage.

Here, an example of a conventional constant voltage circuit is shown in FIG. This constant voltage circuit is provided with terminals 11 and 12. One terminal 11 has a high-potential-side voltage VBAT of the battery.
The other terminal 12 is supplied with the ground voltage GND on the reference potential side. The reference voltage generation circuit 14 operates at the voltage VBAT, and generates a reference voltage VREF having a lower value from the voltage VBAT.

The terminal 11 and the LSI internal circuit 15
Between the power supply node 16 and the source and drain of a voltage-dropping P-channel MOS transistor 17 for stepping down the voltage at the terminal 11 and supplying it to the LSI internal circuit 15. The voltage VDD obtained at the power supply node 16
Is divided at a predetermined ratio by a voltage dividing circuit 20 including a pair of resistors 18 and 19.

The comparator 21 operates at the voltage VBAT, and outputs the reference voltage V
REF and a divided voltage VK generated by the voltage dividing circuit 20.
Compare with EN. The output from the comparator 21 is supplied to the gate of the transistor 17.

Here, the operation of the constant voltage circuit of FIG. 8 will be briefly described. When the battery voltage VBAT is supplied to the terminal 11, the reference voltage generation circuit 14 generates a constant reference voltage VREF that does not depend on the value of the voltage VBAT. In addition,
The pair of resistors 18 and 19 in the voltage dividing circuit 20 are L
Voltage VDD at power supply node 16 of SI internal circuit 15
Is set to a desired value, the resistance ratio is set such that the divided voltage VKEN and the reference voltage VREF become substantially equal. Therefore, when VDD is lower than the desired value, VKEN <VREF, and the comparator 2
The output of 1 controls the transistor 17 to be turned on. Then, the voltage VDD of the power supply node 16 becomes VB
Start climbing closer to the AT. Conversely, when VDD is higher than a desired value, VKEN> VREF, and the output of the comparator 21 at this time makes the transistor 17
Is controlled to be turned off. At this time, the power supply node 1
The voltage VDD of 6 gradually decreases due to the current consumption of the LSI internal circuit 15. Here, even if the value of voltage VBAT fluctuates, the value of reference voltage VREF does not fluctuate, so that voltage VDD at power supply node 16 is controlled to match a desired value set in advance.

[0007]

In the conventional constant voltage circuit shown in FIG. 8, when the value of the voltage VBAT exceeds the rated value of the LSI, the transistor 17, the reference voltage generating circuit 14 and the comparator 21 are connected. The transistors to be formed need to be formed by using a special process such as a high withstand voltage process in order to have a sufficient withstand voltage.
In this case, the following various problems occur.

(1) Since the design rule is different from that of the transistor having the standard withstand voltage, an existing circuit block which has been designed according to the design rule with the standard withstand voltage cannot be used, and a special redesign is required.

(2) In the high-breakdown-voltage process, the transistor size becomes larger than the standard withstand voltage design rule, the pattern area increases, and the LSI manufacturing cost increases in order to maintain the breakdown voltage.

(3) In the high-breakdown-voltage process, in order to increase the breakdown voltage, the drain region of the transistor has an LDD having a diffusion region having a lower impurity concentration in addition to a normal diffusion region.
(Lightly Doped Drain) structure is required. Therefore, the process variation such as the channel length modulation effect and the variation in the threshold value is larger than the general standard withstand voltage process, and the power supply voltage dependency and the absolute accuracy of the reference voltage generating circuit 14 are deteriorated. The accuracy of the reduced voltage VDD also decreases.

On the other hand, when an additional process such as a high withstand voltage process is not used, the constant voltage circuit is connected to the LSI internal circuit 15.
It is indispensable to take a system measure to suppress the power supply voltage outside the LSI, such as installing it outside the LSI as an external circuit without integrating it integrally with the LSI. This raises costs and makes it difficult to secure board space on the set. Occurs.

The present invention has been made in view of the above circumstances, and has as its object to provide a high-precision, low-cost constant voltage circuit that solves the various problems described above. That is.

[0013]

A constant voltage circuit according to the present invention has a depletion type in which one end of a current path between a source and a drain is connected to the first terminal and a gate is connected to the second terminal. A first transistor, a reference voltage generating circuit which operates by a voltage generated between the other end of the current path of the first transistor and the second terminal and generates a reference voltage, and a current between the source and the drain. A second transistor having one end of the passage connected to the first terminal;
A voltage dividing circuit for dividing a voltage generated between the other end of the current path of the second transistor and the second terminal to generate a divided voltage; It operates according to the voltage generated between the second transistor and the second terminal, compares a reference voltage generated by the reference voltage generation circuit with a divided voltage generated by the voltage division circuit, and outputs an output of the second transistor A comparator for controlling the gate.

According to the present invention, there is provided a constant voltage circuit comprising: a first transistor of a depletion type in which one end of a current path between a first terminal and a second terminal and a source and a drain is connected to the first terminal; One end of a current path between drains is connected to the first terminal, the other end of the current path is connected to the gate of the first transistor, and the gate of the depletion type second is connected to the second terminal. A constant current element connected between the second terminal and a connection node between the gate of the first transistor and the other end of the current path of the second transistor; and the first transistor A reference voltage generating circuit that operates by a voltage generated between the other end of the current path and the second terminal and generates a reference voltage; and one end of a current path between a source and a drain is connected to the first terminal. The divided third transistor, a voltage dividing circuit for dividing a voltage generated between the other end of the current path of the third transistor and the second terminal to generate a divided voltage, and the first transistor Operated by a voltage generated between the other end of the current path of the second terminal and the second terminal,
A comparator for comparing a reference voltage generated by the reference voltage generating circuit with a divided voltage generated by the voltage dividing circuit, and controlling a gate of the third transistor with an output of the comparator; .

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of a constant voltage circuit according to a first embodiment of the present invention. This constant voltage circuit is provided with terminals 11 and 12. One terminal 11 is supplied with the high potential side voltage VBAT of the battery, and the other terminal 12
Is supplied with a ground voltage GND on the reference potential side. One end of a current path between the source and the drain of the depletion type MOS transistor 13 is connected to the terminal 11 through an N channel. The gate of the transistor 13 is connected to the terminal 12.

The reference voltage generation circuit 14 operates at a voltage VLIM obtained at the other end of the current path between the source and the drain of the transistor 13, and generates a constant reference voltage VREF having a lower value from the voltage VLIM. I do.

The terminal 11 and the LSI internal circuit 15
A power path between the source and the drain of the enhancement-type MOS transistor 17 is inserted between the power supply node 16 and the power supply node 16 of the enhancement type MOS transistor 17 for reducing the voltage of the terminal 11 and supplying the reduced voltage to the LSI internal circuit 15. I have. The voltage VDD obtained at the power supply node 16 is
A pair of resistors 18 connected in series between the
19, the resistors 18, 1
9 is divided by a predetermined ratio according to the resistance ratio of the ninth.

The comparator 21 operates at the voltage VLIM, and outputs the reference voltage V
REF and the divided voltage VKE generated by the voltage dividing circuit 20
Compare with N. The output from the comparator 21 is supplied to the gate of the transistor 17.

Next, the operation of the circuit configured as described above will be described. In the depletion type MOS transistor 13, it is assumed that predetermined impurity ions are previously implanted into the channel region at a predetermined dose such that the threshold value Vth is, for example, about -2V.

When a battery voltage VBAT is supplied to the terminal 11 from the outside, the depletion type MOS transistor 13 is turned on, and a current path between the source and the drain opposite to the side connected to the terminal 11 is provided. Voltage V at the end
LIM begins to rise to approach voltage VBAT. Here, the gate of the transistor 13 is connected to the ground voltage GND.
(0V) terminal 12 so that the voltage VLI
When M becomes higher than the gate voltage (GND) by the absolute value of the threshold, the transistor 13 is turned off.
That is, when the voltage VLIM exceeds about 2 V, the transistor 13 is turned off, and the rise of the voltage VLIM stops. Therefore, even if the voltage VBAT rises to 2 V or more, the voltage VLIM
Is limited to about 2V. This voltage VLIM is supplied as a power supply voltage to the reference voltage generation circuit 14 and the comparator 21. Even if the voltage VBAT rises to 2 V or more, the reference voltage generation circuit 14 and the comparator 21
Only a power supply voltage (VLIM) of about 2 V is applied.
Here, the relationship between the voltages VBAT and VLIM is shown in the characteristic diagram of FIG.

The reference voltage generation circuit 14 does not depend on the voltages VBAT and VLIM, and has a lower reference voltage V
REF is generated from the voltage VLIM. When the voltage VDD at the power supply node 16 of the LSI internal circuit 15 becomes a desired value, the pair of resistors 18 and 19 in the voltage dividing circuit 20 indicate the divided voltage VKEN and the reference voltage VR.
It is assumed that the resistance ratio is set so that EF is substantially equal. Therefore, when VDD is lower than the desired value, VKEN <VREF, and at this time, the comparator 2
The output of 1 controls the transistor 17 to turn on. Then, the voltage VDD of the power supply node 16 becomes V
Start rising to approach BAT. Conversely, when VDD is higher than the desired value, VKEN> VREF. At this time, the output of the comparator 21 controls the transistor 17 to be turned off. At this time, the voltage VDD of the power supply node 16 sequentially decreases due to the current consumption of the LSI internal circuit 15. Here, even if the value of the voltage VBAT changes, the value of the reference voltage VREF does not change.
The voltage VDD of the power supply node 16 is controlled so as to match a predetermined desired value.

In the constant voltage circuit shown in FIG. 1, even when a high voltage exceeding the rating of the standard withstand voltage process of the LSI is supplied to the terminal 11 as the voltage VBAT, a high voltage is applied only to the transistors 13 and 17. And only the voltage (about 2 V) equal to or lower than the standard withstand voltage can be applied to the reference voltage generating circuit 14 and the comparator 21. Further, the reference voltage generation circuit 14 and the comparator 21
Is supplied to the battery voltage VBAT is 2 V
Since the value is a constant value even if the value is above, the reference voltage generation circuit 1
4 and the comparator 21 are less dependent on the power supply, and the output of the voltage VDD can be controlled with higher accuracy.

According to the constant voltage circuit according to the first embodiment, the following effects can be obtained.

(1) Even in the case where the battery voltage VBAT exceeds the rating of the LSI, it is not necessary to use a high voltage transistor in each circuit block of the reference voltage generation circuit 14 and the comparator 21. Therefore, the reference voltage generating circuit 1
4 and the comparator 21 can use an existing circuit block which has been designed according to the standard design rule, and can shorten the design period and improve the accuracy.

(2) As described in the above (1), the reference voltage generating circuit 14 and the comparator 21 are designed according to the standard design rule, and do not use the design rule of the high withstand voltage process. Manufacturing costs are reduced.

(3) As described in the above (1), since the reference voltage generating circuit 14 and the comparator 21 can be designed according to the standard design rule, the process variation such as the threshold value variation of the transistor is compared with the high breakdown voltage process. Smaller. Further, since the power supply voltage supplied to the reference voltage generation circuit 14 is limited, the voltage dependency is small, and
The accuracy of the power supply voltage VDD supplied to the internal circuit 15 is greatly improved. At this time, there is almost no influence on other characteristics such as current consumption.

(4) Since it can be integrated integrally with the LSI internal circuit 15 and there is no need to provide an external circuit outside the LSI, it is possible to reduce the cost and reduce the board space on the set. Become.

In the first embodiment, the case where the threshold value of the transistor 13 is set to about 2 V has been described. However, this can be set to an arbitrary value as needed.

Next, a second embodiment of the present invention will be described with reference to FIG.

In the first embodiment shown in FIG. 1, the gate of the N-channel depletion type MOS transistor 13 is connected to the terminal 1 to which the ground voltage GND is supplied.
In the constant voltage circuit according to the second embodiment, the gate of the transistor 13 is connected to the terminal 12 via the resistor 22 which is a constant current element. Further, in the constant voltage circuit according to the second embodiment, an N-channel depletion type MOS transistor 23 is added. The current path between the source and the drain of the newly added transistor 23 is connected to the terminal 1
1 and the gate of the transistor 13, and the gate of the transistor 23 is connected to the terminal 12. The other configuration is the same as that of FIG.

Here, the resistance value of the newly added resistor 22 is set to be sufficiently larger than the on-resistance value of the newly added transistor 23, and
The added transistor 23 is the transistor 13
Similarly, it is assumed that predetermined impurity ions are implanted into the channel region in advance at a predetermined dose such that the threshold value Vth is, for example, about −2 V.

In this configuration, when the battery voltage VBAT is supplied to the terminal 11, the gate is connected to the ground voltage GN.
The transistor 23 connected to the terminal 12 of D is turned on, and the voltage at the gate of the transistor 13 becomes VBAT.
Start to rise closer to. Here, transistor 2
Since the gate of the transistor 3 is connected to the terminal 12 of the ground voltage GND (0 V), when the gate voltage of the transistor 13 is higher than the ground voltage GND by the absolute value of the threshold value of the transistor 23, the transistor 23 is turned off. Turn off. That is, when the gate voltage of the transistor 13 exceeds about 2 V, the transistor 23 is turned off and the rise of the gate voltage of the transistor 13 stops, and this gate voltage becomes 2
V.

On the other hand, after the battery voltage VBAT is supplied to the terminal 11, the transistor 13 is also turned on and the voltage VLI
M begins to rise so that M approaches voltage VBAT. When the value of voltage VLIM becomes higher than the gate voltage of transistor 13 by the absolute value of the threshold, transistor 13 is turned off. Therefore, the battery voltage VB
Even if AT rises to 4V or more, the value of voltage VLIM is the sum of the absolute values of both thresholds of transistors 23 and 13
V. This voltage VLIM is supplied as a power supply voltage to the reference voltage generation circuit 14 and the comparator 21. Even if the voltage VBAT rises to 4 V or more, the reference voltage generation circuit 14 and the comparator 21 supply a power supply voltage of about 4 V ( VLIM). Here, the relationship between the voltages VBAT and VLIM is shown in the characteristic diagram of FIG.

In the circuit of the embodiment shown in FIG. 3, a current flows through the resistor 22 when the transistor 23 is turned on. However, the resistance value of the resistor 22 is set sufficiently higher than the ON resistance of the transistor 23,
2, the current consumed in the LSI internal circuit 15 is very small and hardly affects the current consumption characteristics of the LSI internal circuit 15.

In this embodiment, the same effects as those of the first embodiment can be obtained, and the voltage VDD is 2
Since the voltage is limited to the sum of the absolute values of the threshold values of the transistors 13 and 23, the voltage VLI as the power supply voltage supplied to the reference voltage generation circuit 14 and the comparator 21
The effect that the value of M can be set more freely is also obtained.

In the second embodiment, the circuit composed of the resistor 22 and the transistor 23 is formed as a one-stage circuit, and this circuit is connected in n stages. Can be limited to a value (n + 1) times the threshold value Vth. Further, by making the threshold value of each transistor different, the value of the voltage VLIM can be set variously.

Next, a third embodiment of the present invention will be described with reference to FIG.

In the second embodiment shown in FIG. 3, the case where the resistor 22 is connected as a constant current element between the gate of the transistor 13 and the terminal 12 has been described. However, in the third embodiment, A constant current source 24 is connected instead of the resistor 22 as a constant current element. The constant current source 24 is a constant current source in which a predetermined bias voltage is supplied to a gate and a predetermined current flows between a source and a drain in another circuit in the same LSI, for example, the reference voltage generating circuit 14 or the like. For the current source transistor,
The gate is constituted by a single transistor connected in common.

According to this embodiment, the same effects as in the embodiment of FIG. 3 can be obtained, and in addition, a single transistor is used instead of the resistor 22 occupying a large pattern area on an integrated circuit. Since the constant current source 24 is used, an effect that a smaller pattern area can be realized is obtained.

That is, as the resistor on the integrated circuit, a diffused resistor formed by diffusing an impurity of the opposite conductivity type to the impurity contained in the semiconductor substrate into the substrate is generally used.
Further, in order to reduce the current flowing through the diffusion resistor, it is necessary to increase the resistance value determined by the length / width of the pattern shape of the diffusion resistor. However, since the minimum width of the diffusion resistor is determined by a design rule, a resistor element having a long pattern is required to realize a large resistance value, thereby increasing the pattern area. However, according to the third embodiment, a transistor having a small pattern area is used instead of a resistor occupying a large pattern area on an LSI.
A smaller pattern area can be realized as compared with the embodiment shown in FIG.

FIG. 6 shows an example of a detailed circuit of the reference voltage generating circuit 14 used in each of the first to third embodiments. This circuit comprises a P-channel enhancement type MOS transistor 31 to 3 whose source is connected to a node to which the voltage VLIM is supplied.
3, N-channel enhancement-type MOS transistors 34 and 35 each having a source connected to a node to which ground voltage GND is supplied;
A resistor 36 connected between the drains 1 and 34
And the drain of the transistor 33 and the ground voltage GND
, And a resistor 37 connected between the node and the node to which is supplied.

Then, the gate and the drain of the transistor 32 are short-circuited and the transistor 31
33 are commonly connected, these three transistors 31 to 33 constitute a current mirror circuit, and the transistors 31 to 33 each function as a constant current source.

The gate of the transistor 34 is connected to the drain of the transistor 31 and the transistor 3
The gate of 5 is connected to the drain of transistor 34. The reference voltage VREF is obtained at a connection node between the drain of the transistor 33 and the resistor 37.

In this reference voltage generating circuit, the transistors 34 and 35 are operated in the weak inversion region. By inserting a resistor 36 between the gates of the transistors 34 and 35 in the path of the constant current flowing through the transistor 31, the gate bias voltages of the transistors 34 and 35 are made different, and a constant current is supplied to the transistor 33. This causes a constant voltage drop in the resistor 37 to obtain a constant reference voltage VREF.

FIG. 7 shows an example of a detailed circuit of the comparator 21 used in each of the first to third embodiments. This circuit includes a constant current source 41 having one end connected to a node to which the voltage VLIM is supplied,
42 and the other end of the constant current source 41, the respective sources are connected, and the gates are connected to the voltages VKEN, VR
Two P-channel enhancement-type MOS transistors 4 forming a differential pair to which EF is supplied, respectively.
3, an N-channel enhancement-type MOS transistor 45 having a drain and a source connected between the drain of the transistor 43 and the supply node of the ground voltage GND, and the drain of the transistor 44 and the ground voltage GND. N-channel enhancement-type MO with drain and source connected between the supply node and
An N-channel enhancement type MOS transistor having a drain and a source connected between the S transistor 46 and the other end of the constant current source 42 and the supply node of the ground voltage GND.
And a transistor 47.

Then, the gate and the drain of the transistor 46 are short-circuited, and the gates of the transistors 45 and 46 are commonly connected.
6 is a current mirror circuit, and transistor 4
5 and 46 each act as an active load. The gate of the transistor 47 is connected to a connection node between the drain of the transistor 43 and the drain of the transistor 45. Then, a signal voltage to be supplied to the gate of the transistor 17 is obtained from a connection node between the constant current source 42 and the transistor 47.

In the comparator having such a configuration,
The gate voltage of the transistor 47 changes according to the magnitude relationship between the voltages VKEN and VREF supplied to the gates of the enhancement-type MOS transistors 43 and 44 by the two P-channels forming the differential pair.
The voltage generated at the connection node with constant current source 42 changes according to the conduction state of.

[0049]

As described above, according to the present invention,
It is possible to provide a high-precision, low-cost constant voltage circuit by solving various conventional problems.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first embodiment of a constant voltage circuit according to the present invention.

FIG. 2 is a characteristic diagram of the circuit according to the embodiment of FIG. 1;

FIG. 3 is a circuit diagram of a constant voltage circuit according to a second embodiment of the present invention.

FIG. 4 is a characteristic diagram of the circuit according to the embodiment of FIG. 3;

FIG. 5 is a circuit diagram of a third embodiment of the constant voltage circuit according to the present invention.

FIG. 6 is a detailed circuit diagram of a reference voltage generation circuit used in the circuits of the first to third embodiments.

FIG. 7 is a detailed circuit diagram of a comparator used in the circuits of the first to third embodiments.

FIG. 8 is a circuit diagram of a conventional constant voltage circuit.

[Explanation of symbols]

11, 12 terminal, 13 channel N-channel depletion type MOS transistor, 14 reference voltage generating circuit, 15 internal LSI circuit, 16 power supply node of the internal LSI circuit, 17 voltage reduction P channel enhancement channel MOS transistors of 18, 19, resistors, 20: voltage dividing circuit, 21: comparator, 22: resistor, 23: N-channel depletion type MOS transistor, 24: constant current source.

Claims (4)

[Claims] 1. A depletion-type first depletion type in which one end of a current path between first and second terminals and a source and a drain is connected to the first terminal, and a gate is connected to the second terminal. A transistor; a reference voltage generation circuit that operates by a voltage generated between the other end of the current path of the first transistor and the second terminal to generate a reference voltage; and one end of a current path between a source and a drain Divides a voltage generated between a second transistor connected to the first terminal and the other end of the current path of the second transistor and the second terminal to generate a divided voltage. The circuit operates by a voltage generated between the other terminal of the current path of the first transistor and the second terminal, and is generated by the reference voltage generating circuit and the voltage dividing circuit. Divided voltage It compares the constant voltage circuit, characterized by comprising a comparator controlling the gate of the second transistor at its output. 2. A depletion-type first transistor having one end of a current path between a first and a second terminal and a source and a drain connected to the first terminal; A depletion-type second transistor having one end connected to the first terminal, the other end of the current path connected to the gate of the first transistor, and a gate connected to the second terminal; A constant current element connected between the gate of the first transistor and a connection node at the other end of the current path of the second transistor and the second terminal; and a second end of the current path of the first transistor; A reference voltage generating circuit which operates by a voltage generated between the second terminal and the reference voltage generating circuit and generates a reference voltage; and a third transistor having one end of a current path between a source and a drain connected to the first terminal. A voltage dividing circuit for dividing a voltage generated between the other end of the current path of the third transistor and the second terminal to generate a divided voltage; It operates by a voltage generated between the terminal and the second terminal, compares a reference voltage generated by the reference voltage generation circuit with a divided voltage generated by the voltage division circuit, and uses the output to output the third voltage. And a comparator for controlling the gate of the transistor. 3. The constant voltage circuit according to claim 2, wherein said constant current element is a resistor. 4. The constant voltage circuit according to claim 2, wherein said constant current element is a constant current source.