KR100682059B1 - Ultra low power limiter - Google Patents

Abstract

The present invention relates to an overvoltage protection circuit, comprising: a first switching unit formed of a plurality of semiconductor devices connected in series and sequentially turned on according to the magnitude of an input voltage from a rectifying device, and a pair of semiconductor devices having different current characteristics It is formed in series connection, it characterized in that it comprises at least a pair of second switching unit connected in parallel with the first switching unit. As a result, the leakage current can be minimized below the reference voltage and the leakage current can be maximized above the reference voltage, thereby preventing overvoltage from being supplied to the circuit above the reference voltage, and sufficient current below the reference voltage. May be provided as a circuit.

RFID, Limiter, n-Channel MOSFET, PNP Type BJT

Description

Ultra Low Power Overvoltage Protection Circuitry {ULTRA LOW POWER LIMITER}

1 is a partial circuit diagram of an RF tag,

2 is a circuit diagram of a limiter used for an RF tag according to a first embodiment of the present invention;

3 is a circuit diagram of a limiter used for an RF tag according to a second embodiment of the present invention;

4 is a circuit diagram of an overvoltage protection circuit according to a first embodiment of the present invention;

5 is a circuit diagram of an overvoltage protection circuit according to a second embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

10: limiter 20: regulator

30, 50: first switching part 40, 60: second switching part

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overvoltage protection circuit, and more particularly, to an overvoltage protection circuit such that leakage current is minimized below the reference voltage and leakage current rapidly increases above the reference voltage.

RFID stands for Radio Frequency IDentification, also called smart tag, and is a non-contact recognition system that transmits and processes information and surrounding environment information by radio frequency by attaching small chip to various items.

Basic elements of an RFID system include an antenna, a tag, and a reader, and the reader processes information by identifying a thin flat tag attached to an object. Among these RFID systems, low frequency radio frequency identification systems (30 kHz to 500 kHz) are used at short distances of less than 1.8 m, while high frequency systems (850 MHz to 950 MHz or 2.4 GHz to 2.5 GHz) are capable of transmitting at a distance of more than 27 m. It is possible.

RF tags, on the other hand, consist of a transponder chip and an antenna made of semiconductor, and are passive and active. Passive RF tags operate by receiving energy from the reader's radio signal without the need for an internal power supply, while actives have a built-in battery to operate on their own.

To receive data from the passive RF tag, the reader supplies power through an antenna, which provides the data in response to the power. As a method of supplying power from an antenna, a method using a magnetic field and a method using radio waves are mainly used. Inductive Coupling, which is a magnetic field method, generates a strong high frequency in an antenna to generate a magnetic field.The RF tag is operated by a current generated while the magnetic field passes through an antenna coil of an RF tag.As a propagation method, the Backscatter Coupling method propagates in an antenna. When you send, the RF tag is activated by receiving the radio wave from the RF tag and using it as power.

)와, RF 태그가 동작가능한 파워(

)는 다음의 수학식 1과 같은 관계를 갖는다. In the case of such a passive RF tag, the RF power reaching the RF tag is different depending on the distance between the antenna and the RF tag. That is, when the distance between the antenna and the RF tag is close, the RF power reaching the RF tag is increased. The RF power is larger than 1.5 to 5 V, which is the operating voltage of a general RF tag, so that the range of the voltage in which the circuit device operates stably is maintained. You get out. The distance between these antennas and the RF tag (

) And the power that the RF tag can operate

) Has the same relationship as in Equation 1 below.

는 안테나의 게인,

은 태그가 동작가능한 파워를 나타내며, G_R은 수신기 게인, P_T은 전송 파워, λ는 파워신호의 파장이다. 수학식 1에 따르면 안테나와 RF 태그와의 거리(

)는 태그가 동작가능한 파워(

)의 제곱근에 반비례함을 알 수 있다. Where η is the efficiency of the rectifier,

Is the gain of the antenna,

Is the power that the tag can operate, G _R is the receiver gain, P _T is the transmit power, and λ is the wavelength of the power signal. According to Equation 1, the distance between the antenna and the RF tag (

) Is the power that the tag can operate on (

Inversely proportional to the square root of

In order to prevent excessive voltage from being applied to the circuit elements of the RF tag, an overvoltage protection circuit, a limiter, is used.

1 is a partial circuit diagram of an RF tag. As shown, when RF power is provided from the antenna to the RF tag, the RF tag first converts the RF power into DC power using a diode D1 and a capacitor C1, and provides the DC power to the limiter 10. do.

2 is a circuit diagram of a limiter used for an RF tag according to a first embodiment of the prior art. As shown, the limiter 10 is connected to a plurality of semiconductor switching elements (M0, M1, M2, M4, M5) connected in series with the semiconductor switching elements (M0, M1, M2, M4, M5) in parallel. One semiconductor switching element M3 is included. Here, all the semiconductor switching elements are formed of n-channel MOSFFETs, and the parallel-connected MOSFET M3 receives a gate voltage from one of the serially-connected MOSFETs so that current between the source and drain flows.

In the limiter 10, the current is supplied to the regulator 20, which is a circuit element, as much as possible under the reference voltage for operating the circuit element of the RF tag, and the minimum current is provided to the regulator 20 at or above the reference voltage. . For example, in the circuit diagram of FIG. 2, it is assumed that 5 V is referred to as the reference voltage, and that the leakage current should be 100 nA or less below the reference voltage, and the leakage current should be 100 uA or more above the reference voltage. To satisfy this, all currents must be provided to the regulator when the voltage supplied from the rectifying element is 5V or less, and the current must be rapidly grounded when 5V or more.

However, as shown in the following Table 1, according to the actual operation results, it can be seen that the leakage current of 0.45uA flows at the reference voltage 5V. In other words, it can be seen that the leakage current flows in excess of 100uA above the reference voltage.

Input voltage (V) Leakage current 2.5 0.053nA 3.0 0.29nA 4.0 13.15nA 5.0 0.45uA 5.5 2.0uA 6.0 7.30uA

The reason why the leakage current does not increase rapidly above the reference voltage in the conventional limiter can be understood through Equation 2 below, which represents the current characteristics of the MOSFET.

는 MOSFET의 게이트-소스 간 입력되는 전압이고,

는 MOSFET을 턴온시키기 위해 소스에 제공되는 턴온전압이다. 즉, MOSFET의 전류특성(

)은 게이트-소스 간 전압(

)의 제곱에 비례함을 알 수 있다. 따라서, MOSFET의 턴온전압(

)이 일정한 상태에서, 게이트-소스 간 전압 (

)이 커질수록 누설전류의 증가폭이 커지기는 하나, 기준전압 이상에서 급격히 누설전류가 증가할 수는 없는 것이다. here,

Is the input voltage between gate and source of MOSFET,

Is the turn-on voltage provided to the source to turn on the MOSFET. That is, the current characteristics of the MOSFET

) Is the gate-to-source voltage (

Is proportional to the square of. Therefore, the turn-on voltage of the MOSFET

Is constant, the gate-to-source voltage (

As the) increases, the leakage current increases, but the leakage current cannot increase rapidly above the reference voltage.

3 is a circuit diagram of a limiter used for an RF tag according to a second exemplary embodiment. As shown, the limiter circuit is connected to a plurality of n-channel MOSFETs (MN0, MN1, MN2, MN4, MN5) connected in series and in parallel with the n-channel MOSFETs (MN0, MN1, MN2, MN4, MN5) connected in series. There are three pairs of n-channel MOSFETs (MN8, MN3) (MN9, MN6) (MN10, MN7). Here, the drain voltage of MN1 is input to the gate of MN10 to turn on MN10, and provides the current supplied from the rectifying element to MN7 at turn-on. The source voltage is input to the gate of MN7 when MN9 is turned on to turn on MN7. MN1 must be turned on to turn on MN9. Therefore, MN7 can be turned on only when MN1 is turned on. Similarly, MN6 connected in series with MN9 is turned on by receiving a source voltage of MN8 as a gate, and a source voltage of MN2 is provided to a gate of MN8 so that MN5 can be turned on only when MN3 is turned on. On the contrary, since the voltage from the rectifying element is directly input to the gate through MN0, MN1, MN2 and MN4, MN3 is turned on when the input voltage exceeds the turn-on voltage of MN3, similar to MN0.

In this limiter circuit, each of the MOSFETs MN0, MN1, MN2, MN4, and MN5 connected in series is turned on in accordance with an input voltage input from a rectifying element, and sequentially turned on until the input voltage reaches a preset reference voltage. Among the three pairs of MOSFETs (MN8, MN3) (MN9, MN6) (MN10, MN7) connected in parallel, MN10 turns on when MN0 turns on, and MN9 and MN7 turn on almost simultaneously when MN1 turns on, and MN6 turns on almost simultaneously when MN2 is turned on. The current is attenuated through each of the MOSFETs turned on.

Table 2 below shows the leakage current with respect to the input voltage in the limiter circuit of FIG.

Input voltage (V) Leakage current 2.5 10 uA 3.0 112uA 4.0 897uA 4.5 1.6 mA 5.0 2.4mA 5.5 3.4mA 6.0 4.5 mA

As shown in Table 2, when the input voltage is 5V or more, which is a reference voltage, a leakage current of more than 100 uA is generated, thereby providing excellent current characteristics. However, when the input voltage is less than the reference voltage, the leakage current should be 100nA or less.However, when the input voltage is 3V, the leakage current is 112uA, so excessive leakage current is generated and the current supplied to the regulator 20 is suddenly increased. There is a problem of being smaller.

Accordingly, by designing a limiter in which the leakage current is minimized below the reference voltage and the leakage current rapidly increases above the reference voltage, it is possible to prevent overvoltage from being supplied to the RF tag circuit above the reference voltage. Below the voltage, enough current must be provided to the regulator.

Accordingly, it is an object of the present invention to provide an overvoltage protection circuit in which the leakage current is minimized below the reference voltage, and the leakage current rapidly increases to the maximum above the reference voltage.

A configuration of the present invention for achieving this object, the first switching unit formed of a plurality of semiconductor devices are connected in series with each other and sequentially turned on according to the magnitude of the input voltage from the rectifying device; A pair of semiconductor devices having different current characteristics may be formed in series and include at least one pair of second switching units connected in parallel with the first switching unit.

The first switching unit may be formed of an n-channel MOSFET.

Preferably, the second switching unit is formed by connecting an n-channel MOSFET and a PNP type BJT in series.

Each of the second switching units is preferably connected in parallel to each other.

Each n-channel MOSFET of the second switching unit may receive a gate voltage from each n-channel MOSFET of the first switching unit.

Each n-channel MOSFET of the second switching unit may provide a voltage to the emitter of the PNP type BJT.

The semiconductor device may further include a plurality of n-channel MOSFETs connected in series with the n-channel MOSFETs of the second switching unit and receiving a gate voltage from the n-channel MOSFETs of the first switching unit.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

4 is a circuit diagram of an overvoltage protection circuit according to a first embodiment of the present invention. As illustrated, the overvoltage protection circuit includes a plurality of first switching units 30 connected in series, and a plurality of pairs of second switching units 40 connected in parallel with each other and also connected in parallel with the first switching unit 30. do.

Each first switching unit 30 (MMN1, MMN2, MMN4, MMN6, MMN8) is formed of an n-channel MOSFET, and each first switching unit 30 is connected to a gate and a drain to provide the same voltage. Therefore, each first switching unit 30 serves as a diode. The first switching unit 30 determines the number of first switching units 30 connected in series by a reference voltage as a reference for controlling leakage current and a turn-on voltage for turning on the first switching unit 30.

Each second switching unit 40 (MMN7, Q3) (MMN5, Q2) (MMN3, Q1) has one MOSFET (MMN7, MMN5, MMN3) and one BJT (Q3, Q2, Q1) connected in series. It is formed. Here, a gate voltage is provided from one of the first switching units 30 to the gate of each MOSFET of the second switching unit 40. For example, a gate voltage of MMN2 is provided to a gate of MMN3, a gate voltage of MMN4 is provided to a gate of MMN5, and a gate voltage from MMN6 is provided to a gate of MMN7. Therefore, since the second switching unit 40 uses the same gate voltage as that of the first switching unit 30, MMN2 is simultaneously turned on with MMN2, and MMN5, MMN4, MMN7, and MMN6 are simultaneously turned on for the same reason.

On the other hand, each BJT (Q3, Q2, Q1) of the second switching unit 40 is formed of a substrate PNP transistor. Q1, which is the BJT of the second switching unit 40, is turned on by receiving a drain voltage to the emitter when the MMN3 is turned on, Q2 is turned on in conjunction with the turn-on of MMN5, and Q3 is turned on in conjunction with the turn-on of MMN7.

)은 다음의 수학식 3으로 표현된다. Current characteristics of the BJT included in the second switching unit 40 of the overvoltage protection circuit (

) Is expressed by the following equation (3).

)에 지수함수적으로 변화함을 알 수 있다. 따라서, 지수함수의 특성상 턴온전압(

)과 입력전압을 조절하면 특정한 기준전압 이상에서 급격히 누설전류가 증가하도록 설계할 수 있다. Here, the current characteristic of the BJT is the base-emitter voltage (

It can be seen that it changes exponentially with). Therefore, the turn-on voltage (

) And the input voltage can be designed to rapidly increase the leakage current above a certain reference voltage.

The operation of the overvoltage protection circuit by such a configuration is described below when the input voltage below the reference voltage and the input voltage above the reference voltage are supplied.

First, when an input voltage less than the reference voltage is supplied, the number of the first switching units 30 turned on varies according to the input voltage. For example, assume that the reference voltage is 5V, the first switching unit 30 is five, and each first switching unit 30 has a turn-on voltage of 1V. If the input voltage is less than 1V, the input voltage is provided to the regulator in a state where no current leaks. If the input voltage is more than 1V and less than 2V, only the MMN1 of the first switching unit 30 is turned on. At this time, MMN3, MMN5, and MMN7 of the second switching unit 40 are not turned on because the input voltage is provided to the source, not the gate, even if the turn-on voltage is 1V or less.

If the input voltage is 2V or more, MMN2, MMN4, MMN6, and MMN8 are sequentially turned on as the input voltage increases. At this time, MMN3 is turned on at the same time as MMN2 is turned on, MMN5 is turned on at the same time as MMN4, and MMN7 is turned on at the same time MMN6 is turned on. When the MMN3, MMN5, and MMN7 are turned on, the BJTs Q1, Q2, and Q3, which receive emitter voltages from the MMN3, MMN5, and MMN7, are sequentially turned on in accordance with the turn-on of the MMN3, MMN5, and MMN7.

On the other hand, when the input voltage reaches the reference voltage of 5V, each MOSFET of the first switching unit 30 and each MOSFET and BJT of the second switching unit 40 is turned on, the input voltage input from the rectifying element is a first The leakage current rapidly increases while passing through all the transistors of the switching unit 30 and the second switching unit 40.

When the overvoltage protection circuit is designed according to this embodiment, the leakage current is shown in Table 3 according to the input voltage.

Input voltage (V) Leakage current 2.5 0.14nA 3.0 1.72nA 4.0 0.57 uA 5.0 85.9uA 5.5 410uA 6.0 1.10 mA

As shown in Table 3, the leakage current rapidly increases to 410 uA and 1.10 mA at 5 V and above, while the leakage current is very small at 0.14 nA, 1.72 nA, and 0.57 uA below 5 V. In particular, it can be seen that the leakage current up to 200 times as compared to the prior art disclosed in FIG. That is, this overvoltage protection circuit can be seen that it is possible to minimize the leakage current below the reference voltage, and to maximize the leakage current above the reference voltage, as intended in the general overvoltage protection circuit.

5 is a circuit diagram of an overvoltage protection circuit according to a second embodiment of the present invention, which is an overvoltage protection circuit used for a memory such as an EEPROM. In general, an EEPROM or the like requires an operating voltage of 15 to 20 V, and it is difficult to generate a sufficient leakage current with a conventional limiter alone. Accordingly, the charge pump limiter is used to keep the voltage input to the circuit element constant and to control the leakage current.

The charge pump limiter includes a first switching unit 50 formed by connecting a plurality of n-channel MOSFETs in series, and a plurality of first channels formed in parallel with the first switching unit 50 and composed of an n-channel MOSFET and a PNP type BJT. 2 includes a switching unit (60). Here, each MOSFET of the second switching unit 60 is turned on by receiving a gate voltage from each MOSFET of the first switching unit 50, and each BJT receives an emitter voltage from each MOSFET of the second switching unit 60. It is almost similar to the overvoltage protection circuit of FIG. 4 in that it is provided and turned on. However, the charge pump limiter is connected in series to each MOSFET of the second switching unit 60, and is inputted from the MOSFET of the first switching unit 50 which provides a gate voltage to each MOSFET of the second switching unit 60. A plurality of MOSFETs MMAT2, MMAT3, and MMAT4, which receive gate voltages from MOSFETs MMAT24 and MMAT6 disposed close to the voltage, are formed.

In the current consumption method of the second switching unit 60 of the charge pump limiter, the sum of the voltages applied to the MMAT26 and MMAT28 is equal to the sum of the voltages applied to the MMAT25 and Q4, and as the input voltage increases, the MMAT26 and MMAT28 The leakage current increases in proportion to the square of the gate-source voltage. In Q4, the leakage current increases exponentially with the base-emitter voltage. This behavior is almost similar for Q1, Q2 and Q3, resulting in an exponential increase in leakage current as the input voltage changes.

As described above, in the overvoltage protection circuit, the BJT is used instead of the existing MOSFET to increase the leakage current in the second switching unit 60, so that the leakage current is exponentially changed according to the current characteristics of the BJT. Accordingly, the leakage current can be minimized below the reference voltage and the leakage current can be maximized above the reference voltage, thereby preventing overvoltage from being supplied to the RF tag circuit above the reference voltage. Sufficient current can be provided to the regulator.

As described above, according to the present invention, the leakage current can be minimized below the reference voltage, and the leakage current can be maximized above the reference voltage.

Further, in the detailed description of the present invention, specific embodiments have been described, which should be taken as exemplary, and various modifications may be made without departing from the technical spirit of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be defined not only by the claims below, but also by the equivalents of the claims.

Claims (7)

A first switching unit formed of a plurality of semiconductor devices connected in series to each other and sequentially turned on according to a magnitude of an input voltage from the rectifying device; MOSFETs and BJTs having different current characteristics are formed in pairs in series, and include at least one pair of second switching units connected in parallel with the first switching unit. The method of claim 1, And the first switching unit is formed of an n-channel MOSFET. The method of claim 1, And said MOSFET is an n-channel MOSFET, and said BJT is a PNP type BJT. The method of claim 3, wherein And each of the second switching units is connected in parallel to each other. The method of claim 4, wherein Each n-channel MOSFET of the second switching unit receives a gate voltage from each of the n-channel MOSFET of the first switching unit. The method of claim 5, Each n-channel MOSFET of the second switching unit provides a voltage to the emitter of the PNP type BJT. The method according to any one of claims 1 to 6, And a plurality of n-channel MOSFETs connected in series with the MOSFETs of the second switching unit and receiving a gate voltage from the first switching unit.

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