JPH063405A - Measurement of semiconductor device contact - Google Patents

Measurement of semiconductor device contact

Info

Publication number
JPH063405A
JPH063405A JP4162506A JP16250692A JPH063405A JP H063405 A JPH063405 A JP H063405A JP 4162506 A JP4162506 A JP 4162506A JP 16250692 A JP16250692 A JP 16250692A JP H063405 A JPH063405 A JP H063405A
Authority
JP
Japan
Prior art keywords
semiconductor device
terminal
contact
tester
terminals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4162506A
Other languages
Japanese (ja)
Inventor
Kazuhiko Shiina
一彦 椎名
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP4162506A priority Critical patent/JPH063405A/en
Publication of JPH063405A publication Critical patent/JPH063405A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

PURPOSE:To measure the contacting state of a semiconductor device in shorter time by rapidly measuring numerous terminals at a single measurement. CONSTITUTION:A power source terminal and a GND terminal of a semiconductor device 1 are connected to a power source part 3 and a GND terminal 4, respectively, of an automatic examination system 2. The terminals to be measured of the semiconductor device 1 are connected to the load circuit of the automatic examination system 2 in parallel, and in addition, comparator circuits 15 and 16 far comparing voltage values at respective terminals being measured with each other are connected in series, for examining semiconductor devices.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、汎用LSI(IC)自
動検査システム(以降テスターと呼ぶ)と半導体デバイ
スが電気的に接続されているか検査する半導体デバイス
のコンタクト測定方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a general-purpose LSI (IC) automatic inspection system (hereinafter referred to as a tester) and a semiconductor device contact measuring method for inspecting whether a semiconductor device is electrically connected.

【0002】[0002]

【従来の技術】従来より、半導体デバイスのコンタクト
測定(テスターと半導体デバイスの内部回路との電気的
接続の確認を行う)は、テスターを使用して検査してい
る。
2. Description of the Related Art Conventionally, contact measurement of a semiconductor device (confirming electrical connection between a tester and an internal circuit of the semiconductor device) is conducted by using a tester.

【0003】図2は従来の半導体デバイスのコンタクト
測定の方法のための回路図であり、1は半導体デバイ
ス、2はテスター、3はテスター2の電源部、4はテス
ター2のGND、5はテスター2の定電流源、6はテス
ター2の電圧計である。例えば、半導体デバイス1のA
端子を測定する場合は、半導体デバイス1の電源端子V
DDにテスター2から半導体デバイス1に供給される電源
部3を接続し、半導体デバイス1のGND端子VSSにテ
スター2のGND(接地)4を接続し、半導体デバイス
1のA端子にテスター2の定電流源5を直列に接続し、
そして定電流源5と並列接続した電圧計6とから構成さ
れている。
FIG. 2 shows a contact of a conventional semiconductor device.
1 is a circuit diagram for a measuring method, 1 is a semiconductor device
Su, 2 is a tester, 3 is a power source of the tester 2, 4 is a test
2 of GND, 5 is a constant current source of tester 2, 6 is a test
It is the voltmeter of the target 2. For example, A of the semiconductor device 1
When measuring the terminals, the power supply terminal V of the semiconductor device 1
DDPower supplied from the tester 2 to the semiconductor device 1
GND part V of the semiconductor device 1 by connecting the part 3SSTe
Connect the GND (ground) 4 of the star 2 to a semiconductor device
Connect the constant current source 5 of the tester 2 to the A terminal of 1 in series,
It consists of a constant current source 5 and a voltmeter 6 connected in parallel.
Has been.

【0004】以下に、その動作について説明する。半導
体デバイス1の入、出力端子の内部の等価回路は図3の
ように、保護抵抗7、保護ダイオード8,9から構成さ
れている。10は半導体デバイス内部である。
The operation will be described below. As shown in FIG. 3, an equivalent circuit inside the input and output terminals of the semiconductor device 1 is composed of a protection resistor 7 and protection diodes 8 and 9. 10 is the inside of the semiconductor device.

【0005】まず、テスター2から半導体デバイス1に
供給される電源部3にφ(V)を加え、定電流源5から
半導体デバイス1に流れ込む方向に電流を流す。したが
って、コンタクトが正常であれば、定電流源5からA端
子を通して、保護抵抗7、保護ダイオード8、電源部3
に電流が流れ、接点Gの電圧がほぼPN接合部の正の順
方向電圧(ビルトイン電圧)になる。また逆に定電流源
5に半導体デバイス1から流れ出す方向に電流を流す
と、GND4から保護ダイオード9、保護抵抗7、A端
子を通して、定電流源5に電流が流れ、接点Gの電圧が
ほぼ負の順方向電圧となる。しかし、コンタクトが異常
(断線)であれば、接点Gの電圧は、定電流源5からみ
た抵抗が無限大であるため、無限大の電圧となる。した
がって、接点Gの電圧を測定することでコンタクト測定
の良否の判定を行うことができる。
First, φ (V) is applied to the power supply section 3 supplied from the tester 2 to the semiconductor device 1, and a current is caused to flow from the constant current source 5 to the semiconductor device 1. Therefore, if the contact is normal, the protection resistor 7, the protection diode 8, the power supply unit 3 are passed from the constant current source 5 through the A terminal.
An electric current flows through the contact point G, and the voltage at the contact point G becomes almost the positive forward voltage (built-in voltage) of the PN junction. On the contrary, when a current is made to flow from the semiconductor device 1 to the constant current source 5, a current flows from the GND 4 to the constant current source 5 through the protection diode 9, the protection resistor 7 and the A terminal, and the voltage at the contact G is almost negative. Forward voltage. However, if the contact is abnormal (disconnected), the voltage at the contact G is infinite because the resistance seen from the constant current source 5 is infinite. Therefore, by measuring the voltage of the contact G, it is possible to determine whether the contact measurement is good or bad.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、上記従
来の構成では、テスター内部の測定器(定電流源、電圧
計)がテスター内部に1ユニットしかないような時は、
1端子毎に接続しなければならず、近年、多ピン化が進
む中、多数の端子を測定するのに時間がかかってしまう
という問題があった。
However, in the above-mentioned conventional configuration, when the measuring instrument (constant current source, voltmeter) inside the tester has only one unit inside the tester,
Since it has to be connected to each terminal, there has been a problem that it takes time to measure a large number of terminals as the number of pins increases in recent years.

【0007】本発明は上記従来の課題を解決するもの
で、1回の測定で多数の端子を高速に測定することによ
って、測定の時間を短縮した半導体デバイスのコンタク
ト測定方法を提供することを目的とする。
The present invention solves the above-mentioned conventional problems, and an object of the present invention is to provide a contact measuring method for a semiconductor device, which shortens the measurement time by measuring a large number of terminals at a high speed in one measurement. And

【0008】[0008]

【課題を解決するための手段】この目的を達成するため
に本発明の半導体デバイスのコンタクト測定方法は、各
被測定端子に、負荷回路を並列に接続し、各測定端子の
電圧値を比較するコンパレータ回路を直列に接続して検
査する構成よりなる。
In order to achieve this object, a semiconductor device contact measuring method according to the present invention comprises connecting a load circuit in parallel to each terminal to be measured and comparing the voltage values at the respective measuring terminals. The comparator circuit is connected in series and inspected.

【0009】[0009]

【作用】この構成によって、テスター内部の負荷回路お
よびコンパレータ回路は各端子にそれぞれ装備してお
り、テスター側のソフトウェアによる負荷、又はハード
ウェアによる負荷を接続し、さらにコンパレータリレー
の開閉を行えば、一度に多数の端子を測定することがで
きる。
With this configuration, the load circuit and the comparator circuit inside the tester are equipped at each terminal respectively, and if the load by the software on the tester side or the load by the hardware is connected and the comparator relay is opened and closed, Many terminals can be measured at one time.

【0010】[0010]

【実施例】以下、本発明の一実施例について、図面を参
照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0011】図1は本発明の一実施例における半導体デ
バイスのコンタクト測定方法のための回路図を示すもの
である。図1において図2の従来例と同一部分には同一
番号を付し、その番号の説明は省略する。
FIG. 1 shows a circuit diagram for a contact measuring method of a semiconductor device according to an embodiment of the present invention. In FIG. 1, the same parts as those in the conventional example of FIG. 2 are denoted by the same reference numerals, and the description of the numbers will be omitted.

【0012】例えば従来例と同じように半導体デバイス
1のA端子を測定する場合、半導体デバイス1の電源端
子VDDにテスターから半導体デバイス1に供給される電
源部3を接続し、半導体デバイス1のGND端子VSS
テスターのGND4を接続する。これらは、従来例の構
成と同じであるが、本発明の特徴は、半導体デバイス1
のA端子に、テスター2内部の負荷回路を接続するリレ
ー11を通じて、直列に負荷抵抗12、電源13が接続
され、又、コンパレータリレー14を通じて、比較電圧
15を持ったコンパレータ16が接続されていることで
ある。
For example, when measuring the A terminal of the semiconductor device 1 as in the conventional example, the power supply unit 3 supplied from the tester to the semiconductor device 1 is connected to the power supply terminal V DD of the semiconductor device 1, and The GND4 of the tester is connected to the GND terminal V SS . These are the same as the configuration of the conventional example, but the feature of the present invention is that the semiconductor device 1
A load resistor 12 and a power supply 13 are connected in series to the A terminal of the relay through the load circuit inside the tester 2, and a comparator 16 having a comparison voltage 15 is connected through the comparator relay 14. That is.

【0013】以上のように構成された本実施例の半導体
デバイスのコンタクト測定方法について、以下その動作
を説明する。
The operation of the contact measuring method for the semiconductor device of the present embodiment having the above-described structure will be described below.

【0014】まず、図1の半導体デバイス1にテスター
2から半導体デバイス1に供給される電源部3にφ
(V)を加え、テスター2の内部の負荷回路を接続する
リレー11とコンパレータリレー14をONにして、電
源13から正の電圧を印加すると、従来例の図3でも述
べたように、通常各端子には、等価的に保護抵抗7、保
護ダイオード8,9を持っているため、コンタクトが正
常であれば、電源13→負荷抵抗12→A端子→保護抵
抗7→保護ダイオード8→電源部3に電流が流れる。し
たがって、接点Gの電位は、ほぼPN接合部の正の順方
向電圧(ビルトイン電圧)となる。
First, in the semiconductor device 1 shown in FIG.
When (V) is applied, the relay 11 connecting the load circuit inside the tester 2 and the comparator relay 14 are turned on, and a positive voltage is applied from the power source 13, as shown in FIG. Since the terminal has the protective resistance 7 and the protective diodes 8 and 9 equivalently, if the contact is normal, the power supply 13 → the load resistance 12 → the A terminal → the protective resistance 7 → the protective diode 8 → the power supply section 3 Current flows through. Therefore, the potential of the contact point G becomes almost the positive forward voltage (built-in voltage) of the PN junction.

【0015】しかし、コンタクトに断線等異常があれ
ば、接点Gの電位は、電源13とほぼ同じ電位となる。
したがって、コンパレータ16により、A端子の電位を
コンパレータ16の比較電圧15と比較することで良否
の判定を行うことができる。又、逆に電源13から負の
電圧を印加すれば、GND4→保護ダイオード9→保護
抵抗7→A端子→負荷抵抗12→電源13に電流が流
れ、反対側の保護ダイオードも測定することができる
(通常は、保護ダイオード8,9のどちらか一方を測定
すれば十分である。)。
However, if the contact has an abnormality such as disconnection, the potential of the contact G becomes substantially the same as that of the power source 13.
Therefore, the comparator 16 can determine the quality by comparing the potential of the A terminal with the comparison voltage 15 of the comparator 16. On the contrary, if a negative voltage is applied from the power supply 13, a current flows through GND4 → protection diode 9 → protection resistance 7 → A terminal → load resistance 12 → power supply 13, and the protection diode on the opposite side can also be measured. (Usually, it is sufficient to measure only one of the protection diodes 8 and 9.).

【0016】以上のように本実施例によれば、テスター
2の内部の負荷回路(電源13、負荷抵抗12)および
コンパレータ回路(コンパレータ16、比較電圧15)
を使用したことにより、半導体デバイス1の各端子に同
時に接続できるため、1回の試験で高速かつ多数のコン
タクト測定を行うことができる。
As described above, according to this embodiment, the load circuit (power supply 13 and load resistance 12) inside the tester 2 and the comparator circuit (comparator 16 and comparison voltage 15) are included.
Since it is possible to simultaneously connect to each terminal of the semiconductor device 1 by using, it is possible to perform high-speed and large number of contact measurements in one test.

【0017】[0017]

【発明の効果】本発明は各被測定端子に負荷回路を並列
に、コンパレータ回路を直列に接続して検査する構成に
よるので、一度に多数の端子を高速に測定できる優れた
半導体デバイスのコンタクト測定方法を提供できる。
Since the present invention has a configuration in which a load circuit is connected in parallel to each terminal to be measured and a comparator circuit is connected in series, an excellent semiconductor device contact measurement capable of measuring a large number of terminals at a high speed at a high speed is provided. A method can be provided.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例における半導体デバイスのコ
ンタクト測定方法を示す回路図
FIG. 1 is a circuit diagram showing a contact measuring method for a semiconductor device according to an embodiment of the present invention.

【図2】従来の半導体デバイスのコンタクト測定方法を
示す回路図
FIG. 2 is a circuit diagram showing a conventional contact measuring method for semiconductor devices.

【図3】一般の半導体デバイスの各端子内部の等価回路
FIG. 3 is an equivalent circuit diagram inside each terminal of a general semiconductor device.

【符号の説明】[Explanation of symbols]

1 半導体デバイス 2 テスター(自動検査システム) 3 電源部 4 GND(GND端子) 11 負荷回路リレー 12 負荷抵抗 13 電源 14 コンパレータリレー 15 比較電圧 16 コンパレータ 1 Semiconductor Device 2 Tester (Automatic Inspection System) 3 Power Supply Section 4 GND (GND Terminal) 11 Load Circuit Relay 12 Load Resistance 13 Power Supply 14 Comparator Relay 15 Comparison Voltage 16 Comparator

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】半導体デバイスの電源端子およびGND端
子に、自動検査システムの電源部およびGND端子をそ
れぞれ接続し、前記半導体デバイスの各被測定端子に前
記自動検査システムの負荷回路を並列に接続し、前記各
被測定端子の電圧値を比較するコンパレータ回路を直列
に接続して前記半導体デバイスを検査することを特徴と
する半導体デバイスのコンタクト測定方法。
1. A power supply terminal and a GND terminal of a semiconductor device are respectively connected to a power supply section and a GND terminal of an automatic inspection system, and a load circuit of the automatic inspection system is connected in parallel to each measured terminal of the semiconductor device. A method for measuring contact of a semiconductor device, comprising connecting a comparator circuit for comparing voltage values of the terminals to be measured in series to inspect the semiconductor device.
JP4162506A 1992-06-22 1992-06-22 Measurement of semiconductor device contact Pending JPH063405A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4162506A JPH063405A (en) 1992-06-22 1992-06-22 Measurement of semiconductor device contact

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4162506A JPH063405A (en) 1992-06-22 1992-06-22 Measurement of semiconductor device contact

Publications (1)

Publication Number Publication Date
JPH063405A true JPH063405A (en) 1994-01-11

Family

ID=15755919

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4162506A Pending JPH063405A (en) 1992-06-22 1992-06-22 Measurement of semiconductor device contact

Country Status (1)

Country Link
JP (1) JPH063405A (en)

Similar Documents

Publication Publication Date Title
US5818251A (en) Apparatus and method for testing the connections between an integrated circuit and a printed circuit board
US7075307B1 (en) Method and apparatus for detecting shorts on inaccessible pins using capacitive measurements
US4720671A (en) Semiconductor device testing device
JPH01112179A (en) Circuit board inspection instrument
JPH08271565A (en) Method for inspecting connecting state of power supply apparatus and power supply apparatus using method thereof
US5101152A (en) Integrated circuit transfer test device system utilizing lateral transistors
US6531885B1 (en) Method and apparatus for testing supply connections
JPH063405A (en) Measurement of semiconductor device contact
KR100231649B1 (en) A test board having a capacitor charging circuit and a test method using the test board
JPH1138079A (en) Testing method for ball grid array type integrated circuit
JPS6371669A (en) Inspecting method for electronic circuit device
Vinnakota Deep submicron defect detection with the energy consumption ratio
EP1107013B1 (en) A method and an apparatus for testing supply connections
JPH0541419A (en) Estimation method of test equipment
JP2963234B2 (en) High-speed device test method
JP2591453B2 (en) Burn-in board inspection apparatus and burn-in board inspection method
JPH10300823A (en) Prober inspection method
JPH11295385A (en) Apparatus for verifying contact of electronic circuit element
JPH08105933A (en) Semiconductor device testing method
EP1089082A1 (en) A method and apparatus for testing supply connections
JP2003255007A (en) Method and apparatus for verifying circuit wiring
JPH05264676A (en) Method and device for detecting fault
JP2007064645A (en) Semi-conductor inspection method
JPH0829472A (en) Method for checking conformity of signal line
JPH0326973A (en) Method for inspecting integrated circuit inspecting apparatus