JPH06332663A - High speed display device - Google Patents

Abstract

PURPOSE:To positively use a high transfer speed of a network, and to execute a high speed data display by providing a dedicated I/F and executing directly write in a frame memory from the network. CONSTITUTION:A frame memory 4 expands and stores data to be displayed. A communication I/F 7 executes a data communication with a network 10, and a dedicated I/F 8 is a dedicated I/F for transferring and writing directly data from the communication I/F 7 in the frame memory 4. A switch 3 executes switching so as to write the data from the dedicated I/F 8 in the frame memory 4. That is, when the communication I/F 7 receives the data from the network 10, the dedicated I/F 8 writes directly the received data in the frame memory 4, and displays data read out serially from the frame memory 4 on a display 6. By doing this, while positively using a high communication speed of the network 10, the data subjected to communication can be displayed at a high speed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high speed display device for displaying transferred data at high speed.

In a computer system provided with a communication interface (communication I / F), it is desired to display the communicated data at high speed while making the most of the high communication speed.

[0003]

2. Description of the Related Art Generally, a computer system is shown in FIG.
As shown in the configuration (1), a display-only memory called a frame memory 23 for the purpose of displaying information, and a communication buffer 24 for smooth communication with the network are provided. The data input from the network is the communication buffer 24 → system bus 27 → main memory 2
The route 2 → frame memory 23 is followed, and finally converted into a serial video signal and displayed as an image on the display.

Due to the rapid development of communication technology in recent years, the communication speed has been improved to an extent not comparable to that before. For this reason, the types of media (information) to be handled have been increasing, and finally video data has come to be handled, and it is required to improve the display speed of information. The configuration and operation of FIG. 7 will be briefly described below.

FIG. 7 shows an explanatory view of the prior art. In FIG. 7, a CPU 21 is a processor, and is a main memory 2
Various processes according to the program stored in 2, here,
The data stored in the communication buffer 24 is taken out according to the application program and stored in the main memory 22, the data stored in the main memory 22 is edited, or the data is read from the main memory 22 and expanded and written in the frame memory 23. It is something to be displayed with.

The main memory 22 stores programs and data (image data etc.). Frame memory 2
Reference numeral 3 is for expanding and storing the data to be displayed.

The communication buffer 24 is a buffer for temporarily storing data for communication with the network.
The D / A 25 converts the digital signal read from the frame memory 23 into an analog signal (video signal),
It is supplied to a display and displayed.

The communication I / F 26 is an interface for transmitting and receiving data to and from the network.
The system bus 27 is a bus for connecting the CPU 21, the main memory 22, the frame memory 23, and the communication buffer 24 to exchange data.

[0009]

Under the conventional structure shown in FIG. 7, even if the communication speed is increased, it is necessary to go through the network → communication buffer 24 → main memory 22 → frame memory 23. It is necessary to transfer data to each other via the system bus 27, and even if the high communication speed of a network is realized, the display on the display is delayed at the receiving end, and the system bus 27 is There was a problem that it could not be displayed at high speed because it was kept waiting while being used by the application. Therefore, smooth reproduction and display cannot be performed with time-series information such as real-time video data. Moreover, it is not possible to simultaneously display a plurality of video data at high speed.

The present invention solves these problems.
The purpose is to provide a dedicated I / F and write directly to the frame memory from the network to realize high-speed data display utilizing the high transfer rate of the network.

[0011]

Means for solving the problems will be described with reference to FIGS. 1 and 4. FIG. 1 and 4, the frame memory 1 is a memory that expands and stores data to be displayed.

The communication I / F 7 is for performing data communication with the network. Dedicated I / F8 is communication I
A dedicated I / F for directly transferring and writing the data from the / F7 to the frame memory 4.

The switch 3 switches so that the data from the dedicated I / F 8 is written in an arbitrary frame memory 4. The distribution control 31 is for distributing the data from the plurality of communication I / Fs 7 to the corresponding frame memory 4 and writing the data directly.

[0014]

In the present invention, as shown in FIG. 1 and FIG. 4, the communication I / F 7 receives data from the network 10, and the dedicated I / F 8 writes the received data directly to the frame memory 4, The data serially read from the memory 4 is displayed on the display 6.

Further, the communication I / F 7 receives data from the network 10, the dedicated I / F 8 inputs the received data to the switch 3, and the switch 3 switches to one of the plurality of frame memories 4 to transfer the data. The data input and directly written, and the data serially read from the frame memory 4 are combined and displayed on the display 6.

Further, when the plurality of communication I / Fs 7 respectively receive the data, the data received by the respective dedicated I / Fs 8 are input to the distribution control 31, and the distribution control 31 is set to 1 of the plurality of frame memories 4. One or more of them are directly written, and the data serially read from the frame memory 4 are combined and displayed on the display 6.

The communication I / F 7 receives data from the network 10, the dedicated I / F 8 directly writes the received data in the frame memory 4, retrieves the data from the frame memory 4 and uses it as a communication buffer. I am trying.

Therefore, by providing the dedicated I / F 8 and writing data directly from the network 10 to the frame memory 4, it becomes possible to realize high-speed data display utilizing the high-speed transfer speed of the network 10.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the construction and operation of an embodiment of the present invention will be described in detail with reference to FIGS.

FIG. 1 is a block diagram showing the principle of the present invention. Figure 1
In the above, the CPU 1 is a processor, and the main memory 2
Various controls are performed according to the program stored in.

The main memory 2 is a memory for storing programs and data. The switch 3 relates to the present invention and is for taking in data from the system bus 9 or the dedicated I / F 8 and writing it in the frame memory 4.

The frame memory 4 is a memory for expanding and writing data, reading the data serially, and displaying an image on the display 6. The D / A 5 is for converting a digital signal into an analog signal, and is for converting a digital image signal read from the frame memory 4 into an analog image signal (video signal).

The display 6 displays the video signal converted into the analog image signal by the D / A 5 on the screen. The communication I / F 7 is the network 10
The data communication is performed between and.

The dedicated I / F 8 is a dedicated I / F according to the present invention for directly writing the data received by the communication I / F 7 from the network 10 to the frame memory 4 via the switch 3.

The system bus 9 includes a CPU 1, a main memory 2,
It is a bus for exchanging data with the switch 3 and the communication I / F 8. The network 10
It is a network for exchanging data with other computer systems via the communication I / F 7.

Next, the operation of the configuration of FIG. 1 will be described in detail in the order shown in the flowchart of FIG. In FIG. 2, in S1, the transmission source tries to start transmission of image data to the reception destination.

In S2, the communication application of the transmission source is activated.
S3 communicates transfer information (data type, size). This is the type (here, the image data of FIG. 4) and size (here, one line of FIG. 4) of the data to be transmitted from the communication application of the transmission source activated in S2 to the communication application of the reception destination. 640 bytes) is transmitted via the network 10.

In step S4, it is determined whether the receiving destination can directly write in the frame memory 4 by determining the type. This is S3
The destination receiving the transfer information (type, size) determines the data type and determines whether the data can be directly written in the frame memory 4 or image data, for example. YE
In the case of S, the processes of S5 to S9 according to the present invention are performed. On the other hand, in the case of NO, it is determined that the image data is not directly written in the frame memory 4, so S11
To write to main memory 2, and to process and transfer in S12,
finish.

In step S5, if YES in step S4, the frame memory 4
Since it was found that the data was of a type to be written directly to, distribution control is performed. This distribution control is performed by the switch 3 in FIG.
The distribution control 31 of FIG. 5, the distribution control 31 of FIG. 5, and the switch 3 of FIG. 6 control so as to distribute and write to the corresponding frame memory 4.

In S6, the transmission source transfers the data.
For example, the image data for one frame shown in (a) of FIG. 3 is divided into lines for one line as shown in (b) of FIG. The sender sends the record in the form of a footer to the recipient's network 1
Transfer (send) via 0.

In step S7, the communication I / F 7 of the receiving side that has received the data transferred in step S6 passes it to the switch 3 of FIG. 1 via the dedicated I / F 8, and the switch 3 corresponds to the frame memory 4. Write the data directly to the line number position. These operations are repeated until the final line of one frame. Here, writing to the frame memory 4 is performed by searching for an empty space, and writing to a fixed memory. That is, the data is written to an empty frame memory 4 among the plurality of frame memories (1) 4 to the frame memory (n) 4, or the data is written to a fixed frame memory 4 designated in advance.

In S8, the transmission source notifies the reception destination that the data transfer is completed. In step S9, the receiving destination that has received the data transfer end notified in step S8 serially reads the data for one frame written in the frame memory 4, and outputs the D / A5.
The video signal converted into an analog signal by is input to the display 6, and the transferred image is displayed on the screen.

From the above, the transmission source determines the transfer information (type,
Size) is transferred to the receiving destination, and then the image data for one frame is sectioned line by line and sequentially transferred, and the communication I / F 7 which received this is input to the switch 3 via the dedicated I / F 8. The switch 3 directly writes the received data in the corresponding position of the frame memory 4 directly. At the end of writing (or in parallel while writing),
The digital signal serially read from the frame memory 4 is converted into an analog video signal, and the display 6
Display on top. As a result, from the transmission source to the network 1
The data transferred to the receiver via 0 is directly written to the frame memory 4 via the dedicated I / F 8 and the switch 3, read out from the frame memory 4 and displayed on the display 6, and the network of high speed transfer is possible. By utilizing the characteristics, it becomes possible to display the data received from the network on the display 6 at high speed in real time.

FIG. 3 shows a transfer data explanatory diagram of the present invention. FIG. 3A shows an example of transfer data. This is 1
It is an example of transfer data when transmitting image data for a frame from a transmission source to a reception destination. As shown in the figure, this transfer data is composed of 640 dots as one line in the horizontal direction and 480 lines in the vertical direction. This transfer data is sequentially transferred line by line.

FIG. 3B shows an example of the data structure at each transfer. Transfer data consists of: -Header-Line number-Data for one line-Footer. This transfer data is 480 pieces for one frame as shown in the figure.

As described above, the image data for one frame is made into each record of FIG. 3B and transferred from the transmission source to the reception destination via the network 10. At the receiving end, the line number is taken out from the record received via the communication I / F 7, the dedicated I / F 8 and the switch 3 and directly written in the position of the corresponding line number in the frame memory 4. As a result, the record transferred from the transmission source can be directly written to the corresponding position in the reception destination frame memory, and the reception destination can write the frame memory 4 in real time in accordance with the high transfer rate of the network 10. It becomes possible to display.

FIG. 4 shows a block diagram of an embodiment of the present invention.
This is provided as n frame memories (1) 4 to (n) 4 as the frame memory 4 of FIG.
Distribution control 31 is provided instead of switch 3
One frame memory 4 is written or a plurality of designated frame memories 4 are simultaneously written (copy function). Here, CPU1, main memory 2, D
The / A5, the display 6, the communication I / F 7, and the system bus 9 are the same as those having the same numbers in FIG.

In FIG. 4, the distribution control 31 is a dedicated I / O.
One of the plurality of frame memories (1) 4 to (n) 4 receives the data input from F8.
The data is distributed so that one or a plurality of data can be simultaneously written.

The frame memories (1) 4 to (n) 4 are memories for expanding and writing the data to be displayed on the display. The multiplexing unit 11 synthesizes the digital signals read from the frame memories (n) 4 from the plurality of frame memories (1) 4. The digital signal after this synthesis is D / A
An analog signal (video signal) is converted by 5 and displayed on the display 6.

Next, the operation will be described. (1) Data communication I / F 7 via network A
When it is received, the input is input to the distribution control 31 via the dedicated I / F 8.

(2) The distribution control 31 includes one or a plurality of frame memories 4 designated in advance among the frame memories (1) 4 to (n) 4, or one or a plurality designated by data. The input data is supplied to the frame memory 4 and written directly.

(3) After writing the data to the frame memory 4 in (2) (or in parallel with writing), the frame memory (1) 4 to the frame memory (n) 4 all at once or the designated frame memory The serial digital data read from only 4 is combined by the multiplexing unit 11, and the combined digital data is A / D.
It is converted into an analog signal (video signal) by 5 and displayed on the display 6.

As described above, the plurality of frame memories (1) 4 to (n) 4 are provided so that one or more data can be written by the distribution control 31, and the data received from the network 10 can be written in the dedicated I. Input to the distribution control 31 via / F8, and directly write from the frame memory (1) 4 to one or more designated ones of the frame memories (n) 4 simultaneously.
Display 6 combines the data read from these
It is possible to display at high speed on the top, and by utilizing the high-speed transferability of the network 10, it is possible to write data directly to the frame memory 4 at the receiving end and display at high speed.

FIG. 5 is a configuration diagram (1) of another embodiment of the present invention. This is different from FIG. 4 in that communication I / Fs 7 for transmitting / receiving data to / from a plurality of networks are provided, and dedicated I / Fs 8 are provided between the communication I / F 7 and the distribution control 31. This is an example. here,
The CPU 1, main memory 2, D / A 5, display 6, multiplexing unit 11, frame memory (1) 4 to frame memory (n) are the same as those of the same numbers in FIG.

In FIG. 5, the distribution control 31 controls the data input from the plurality of dedicated I / Fs 8 to any one or a plurality of the plurality of frame memories (1) 4 to (n) 4. The data is distributed so as to be written at the same time.

The dedicated I / F 8 is a dedicated I / F for transferring the data received by each communication I / F 7 to the distribution control 31.
Is. Next, the operation will be described.

(1) Data I / F from network A to network N via network N (1) 7 to communication I / F
(N) When each is received, each dedicated I / F
Distribution control 31 from (1) 8 via dedicated I / F (n) 8
To enter.

(2) The distribution control 31 stores the data from the dedicated I / F (1) 8 to the dedicated I / F (N) 8 in the frame memory (1) 4 to the frame memory (n) 4. The input data is supplied to and directly written to one or a plurality of frame memories designated in advance or one or a plurality of frame memories designated by data.

(3) After writing the data to the frame memory 4 in (2) (or in parallel with writing), the frame memory (1) 4 to the frame memory (n) 4 all at once or the designated frame memory The serial digital data read from only 4 is combined by the multiplexing unit 11, and the combined digital data is A / D.
It is converted into an analog signal (video signal) by 5 and displayed on the display 6.

As described above, the plurality of frame memories (1) 4 to (n) 4 are provided so that data can be written to one or more by the distribution control 31, and communication I / O can be performed from a plurality of networks.
It is configured to input the respective data to the distribution control 31 via the F7 and the dedicated I / F8, and input the data received from the plurality of networks 10 to the distribution control 31 via the respective dedicated I / F8. The frame memory (1) 4 to the frame memory (n) 4 can be directly written to one or more designated frame memories at the same time, and the data read from these can be combined to be displayed on the display 6 at high speed. By utilizing the high-speed transfer property of 10, it becomes possible to directly write data in the frame memory 4 and display at high speed at the receiving end.

FIG. 6 is a configuration diagram (2) of another embodiment of the present invention. This is the frame memory 4 of FIG.
It is configured such that n pieces of the frame memories (1) to (n) are provided and are written in any one of the frame memories 4 by the switch 3. Where CP
U1, main memory 2, D / A 5, display 6, communication I /
The F7 and system bus 9 are the same as those having the same numbers in FIG.

In FIG. 6, the switch 3 is a dedicated I / F.
Either the data input from 8 or the data from the system bus 9 is written to the frame memory (n) 4, or the data read from the frame memory (n) 4 is sent to the system bus 9 or the dedicated I / F 8. It is to switch.

The frame memory (1) 4 to the frame memory (n) 4 are used to expand and display data and to use as a buffer for temporarily storing data. Here, the frame memory (n) 4 expands and stores the data, or temporarily stores the data and uses it instead of the communication buffer (similarly,
The arbitrary frame memory 4 shown in FIGS. 4 and 5 may be expanded and stored, or may be used instead of the communication buffer in which the data is temporarily stored).

Next, the operation will be described. (1) Data communication I / F 7 via network A
When it is received, the input is input to the distribution control 31 via the dedicated I / F 8.

(2) The distribution control 31 supplies the input data to the frame memory (n) 4 and writes it directly (in the case of image data, it is expanded and written, and in the case of data, it is written as it is. Used as a communication buffer in.

(3) After writing the data to the frame memory 4 in (2) (or in parallel with writing), the frame memory (1) 4 to the frame memory (n) 4 (frame memory (n) 4 (Except when data is written to), the serial digital data read out is combined by the multiplexing unit 11, and the combined digital data is analog signal (video signal) by A / D5.
To display on the display 6. On the other hand, when the data is written in the frame memory (n) 4 and used as a communication buffer, the data read from the frame memory (n) 4 is transferred to the main memory 2 via the system bus 9.

As described above, a plurality of frame memories (1) 4 to (n) 4 are provided, and one of the frame memories (n) 4 directly receives data from the dedicated I / F 8 via the switch 3. The data received from the network 10 can be written to the dedicated I / O
It is input to the switch 3 through F8 and directly written to the frame memory (n) 4, and serial data read from these is combined to display at high speed on the display 6, or parallel data read from this. To the main memory 2 via the system bus 9, and by utilizing the high-speed transferability of the network 10, the receiver directly writes the data to the frame memory 4 for high-speed display, and the frame memory 4 is used as a communication buffer. It can be used as a substitute.

[0058]

As described above, according to the present invention,
Since a dedicated I / F 8 for transferring data from the communication I / F 7 of the receiving side to the frame memory 4 is provided and the network 10 directly writes to the frame memory 4 for display, the high transfer rate of the network 10 is improved. It is possible to realize high-speed data display.

[Brief description of drawings]

FIG. 1 is a principle configuration diagram of the present invention.

FIG. 2 is a flowchart explaining the operation of the present invention.

FIG. 3 is an explanatory diagram of transfer data according to the present invention.

FIG. 4 is a configuration diagram of an embodiment of the present invention.

FIG. 5 is a configuration diagram (1) of another embodiment of the present invention.

FIG. 6 is a configuration diagram (2) of another embodiment of the present invention.

FIG. 7 is an explanatory diagram of a conventional technique.

[Explanation of symbols]

 1: CPU 2: Main memory 3: Switch 31: Distribution control 4: Frame memory 5: D / A 6: Display 7: Communication I / F 8: Dedicated I / F 9: System bus 10: Network 11: Multiplexing unit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Victory Yano 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Fujitsu Limited

Claims (4)

[Claims] 1. A high-speed display device for displaying transferred data at high speed, including a frame memory (4) for expanding and storing data to be displayed, a communication I / F (7) and the frame memory ( 4) and a dedicated I / F (8) for connecting to the frame memory (4) through the dedicated I / F (8) when the communication I / F (7) receives data from a network. ), And the data read serially from the frame memory (4) is displayed on the display. 2. A high-speed display device for displaying transferred data at high speed, which comprises a plurality of frame memories (4) for expanding and storing data to be displayed, and a plurality of the frame memories (4). A switch (3) for changing over to write data to the crab and a dedicated I / F (8) for connecting the communication I / F (7) and the switch (3) are provided, and the communication I / F ( When the data is received by 7), it is input to the switch (3) through the dedicated I / F (8), and the switch (3) inputs the data to any of the plurality of frame memories (4). A high-speed display device characterized in that it is configured to directly write data, serially read data from these frame memories (4), and display on a display. 3. A high-speed display device for displaying transferred data at high speed, which comprises a plurality of frame memories (4) for expanding and storing data to be displayed, and a plurality of these frame memories (4). A distribution control (31) for switching so as to write data to one or more and a dedicated I / F (8) for connecting a plurality of communication I / Fs (7) and the distribution control (31). When the communication I / F (7) receives data from a plurality of networks, the data is input to the distribution control (31) through the dedicated I / F (8), and the distribution control (31) is input. Directly write to one or more of the plurality of frame memories (4), synthesize the data serially read from these frame memories (4) and display it on the display. A high-speed display device characterized by being configured. 4. A high-speed display device for displaying transferred data at high speed, and a frame memory (1) for expanding and storing data to be displayed and temporarily storing data received from a network, and communication. An I / F (7) and a dedicated I / F (8) for connecting the frame memory (4) are provided, and the dedicated I / F is received when the communication I / F (7) receives data from a network. A high-speed display device characterized in that the frame memory (4) is directly written through the (8) and data is read from the frame memory (4).