JPH06326118A - Manufacture of compound semiconductor device - Google Patents

Abstract

PURPOSE:To form a high-resistance layer which is stable for many hours and to reduce a base-collector capacity by a method wherein an epitaxial growth layer is formed on a semiinsulating compound semiconductor substrate, oxygen ions or boron ions are implanted selectively into the growth layer and an epitaxial regrowth operation is then performed. CONSTITUTION:An n<+> GaAs layer or an n<+> AlGaAs layer 8 is epitaxially grown on a semiinsulating GaAs compound semiconductor substrate 9, oxygen ions or boron ions are then implanted selectively, and an oxygen-ion-implanted layer or a boron-ion-implanted layer 10 is formed. After the implanted layer 10 has been formed, an n-GaAs layer 7, a p<+> GaAs layer 6, an n-AlGaAs layer 5, an n<+> GaAs layer or an n<+> GaAs layer and an n<+> InGaAs layer are formed sequentially by an epitaxial growth operation. Thereby, a high-resistance layer is formed automatically, and an emitter electrode 1, a base electrode 2 and a collector electrode 3 are formed. Consequently, the high-frequency characteristic of the title semiconductor device can be enhanced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a III-V compound semiconductor device.

[0002]

2. Description of the Related Art Conventionally, as shown in FIG. 2, element isolation of an AlGaAs / GaAs hetero-bipolar transistor is achieved by implanting oxygen ions or boron ions into an n ⁺ -GaAs layer 18 which is a collector buffer layer and annealing it. The high resistance layer 20 was formed outside the collector electrode 13. Here, 11 is an emitter electrode, 12 is a base electrode, 14 is an n ⁺ -InGaAs layer, and 15 is n-AlGa.
As layer, 16 is p ⁺ -GaAs layer, 17 is n-GaAs
Layer 19 is a semi-insulating GaAs substrate.

[0003]

However, in the prior art, although the elements are separated from each other, p ⁺ -Ga which is the base layer is formed.
The As layer 16 is an n-GaAs layer 17 and an n ⁺ -GaAs layer 1.
Since it overlaps with 8, the base-collector capacitance is large. In particular, when the element size becomes smaller, the influence of the capacitance becomes more significant and the high frequency characteristics cannot be improved. Also,
The annealing temperature is generally required to be 400 ° C. or higher in order to form the high resistance layer 20, but on the other hand, the electrical characteristics of the epitaxial layer may change due to the high temperature annealing, and sufficient annealing cannot be performed.

The present invention has been made in view of the above circumstances, and provides a method for manufacturing a compound semiconductor device capable of forming a high-resistance layer that is stable for a long time, reducing the base-collector capacitance, and improving high-frequency characteristics. The purpose is to do.

[0005]

In order to achieve the above object, a method of manufacturing a compound semiconductor device according to the present invention comprises a semi-insulating G layer.
First, epitaxially growing an n ⁺ -GaAs layer or an n ⁺ -AlGaAs layer on an aAs compound semiconductor substrate
Step, a second step of selectively implanting oxygen ions or boron ions, a third step of epitaxially growing an n-GaAs layer, a p ⁺ -GaAs layer and an n-AlGa layer.
A fourth step of epitaxially growing the As layer, n ⁺
-GaAs layer or n ⁺ -GaAs layer and n ⁺ -InG
The method is characterized by including a fifth step of epitaxially growing the aAs layer, a sixth step of a mesa step of removing an unnecessary portion, and a seventh step of forming an electrode.

[0006]

According to the present invention, by the above means, (1) after selectively implanting oxygen ions or boron ions for element isolation into the epitaxial growth layer, epitaxial regrowth is performed to bring the element isolation layer inside the base region. Since it can be formed, the base-collector capacitance can be reduced.

(2) After selective implantation, a high resistance layer is formed by high temperature annealing, and then a regrown layer including a layer whose electrical characteristics are deteriorated by high temperature annealing is formed, so that the high resistance layer is stable for a long time. Can be formed.

[0008]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIGS. 1A, 1B and 1C are block diagrams showing an embodiment of the present invention. Here, 1 is an emitter electrode, 2 is a base electrode, 3 is a collector electrode, and 4 is n ⁺ -G.
aAs layer or n ⁺ -GaAs layer and n ⁺ -InGaA
s layer, 5 is n-AlGaAs layer, 6 is p ⁺ -GaAs
A layer, 7 is an n-GaAs layer, 8 is an n ⁺ -GaAs layer or an n ⁺ -AlGaAs layer, 9 is a semi-insulating GaAs compound semiconductor substrate, and 10 is an oxygen ion or boron ion implanted layer.

FIG. 1A shows AlGaAs according to the present invention.
FIG. 7 is a manufacturing process diagram showing an example of a / GaAs heterobipolar transistor. That is, an n ⁺ -GaAs layer or n ⁺ -AlGa is formed on the semi-insulating GaAs compound semiconductor substrate 9.
The As layer 8 is epitaxially grown, and then oxygen ions or boron ions are selectively implanted to form an oxygen ion or boron ion implanted layer 10. After that, annealing may be performed at a temperature of 400 ° C. or higher. In this case, 2
After selectively implanting oxygen ions or boron ions at a high temperature of 00 ° C. or higher, annealing may be performed at a temperature of 400 ° C. or higher.

FIG. 1 (b) is a view showing the cross-sectional shape of the hetero bipolar transistor according to the present invention.
(C) is a plan view of the hetero bipolar transistor. That is, in FIG. 1A, after the oxygen ion or boron ion implantation layer 10 is formed and the surface is cleaned, n-
GaAs layer 7, p ⁺ -GaAs layer 6, n-AlGaAs
Layer 5, n ⁺ -GaAs layer or n ⁺ -GaAs layer and n
^{The +} -InGaAs layer 4 is sequentially formed by epitaxial growth. Depending on the temperature conditions, the epitaxial growth process is annealed to automatically form the high resistance layer. After that, a mesa process for removing unnecessary portions and formation of electrodes such as the emitter electrode 1, the base electrode 2, and the collector electrode 3 are performed to form a hetero bipolar transistor. As shown in FIGS. 1B and 1C, the high resistance layer of the oxygen ion or boron ion implanted layer 10 by selective implantation is p ⁺ -GaA.
Since it is inside the base region of the s layer 6, the base-collector capacitance can be reduced.

As described above, according to the method for manufacturing a hetero-bipolar transistor according to this embodiment, (1) the high frequency characteristics of a device having a small emitter size can be dramatically improved.

(2) The formation of the element isolation layer by oxygen ion implantation requires annealing at 400 ° C. or higher after implantation, and there is an advantage that annealing is performed simultaneously depending on the regrowth temperature depending on the conditions during regrowth.

(3) In the conventional manufacturing method, the electrical characteristics of the epitaxial layer may be deteriorated by annealing at 400 ° C. or higher. With such a crystal structure,
After the implantation, annealing at 400 ° C. or higher is first performed to form a good element isolation layer, and then a regrown layer including a layer whose electrical characteristics are deteriorated by high temperature annealing is formed, so that the electrical characteristics of the regrown layer are impaired. The device can be manufactured without using it.

As described above, the element having excellent high frequency characteristics can be provided by the method of manufacturing the compound semiconductor device according to this embodiment.

[0016]

As described above, according to the present invention, there is provided a method of manufacturing a compound semiconductor device capable of forming a stable high resistance layer for a long time, reducing the base-collector capacitance, and improving high frequency characteristics. be able to.

[Brief description of drawings]

FIG. 1 is a manufacturing process drawing, a cross-sectional view, and a plan view showing an example of an AlGaAs / GaAs heterobipolar transistor according to the present invention.

FIG. 2 is a cross-sectional view of a prior art AlGaAs / GaAs heterobipolar transistor.

[Explanation of symbols]

1 ... Emitter electrode, 2 ... Base electrode, 3 ... Collector electrode, 4 ... n ⁺ -GaAs layer or n ⁺ -GaAs layer and n ⁺ -InGaAs layer, 5 ... n-AlGaAs layer, 6 ...
p ⁺ -GaAs layer, 7 ... n-GaAs layer, 8 ... n ⁺ -G
aAs layer or n ⁺ -AlGaAs layer, 9 ... Semi-insulating GaAs compound semiconductor substrate, 10 ... Oxygen ion or boron ion implanted layer.

Claims (1)

[Claims] 1. A first step of epitaxially growing an n ⁺ -GaAs layer or an n ⁺ -AlGaAs layer on a semi-insulating GaAs compound semiconductor substrate, a second step of selectively implanting oxygen ions or boron ions, and n. -GaA
the third step of epitaxially growing the s layer, and p ⁺ −
The fourth step of epitaxially growing the GaAs layer and the n-AlGaAs layer, and the n ⁺ -GaAs layer or the n ⁺ -layer.
A compound comprising a fifth step of epitaxially growing a GaAs layer and an n ⁺ -InGaAs layer, a sixth step of a mesa step of removing an unnecessary portion, and a seventh step of forming an electrode. Manufacturing method of semiconductor device.