JPH06303133A - Oscillation circuit, frequency voltage conversion circuit, phase locked loop circuit and clock extract circuit - Google Patents

Abstract

PURPOSE:To allow the oscillation circuit, the frequency voltage conversion circuit, the phase locked loop circuit and the clock extract circuit to be suitable for circuit integration by improving tracking performance of input data regardless of their small size. CONSTITUTION:An output of a voltage controlled oscillator circuit 4 is inputted to a frequency voltage conversion circuit 1, and a voltage difference between an output of the frequency voltage conversion circuit 1 and an output voltage of a reference frequency voltage converter 2 is fed to a control voltage of the voltage controlled oscillator circuit 4. Thus, the frequency accuracy of the oscillation circuit is easily improved in the integrated circuit, a defect of difficulty in the circuit integration and the need of adjustment of the voltage controlled oscillator circuit 4 is eliminated and defects of the phase locked loop circuit and the clock extract circuit such as large sized components or a long time from impression of an input signal till output of an extracted clock are avoided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oscillation circuit, a frequency-voltage conversion circuit, a phase locked loop circuit and a clock extraction circuit, and can be applied to, for example, an integrated circuit used in a communication device or the like.

[0002]

2. Description of the Related Art Conventionally, as a clock extraction device used in a communication device, there is one which is composed of a change point detector and a phase locked loop circuit (Roland E. BEST, "PHASE-L".
OCKEDLOOPS THEORY, DESIGN, AND APPLICATIONS 」Mc
Published in 1984 by GRAW-HILL BOOK COMPANY, page 212-
P. 215).

In such a clock extraction device, the input N
The RZ digital signal is input to the change point detector, the resulting output of the change point detector is input to one input of the phase comparator of the phase locked loop, and the output of the phase comparator is input to the loop filter, The output of the loop filter is input to the voltage controlled oscillator, the output of the voltage controlled oscillator is connected to the other input of the phase comparator, and the output of the voltage controlled oscillator becomes the output of the clock extraction device.

The phase locked loop works so that the phase of the output signal of the voltage controlled oscillator is synchronized with the output of the change point detector, and as a result, the clock is extracted from the input NRZ digital signal and extracted in synchronization with the input NRZ digital signal. It is designed to output a clock signal.

[0005]

However, since the clock extraction device having the above-mentioned configuration uses the phase-locked loop circuit, the operating frequency range, the capture range, and the jitter resistance characteristic are set to practical values. , It is necessary to use a very large value as the time constant of the loop filter.Therefore, in addition to the large component shape, it takes a long time from when the input signal is applied until the extraction clock signal starts to be output. Therefore, there is a drawback that the followability with respect to the input data deteriorates.

The free-running frequency of the voltage controlled oscillator is
There has been a problem that a certain range of accuracy is required for a desired operating frequency, integration into an integrated circuit is difficult, and adjustment is required.

The present invention has been made in consideration of the above points, and solves the conventional problems all at once, improves the followability to input data in a small size, and is suitable for an integrated circuit. An attempt is made to propose a conversion circuit, a phase locked loop circuit and a clock extraction circuit.

[0008]

In order to solve such a problem, according to the present invention, in an oscillating circuit which has a free-running oscillating means and outputs an oscillating signal, an output frequency is controlled by a control voltage. 4, a first frequency-voltage converter 1 that receives the output of the voltage-controlled oscillator 4 or a signal obtained by dividing the output of the voltage-controlled oscillator 4, and the reference frequency signal or the reference frequency signal thereof. A second frequency-voltage converter 2 that receives a signal, an output of the first frequency-voltage converter 1 and an output of the second frequency-voltage converter 2 that are input, and the first and second frequency-voltage converters And a subtracter 3 for outputting the difference between the outputs of the subtracters 1 and 2 are provided.
Or the signal obtained by amplifying the output of the subtractor 3 is input to the voltage controlled oscillator 4, and the frequency of the output of the voltage controlled oscillator 4 is controlled by the frequency of the reference frequency signal.

Further, in the present invention, the frequency-voltage conversion circuit 1 which outputs an output voltage proportional to the frequency of the input signal.
Change point detector 1 for detecting a change point of an input signal in
9 and an integrator 20 that integrates the output of the change point detector 19 and sends it as an output voltage.

Further, in the present invention, the phase comparator 1
1. In a phase locked loop circuit having a loop filter 12 and a voltage controlled oscillator 4, a first frequency-voltage converter 1 that receives an output of the voltage controlled oscillator 4 or a signal obtained by dividing the output of the voltage controlled oscillator 4 as an input. A second frequency-voltage converter 2 having a reference frequency signal or a signal obtained by dividing the reference frequency signal as an input, and an output of the first frequency-voltage converter 1 and a second frequency-voltage converter 2. A subtractor 3 that receives the output as an input and outputs the difference between the outputs of the first and second frequency-voltage converters 1 and 2 and an adder 13 that adds the output of the loop filter 12 and the output of the subtractor 3 are provided. Provided,
The output of the adder 13 is input to the voltage controlled oscillator 4, and the free-running frequency is controlled by the frequency of the reference frequency signal.

Furthermore, according to the present invention, a clock extraction circuit having free-running oscillation means for extracting and outputting a clock signal synchronized with the input data signal from the input data signal detects the change point of the input data signal. Then, the change point detection means 16 for outputting the change point detection signal, the voltage controlled oscillator 17 with an oscillation phase input for controlling the phase of the free-running oscillation means based on the change point detection signal, and the output of the voltage controlled oscillator 17 or A first frequency-voltage converter 1 that receives a signal whose frequency-divided output of the voltage-controlled oscillator 17 is input, and a second frequency voltage that receives a reference frequency signal or a signal whose frequency is divided. The converter 2 and the output of the first frequency-voltage converter 1 and the output of the second frequency-voltage converter 2 are input and the difference between the first and second frequency-voltage converters 1 and 2 is output. And a signal obtained by amplifying the output signal of the subtractor 3 is input to the voltage controlled oscillator 17, and the free-running frequency of the voltage controlled oscillator 17 is controlled by the frequency of the reference frequency signal. I did it.

[0012]

The output of the voltage controlled oscillator circuit 4 is input to the frequency voltage converter circuit 1, and the difference voltage between the output of the frequency voltage converter circuit 1 and the reference voltage is applied to the control signal input of the voltage controlled oscillator circuit 4. Therefore, especially in an integrated circuit, the frequency accuracy of the oscillation circuit can be easily improved, the drawback that the integrated circuit of the voltage controlled oscillation circuit 4 is difficult or requires adjustment can be eliminated, and the phase locked loop circuit and It is possible to eliminate the disadvantages that the component size becomes large in the clock extraction circuit and that it takes a long time from when the input signal is printed until the extraction clock starts to be output.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

According to the present invention, the output of the voltage controlled oscillation circuit is input to the frequency voltage conversion circuit, and the difference voltage between the output of the frequency voltage conversion circuit and the reference voltage is applied to the control voltage input of the voltage controlled oscillation circuit. It is based on the principle.

FIG. 1 shows an embodiment of an oscillator circuit according to the present invention, in which the output of the first frequency-voltage converter 1 is connected to one input of a subtractor 3 and the output of the second frequency-voltage converter 2 is provided. Is connected to the other input of the subtractor 3, the output of the subtractor 3 is connected to the input of the voltage controlled oscillator 4, and
Is connected to the input of the frequency-voltage converter 1 and the output terminal 6, and the reference frequency input terminal 5 is connected to the input of the frequency-voltage converter 2.

The two frequency-voltage converters 1 and 2 are set to have substantially the same frequency-voltage conversion ratio. This can be realized by, for example, a method of forming both on the same integrated circuit board. Here, the frequency-voltage conversion ratio is KFV. A signal of the reference frequency FREF is externally input to the reference frequency input terminal 5. The voltage controlled oscillator 4 outputs an oscillation output having a frequency FOUT proportional to the input voltage, and its proportional constant is K0.

In this way, the outputs of the frequency voltage converter 1 and the frequency voltage converter 2 are expressed by the following equations KFV × FOUT (1) KFV × FREF (2), respectively. Further, the output of the subtractor 3 is represented by the following equation (KFV × FREF) − (KFV × FOUT) (3), and the output of the voltage controlled oscillator 4 is the following equation FOUT = KO × {(KFV × FREF )-(KFV x FOUT)} ... (4) When this is solved for FOUT, the following equation (5) is obtained.

FOUT = FREF × [1/1 + {1 / (K0 × KFV)}] (5) From this equation (5), if KO × KFV is sufficiently larger than 1, FOUT becomes FREF. Can be considered equal.

Therefore, the circuit operates so that the output frequency of the output terminal 6 in the oscillation circuit of FIG. 1 becomes equal to the frequency of the reference signal applied to the reference frequency input terminal 5.
That is, if the frequency accuracy of the reference signal is sufficiently high, a frequency output with sufficient accuracy can be obtained at the output terminal 6 regardless of the accuracy of the voltage controlled oscillator 4.

Although such an operation is similar to that of the phase locked loop circuit, only the frequency of the signal applied to the reference frequency input terminal 5 and the frequency of the signal output to the output terminal 6 become equal, and the phase relationship between the two is the same. It is different from the phase locked loop circuit in that it is indefinite.

In the oscillator circuit of FIG. 1, when the value of K0 × KFV is not sufficiently large with respect to the required accuracy, the output of the subtractor 3 is fed to the amplifier 7 as shown in the oscillator circuit of FIG.
, And the output of the amplifier 7 is connected to the input of the voltage controlled oscillator 4, the value of KO × KFV is increased by the gain of the amplifier 7 and the accuracy can be improved.

FIG. 3 shows another embodiment of the oscillator circuit according to the present invention. In the oscillation circuit according to the embodiment of FIG. 1, the frequency of the output terminal 6 was equal to the frequency of the reference frequency input terminal 5, but in this case, the output of the voltage controlled oscillator 4 is connected to the input of the frequency divider 8 to divide the frequency. Since the output of the frequency divider 8 is connected to the input of the frequency-voltage converter 1, when the frequency division ratio of the frequency divider 8 is a natural number N, the frequency F of the oscillation output of the voltage controlled oscillator 4 is
OUT can be expressed as the following formula FOUT = N × FREF (6).

Further, in the oscillator circuit shown in FIG. 4, the reference frequency input terminal 5 is connected to the input of the frequency divider 9 in the configuration of the oscillator circuit of FIG. By connecting the output of the frequency divider 9 to the input of the frequency-voltage converter 2, assuming that the frequency division ratio of the frequency divider 9 is a natural number M, the frequency FOUT of the oscillation output of the voltage controlled oscillator 4 is The following expression FOUT = N / M × FREF can be expressed as (7).

FIG. 5 shows another embodiment of the oscillator circuit according to the present invention, in which the output of the voltage controlled oscillator 4 is connected to the output terminal 6 and the input of the frequency voltage converter 1, and the output of the frequency voltage converter 1 is connected. Is connected to one input of the subtractor 3, the reference voltage input terminal 10 is connected to the other input of the subtractor 3, and the output of the subtractor 3 is connected to the input of the voltage controlled oscillator 4. When the operation is described by the mathematical formulas similar to the above, the output of the frequency-voltage converter 1 is expressed by the following formula KFV × FOUT (8). Assuming that the voltage at the reference voltage input terminal 10 is VREF, the output of the subtractor 3 is represented by the following expression VREF- (KFV * FOUT) (9). Therefore, the output of the voltage controlled oscillator is expressed by FOUT = KO × {VREF− (KFV × FOUT)} (10), and when this is solved for FOUT, the following equation (11) is obtained.
become that way.

FOUT = VREF × [1 / {KVF + (1 / K0)}] (11) Therefore, when KO is sufficiently large, the external reference voltage VRE is obtained.
It can be seen that the output frequency FOUT is determined by F and the conversion constant KFV of the frequency-voltage converter 1. The voltage-controlled oscillator described above may be a current-controlled oscillator, in which case the operation can be explained by replacing the voltage with a current.

FIG. 6 shows an embodiment of the phase locked loop circuit according to the present invention, in which the input terminal 14 is connected to one input of the phase comparator 11, and the output of the voltage controlled oscillator 4 is the other one of the phase comparator 11. It is connected to the input, output terminal 6 and frequency-voltage converter 1. The output of the phase comparator 11 is connected to the input of the loop filter 12, and the loop filter 1
The output of 2 is connected to one input of the adder 13, and the output of the subtractor 3 is connected to the other input of the adder 13.
Furthermore, the output of the adder 13 is connected to the input of the voltage controlled oscillator 4, the output of the frequency-voltage converter 1 is connected to one input of the subtractor 3, and the output of the frequency-voltage converter 2 is
And the reference frequency input terminal 5 is connected to the input of the frequency-voltage converter 2.

The phase comparator 11, the loop filter 12, the adder 13, the voltage controlled oscillator 4, and the signal path returning to the phase comparator 11 operate in the same manner as a normal phase locked loop (PLL), and the output terminal 6 has For example, a signal having the same frequency and phase as the input signal 14 is obtained.

The portion composed of the frequency-voltage converter 1, the frequency-voltage converter 2, and the subtractor 3 operates in the same manner as the oscillation circuit described above with reference to FIG. It is made equal to the reference frequency signal given to the terminal 5. In this case, the phase relationship between the reference frequency signal and the oscillation output of the voltage controlled oscillator 4 is indefinite as described above, and the operation of the phase locked loop is not hindered.

This configuration of the phase locked loop has many advantages especially when it is realized as an integrated circuit. That is, FIG.
As described above, if the relative accuracy of the two frequency voltage converters 1 and 2 is high, the oscillation frequency of the voltage controlled oscillator 4 becomes equal to the reference frequency from the outside with sufficient accuracy, but this is easy in an integrated circuit. Can be realized. In this case, the voltage controlled oscillator 4 does not require precision, and an emitter-coupled multivibrator, a ring oscillator, etc. on an integrated circuit can be easily used. In this way, if the frequency accuracy of the voltage controlled oscillator 4 can be increased, the degree of freedom in setting various constants of the phase locked loop circuit is increased, and, for example, narrow band characteristics are easily obtained.

Further, in this configuration, the loop filter 12, the subtractor 3, and the adder 13 are shown separately for each function, but these functions can be combined and realized in an electronic circuit for implementation. It is also possible to implement the adder 13 and the subtractor 3 in an integrated manner, or to implement the functions of the adder 13, the subtractor 3 and the loop filter 12 in an integrated manner. Further, a configuration in which the functions of the adder 13 and the subtractor 3 are incorporated inside the voltage controlled oscillator 4 is also possible. Furthermore, although the voltage controlled oscillator 4 is used in this configuration, substantially the same can be realized by using the current controlled oscillator. Furthermore, in addition to this configuration, the amplifier 7 may be inserted in the output of the subtractor 3 as described above with reference to FIG.

In the phase locked loop of FIG. 6,
As described above with respect to the oscillation circuits of FIGS. 3 and 4, it is possible to insert the frequency divider 8 at the input of the frequency-voltage converter 1 or the frequency divider 9 at the input of the frequency-voltage converter 2. In this case, the reference frequency can be selected to have an arbitrary integer ratio with the output frequency.

FIG. 7 shows an embodiment of the clock extraction circuit according to the present invention, in which the output of the frequency-voltage converter 1 is the subtractor 3
Is connected to one input, and the output of the frequency-voltage converter 2 is connected to the other input of the subtractor 3. Also subtractor 3
Is connected to the frequency control input of the voltage controlled oscillator 17 with the phase control input, the output of the voltage controlled oscillator 17 with the phase control input is connected to the output terminal 6 and the input of the frequency voltage converter 1, and the reference frequency input terminal 5 Is connected to the input of the frequency-voltage converter 2.

Further, the input terminal 15 of the clock extraction circuit
Is connected to the input of the change point detection circuit 16, and the output of the change point detection circuit 16 is connected to the phase control input of the voltage controlled oscillator 17 with a phase control input. Here, the change point detection circuit 1
6 and the voltage-controlled oscillator 17 with phase control input
It was disclosed in No. 4-23628. In practice, the input data signal is input to the change point detector 16 via the input terminal 15, and a pulse signal indicating the change point of the input data signal is obtained at the output of the change point detector 16 and is provided with a phase control input. By inputting it to the phase control input of the voltage controlled oscillator 17, the phase of the oscillation output is controlled, and the clock signal whose phase matches the input data signal is obtained at the output terminal 6.

Frequency-voltage converter 1, frequency-voltage converter 2, subtractor 3 and voltage-controlled oscillator 17 with phase control input
The portion configured by makes the oscillation frequency of the voltage controlled oscillator with phase control input 17 equal to the reference frequency given to the reference frequency input terminal 5 by the same operation as the oscillation circuit of FIG. In this case, since the phase of the oscillation output of the voltage controlled oscillator 17 with the phase control input and the phase of the reference frequency signal given to the reference frequency input terminal 5 are indefinite as described above, the phase of the output signal of the change point detection circuit 16 It does not interfere with control.

In this configuration, the voltage controlled oscillator 17
However, substantially the same can be realized by using the current controlled oscillator. Further, as described above with reference to FIG. 2, the amplifier 7 may be inserted in the output of the subtractor 3.
Further, as shown in FIGS. 3 and 4, a frequency divider 8 is inserted in the input of the frequency voltage converter 1 or the frequency voltage converter 2 is inserted.
It is possible to insert the frequency divider 8 into the input of, and in this case, the reference frequency having an arbitrary integer ratio with the output frequency can be selected.

FIG. 8 shows an embodiment of a frequency-voltage converter suitable for an oscillation circuit, a phase locked loop, and a clock extraction circuit according to the present invention, in which an input signal supplied to an input terminal 18 is input to a change point detector 19. , The output of the change point detector 19 is input to the integrator 20, and the output of the integrator 20 is output terminal 2
It is output to 1. Of these, the change point detector is shown in FIG.
It is realized by the circuits shown in (A), (B), and (C).

For example, a rising change point detector (see FIG.
In (A)), a pulse signal having a constant time length is output at the rising edge of the input signal, and the integrator 20 integrates the pulse signal with a time constant sufficiently longer than the repetition period of the input signal, and outputs a voltage signal to the output terminal. Output. For example, the pulse voltage amplitude V of the output of the change point detector (detector of the rising change point)
If the input signal is a square wave and the frequency is FIN, the output voltage VOUT of the integrator is T
When P is smaller than the period (1 / FIN) of the input signal, it is given by the following equation: VOUT = FIN × TP × VP (12), which realizes frequency-voltage conversion.
The integrator is composed of, for example, an amplifier and a capacitor, but the functions of the integrator, the subtractor, and the amplifier can be integrally realized as described above with reference to FIG.

According to this structure, the output of the voltage controlled oscillator is input to the frequency voltage converter, and the difference voltage between the output of the frequency voltage converter and the reference voltage is applied to the control voltage input of the voltage controlled oscillator. Therefore, especially in an integrated circuit, the frequency accuracy of the oscillation circuit can be easily improved, and the drawback that the integrated circuit of the voltage controlled oscillator is difficult or requires adjustment can be eliminated. A circuit, a phase locked loop, and a clock extraction circuit can be realized.

[0039]

As described above, according to the present invention, the output of the voltage-controlled oscillator circuit is input to the frequency-voltage converter circuit, and the difference voltage between the output of the frequency-voltage converter circuit and the reference voltage is calculated by the voltage-controlled oscillator circuit. Since it is applied to the control voltage input,
In particular, it is possible to easily improve the frequency accuracy of the oscillation circuit in the integrated circuit, eliminate the drawback that the integrated circuit of the voltage controlled oscillation circuit is difficult or requires adjustment, and in the phase locked loop circuit and the clock extraction circuit. It is a compact device with excellent followability to input data and suitable for integrated circuits because it can eliminate the drawbacks of large parts shape and long time from output of input signal to output of extraction clock. It is possible to provide.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of an oscillator circuit according to the present invention.

FIG. 2 is a block diagram showing an embodiment of an oscillator circuit according to the present invention.

FIG. 3 is a block diagram showing an embodiment of an oscillator circuit according to the present invention.

FIG. 4 is a block diagram showing an embodiment of an oscillator circuit according to the present invention.

FIG. 5 is a block diagram showing an embodiment of an oscillator circuit according to the present invention.

FIG. 6 is a block diagram showing an embodiment of a phase locked loop according to the present invention.

FIG. 7 is a block diagram showing an embodiment of a clock extraction circuit according to the present invention.

FIG. 8 is a block diagram showing an embodiment of the frequency-voltage converter according to the present invention.

FIG. 9 is a block diagram showing a change point detector in a frequency-voltage converter.

[Explanation of symbols]

 1, 2 Frequency voltage converter 3 Subtractor 4 Voltage controlled oscillator 7 Amplifier 8, 9 Frequency divider 11 Phase comparator 12 Loop filter 13 Adder 16 Change point detection circuit 17 Voltage controlled oscillator with phase control input 19 Change point detector 20 integrator

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Hideaki Odagiri 1-7-12 Toranomon, Minato-ku, Tokyo Oki Electric Industry Co., Ltd.

Claims (4)

[Claims] 1. An oscillating circuit having a free-running oscillating means for outputting an oscillating signal, an oscillator having an output frequency controlled by a control signal, and an output of said oscillator or a signal obtained by dividing the output of said oscillator. A first frequency-voltage converter, a second frequency-voltage converter having a reference frequency signal or a signal obtained by dividing the reference frequency signal as an input, and an output of the first frequency-voltage converter And a subtractor that receives the output of the second frequency-voltage converter and outputs the difference between the outputs of the first and second frequency-voltage converters.
An oscillation circuit, wherein the output of the subtractor or a signal obtained by amplifying the output of the subtractor is input to the oscillator, and the frequency of the output of the oscillator is controlled by the frequency of the reference frequency signal. 2. A frequency-voltage conversion circuit that outputs an output voltage proportional to the frequency of an input signal, wherein a change point detector that detects a change point of the input signal and an output of the change point detector are integrated, and A frequency-voltage conversion circuit comprising: an integrator that outputs an output voltage. 3. A phase-locked loop circuit having a phase comparator, a loop filter and an oscillator, wherein a first frequency-voltage converter receives an output of the oscillator or a signal obtained by dividing the output of the oscillator as a input, A second frequency-voltage converter having a frequency signal or a signal obtained by dividing the reference frequency signal as an input, and the outputs of the first frequency-voltage converter and the second frequency-voltage converter as inputs A subtractor that outputs the difference between the outputs of the first and second frequency-voltage converters, and an adder that adds the output of the loop filter and the output of the subtractor. A phase-locked loop circuit characterized in that a free-running frequency is input to an oscillator and the free-running frequency is controlled by the frequency of the reference frequency signal. 4. A clock extraction circuit having free-running oscillation means for extracting and outputting a clock signal synchronized with the input data signal from the input data signal, detecting a change point of the input data signal, and detecting the change point. A change point detecting means for outputting a signal, an oscillator with an oscillation phase input for controlling the phase of the free-running oscillation means based on the change point detecting signal, and an output of the oscillator or a signal obtained by dividing the output of the oscillator. A first frequency-voltage converter that receives the input, a second frequency-voltage converter that receives the reference frequency signal or a signal obtained by dividing the reference frequency signal, and an output of the first frequency-voltage converter A subtractor that receives the output of the second frequency-voltage converter as an input and outputs the difference between the first and second frequency-voltage converters, and increases the output of the subtractor or the output signal of the subtractor. Clock extraction circuit for the signal input to the oscillator, the free-running frequency of the oscillator is characterized in that so as to control the frequency of the reference frequency signal.