JPH06273482A - 裸の半導体チップのバーンインおよび試験用キャリアおよびその方法 - Google Patents
裸の半導体チップのバーンインおよび試験用キャリアおよびその方法Info
- Publication number
- JPH06273482A JPH06273482A JP5272594A JP27259493A JPH06273482A JP H06273482 A JPH06273482 A JP H06273482A JP 5272594 A JP5272594 A JP 5272594A JP 27259493 A JP27259493 A JP 27259493A JP H06273482 A JPH06273482 A JP H06273482A
- Authority
- JP
- Japan
- Prior art keywords
- carrier
- socket
- chip
- bare
- burn
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 42
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 title claims abstract description 15
- 239000000853 adhesive Substances 0.000 claims description 8
- 230000001070 adhesive effect Effects 0.000 claims description 8
- 239000011347 resin Substances 0.000 abstract description 9
- 229920005989 resin Polymers 0.000 abstract description 9
- 229920000106 Liquid crystal polymer Polymers 0.000 description 2
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 2
- 230000000977 initiatory effect Effects 0.000 description 2
- 238000009434 installation Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 229920013683 Celanese Polymers 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 239000005022 packaging material Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0433—Sockets for IC's or transistors
- G01R1/0483—Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US96874092A | 1992-10-30 | 1992-10-30 | |
US968740 | 1992-10-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH06273482A true JPH06273482A (ja) | 1994-09-30 |
Family
ID=25514700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5272594A Pending JPH06273482A (ja) | 1992-10-30 | 1993-10-29 | 裸の半導体チップのバーンインおよび試験用キャリアおよびその方法 |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0600604A1 (en, 2012) |
JP (1) | JPH06273482A (en, 2012) |
KR (1) | KR940010259A (en, 2012) |
TW (1) | TW267244B (en, 2012) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5578934A (en) * | 1991-06-04 | 1996-11-26 | Micron Technology, Inc. | Method and apparatus for testing unpackaged semiconductor dice |
US5402077A (en) * | 1992-11-20 | 1995-03-28 | Micromodule Systems, Inc. | Bare die carrier |
US6937044B1 (en) | 1992-11-20 | 2005-08-30 | Kulicke & Soffa Industries, Inc. | Bare die carrier |
JPH07161426A (ja) * | 1993-12-03 | 1995-06-23 | Furukawa Electric Co Ltd:The | ベアチップバーンインテスト用ソケット及びその製造方法 |
JP2002243796A (ja) * | 2001-01-25 | 2002-08-28 | Promos Technologies Inc | 封止材除去されたチップのテスト治具 |
CN102520280A (zh) * | 2011-12-08 | 2012-06-27 | 台晶(宁波)电子有限公司 | 多温度点同步动态高温加速老化测试设备 |
CN116224038B (zh) * | 2023-01-06 | 2023-11-14 | 法特迪精密科技(苏州)有限公司 | 一种芯片温度循环老化测试台的芯片座 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3573617A (en) * | 1967-10-27 | 1971-04-06 | Aai Corp | Method and apparatus for testing packaged integrated circuits |
EP0107327A1 (en) * | 1982-09-17 | 1984-05-02 | Coordinate Probe Card Company Limited | Probe device for testing an integrated circuit and method of making same |
US5006792A (en) * | 1989-03-30 | 1991-04-09 | Texas Instruments Incorporated | Flip-chip test socket adaptor and method |
US4940935A (en) * | 1989-08-28 | 1990-07-10 | Ried Ashman Manufacturing | Automatic SMD tester |
-
1993
- 1993-10-26 EP EP93308531A patent/EP0600604A1/en not_active Withdrawn
- 1993-10-29 JP JP5272594A patent/JPH06273482A/ja active Pending
- 1993-10-29 KR KR1019930022711A patent/KR940010259A/ko not_active Withdrawn
-
1994
- 1994-02-22 TW TW083101470A patent/TW267244B/zh active
Also Published As
Publication number | Publication date |
---|---|
EP0600604A1 (en) | 1994-06-08 |
TW267244B (en, 2012) | 1996-01-01 |
KR940010259A (ko) | 1994-05-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0746772B1 (en) | Reusable die carrier for burn-in and burn-in process | |
US6258609B1 (en) | Method and system for making known good semiconductor dice | |
US5367253A (en) | Clamped carrier for testing of semiconductor dies | |
US5570032A (en) | Wafer scale burn-in apparatus and process | |
US5495179A (en) | Carrier having interchangeable substrate used for testing of semiconductor dies | |
JP2837829B2 (ja) | 半導体装置の検査方法 | |
US6627483B2 (en) | Method for mounting an electronic component | |
US7733106B2 (en) | Apparatus and method of testing singulated dies | |
US5543725A (en) | Reusable carrier for burn-in/testing on non packaged die | |
US5644247A (en) | Test socket and method for producing known good dies using the test socket | |
JPH0582616A (ja) | バーンイン試験用に回路チツプと一時キヤリアとの間の接続を行うための方法及び装置 | |
JPH06273482A (ja) | 裸の半導体チップのバーンインおよび試験用キャリアおよびその方法 | |
WO2000035262A2 (en) | Method for mounting an electronic component | |
TW460903B (en) | An apparatus for transporting die | |
KR950013605B1 (ko) | 번인 테스트용 칩 홀딩장치 및 그 제조방법 | |
JP2716663B2 (ja) | 半導体ダイの試験装置 | |
US20170200657A1 (en) | Integrated circuits and methods therefor | |
JPH07283333A (ja) | 保護クランプによる破損しやすい導電トレースの保持方法および装置 | |
CA2149497A1 (en) | Apparatus for mounting surface mount devices to a circuit board | |
US7105380B2 (en) | Method of temporarily securing a die to a burn-in carrier | |
US5291127A (en) | Chip-lifetime testing instrument for semiconductor devices | |
KR100305683B1 (ko) | 번인테스터용번인보드 | |
JP2004047336A (ja) | コンタクトシートおよびそれを備える半導体装置用ソケット | |
JPH0529418A (ja) | 半導体装置のバーイン方法及びそれに用いるバーインボード | |
US6968614B2 (en) | Method for positioning an electronic module having a contact column array into a template |