JPH06268364A - Method for bonding parts with solder - Google Patents

Abstract

PURPOSE:To prevent solder from escaping downstream in a through-hole and from stopping downstream in the lower part of a through-hole by forming a damn for substantially filling relatively high-citing-point solder in the through- hole of a printed wiring board and then bonding a solder land in the upper end of a through-hole to the lead terminal of chip parts with relatively low- melting-point solder. CONSTITUTION:Solder A of relatively high melting-point Tp is used to form a dam 20 for substantially filling the solder in the through-hole 22 of a printed wiring board 3 at the temperature of the melting-point, and after that, solder B of relatively low melting-point Tr is used to bond a solder land 4 in the upper end of the through-hole 22 to the source electrode 2 of an FET chip 1 at the temperature of the melting-point. Thereby, the solder of low melting point stops on the dam 20, that is, between the solder land 4 and the lead terminal of parts without escaping downstream in the lower part of the through-hole 22, thereby being able to surely bond them in a predetermined position.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solder bonding method for parts, and more particularly to a solder bonding method for chip parts by reflow processing.

[0002]

2. Description of the Related Art When a high frequency element for microwaves, for example, a gallium arsenide FET chip is solder-bonded to a printed wiring board, as shown in the explanatory view of the conventional solder bonding method of FIG. In order to drop the source electrode 2 of No. 1 to the ground at the root, the solder land 4 at the upper end of the through hole 5 connected to the entire surface ground 6 and the root of the source electrode 2 are generally bonded by solder.

At this time, as shown in FIGS. 3B and 3C, the source electrode 2 must be solder-bonded including at least the area B close to the FET chip body 1. Figure 3
(B) shows a case where the solder 7 ideally spreads over the solder land 4 and is soldered thereto, and is usually processed by reflow with cream solder and soldered.

[0004]

However, in the reflow process using cream solder, as shown in FIGS. 3D and 3E, a part of the solder 7 flows down through the through-hole hole 5 and escapes or passes through. There is a case where the solder 8 is formed at the lower part of the hole hole 5 by stopping to flow down.

In particular, as shown in FIG. 3E, when solder bonding is performed only in the area A far from the FET chip body 1 and the ground connection in the area B fails, parasitic inductance L is equivalently generated, resulting in oscillation or oscillation. This could cause a decrease in gain.

As a countermeasure against this, a reflow process has been attempted in which an excessive amount of cream solder is applied in anticipation of the flow-down amount, but there is a problem such as a short circuit between electrodes or between circuit patterns.

The method of the present invention has been made to solve such problems and drawbacks, and its purpose is to prevent the escape of solder due to the flow-through of the through-holes and the retention of the flow-down at the bottom of the through-holes in the reflow process. Another object of the present invention is to provide a soldering method for a chip component, which is capable of preventing a short circuit between electrodes and between circuit patterns.

[0008]

In order to solve the above-mentioned problems, a method for soldering components according to the present invention uses a solder having a first melting point, and a through hole of a printed wiring board at a temperature of the melting point. After forming a dam that substantially fills the hole, a solder having a second melting point lower than the melting point of the solder is used, and at the temperature of the melting point, the solder land at the upper end of the through hole and the lead terminal of the component are formed. It is configured to bond and.

[0009]

[Function] After forming a dam that substantially fills the through hole of the printed wiring board with a solder having a relatively high melting point, the solder having a relatively low melting point is used to perform the above-mentioned through at a temperature of the low melting point. The solder land at the upper end of the hole is bonded to the lead terminal of the component, but the dam does not melt at this time because of the low melting point temperature. Therefore, the solder having a low melting point stays on the dam, that is, between the solder land and the lead terminal of the component without flowing down to the lower portion of the through hole, and the solder land and the lead terminal of the component are separated by a predetermined amount. Securely adhere at the position.

[0010]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a process flow chart of a method for soldering components according to the present invention, and FIG. 2 is an explanatory diagram of a state corresponding to the process of FIG. First, in the processing step S1 (hereinafter, abbreviated as S1; the same applies to S2 to S9), pre-reflow processing at a reflow temperature of Tp degrees Celsius is started.

Next, the instep solder (cream solder) having a melting point of Tp degrees Celsius is applied to the printed wiring board 3 and the printed wiring board 3 is pre-reflow processed without mounting the chip parts (FIG. 2 (a)). ).

As a result of this pre-reflow treatment, the dam 20 is formed in the through hole 22 by the instep solder (S).
3). That is, the inside of the through hole 22 is almost filled with the instep solder. This completes the pre-reflow process (S4).

Then, the reflow treatment is started at a heating temperature of Tr degrees Celsius lower than the reflow temperature of Tp degrees Celsius (S5). Second solder (cream solder) having a melting point of Tr degrees Celsius is applied to the printed wiring board 3, the FET chip 1 is mounted, and a reflow process is performed (S6).

Since this reflow process proceeds at a heating temperature of Tr degrees Celsius, the second solder melts but the instep solder does not melt. Therefore, the dam 20 formed in the through-hole hole 22 does not melt, so that the molten solder B around the through-hole hole 22 does not flow into the through-hole hole,
Stop on the solder land (S7).

In this way, the molten second solder retained on the solder land 4 is soldered to the solder land 4 and the source electrode (lead terminal) 2 in a range including the area B (S8).
Then, the reflow process is finished (S9). Reference numeral 21 is a bonding portion made by solder B.

FIG. 2A shows a state in which the dam 20 is formed by the instep solder in the through hole 22 of the printed wiring board 3, and corresponds to S4 in FIG. 2B and 2C show the state at the end of the reflow process (S9).
(B) is a state in which the adhesive portion 21 made of the second solder is ideally formed. On the other hand, FIG. 2C is a diagram showing a state in which the source electrode 2 and the solder land 4 are soldered in the area B.

According to the method of the present invention, since the dam 20 made of the instep solder remains in the through hole hole 22 even after the treatment, if the second solder is melted and removed by reheating at a temperature of Tr degrees Celsius, the unmelted solder is not melted. You can see the dam clearly remains. Therefore, there is also an advantage that it is possible to easily prove whether or not the present invention is applied.

[0018]

As described above, according to the solder bonding method for components according to the present invention, first, a dam that substantially fills a through-hole of a printed wiring board is formed with solder having a relatively high melting point, and then a comparison is made. Using a low melting point solder,
Since the solder land at the upper end of the through hole is bonded to the lead terminal of the chip component at the temperature of the low melting point, the dam does not melt due to the temperature of the low melting point, and therefore the solder at the low melting point is through hole. The solder land on the dam and the lead terminal of the component are stopped without flowing down to the bottom of the hole to securely bond the solder land and the lead terminal of the component. As a result, the side close to the chip body of the lead terminal is bonded, so that the occurrence of parasitic inductance can be avoided,
Therefore, it is possible to produce circuits with uniform performance.

[Brief description of drawings]

FIG. 1 is a flowchart showing a processing process of a solder bonding method of the present invention.

FIG. 2 is an explanatory diagram of a state corresponding to the processing process of FIG.

FIG. 3 is an explanatory view of a state by a conventional solder bonding method.

[Explanation of symbols]

 1 FET chip 2 Source electrode (lead terminal) 3 Printed wiring board 4 Solder land 22 Through-hole hole 20 Dam by solder A 21 Bonded part by solder A A, B area Tp Solder melting point (celsius) Tr Solder melting point (celsius) Celsius)

Claims (1)

[Claims] 1. A solder having a first melting point is used to form a dam which substantially fills a through-hole hole of a printed wiring board at a temperature of the melting point, and thereafter, a dam lower than the melting point of the solder is formed. 2. A solder bonding method for a component, comprising using the solder having a melting point of 2 and bonding the solder land at the upper end of the through hole to the lead terminal of the component at a temperature of the melting point.