JP3492826B2 - Chip soldering method - Google Patents

Chip soldering method

Info

Publication number
JP3492826B2
JP3492826B2 JP24112795A JP24112795A JP3492826B2 JP 3492826 B2 JP3492826 B2 JP 3492826B2 JP 24112795 A JP24112795 A JP 24112795A JP 24112795 A JP24112795 A JP 24112795A JP 3492826 B2 JP3492826 B2 JP 3492826B2
Authority
JP
Japan
Prior art keywords
chip
cream solder
substrate
land
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP24112795A
Other languages
Japanese (ja)
Other versions
JPH0983123A (en
Inventor
憲 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP24112795A priority Critical patent/JP3492826B2/en
Publication of JPH0983123A publication Critical patent/JPH0983123A/en
Application granted granted Critical
Publication of JP3492826B2 publication Critical patent/JP3492826B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3485Applying solder paste, slurry or powder

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

【発明の詳細な説明】 【0001】 【産業上の利用分野】本発明は、コンデンサチップや抵
抗チップなどのチップを基板のランドに半田付けするチ
ップの半田付け方法に関するものである。 【0002】 【従来の技術】コンデンサチップや抵抗チップなどのチ
ップ型電子部品(以下、チップという)は、基板のラン
ド上にクリーム半田を塗布し、このクリーム半田上に電
極を搭載して半田付けされる。以下、従来のチップの半
田付け方法について説明する。 【0003】図3は従来のクリーム半田が塗布された基
板の部分平面図、図4(a)(b)は同チップを半田付
け中のチップと基板の断面図である。図3において、基
板1の上面には回路パターンのランド2が形成されてい
る。またランド2上にはスクリーン印刷機などによりク
リーム半田3が塗布されている。 【0004】図4(a)は、チップ4を基板1に搭載し
た状態を示している。チップ4はモールド体5の両側部
に電極6を備えており、この電極6をクリーム半田3に
着地させて搭載されている。チップ4が搭載された基板
1は加熱炉へ送られ、クリーム半田3をその溶融温度以
上まで加熱することにより、半田付けが行われる。 【0005】図4(b)は、加熱炉で加熱中のチップを
示している。加熱炉で加熱されることによりクリーム半
田3は溶融するが、左右のクリーム半田3は同時に溶融
するとは限らない。本例では左側のクリーム半田3が右
側のクリーム半田3よりも先に溶融した場合を示してい
る。この場合、左側のクリーム半田3が溶融したことに
より表面張力が生じ、この表面張力によりチップ4は左
側へ引き付けられ、矢印方向へ起立してしまいやすいも
のであった。このようなチップ立ちは、チップが小型・
軽量化するほど発生しやすい。 【0006】 【発明が解決しようとする課題】したがって本発明は、
クリーム半田の溶融速度のアンバランスによって発生す
るチップ立ちを解消できるチップの半田付け方法を提供
することを目的とする。 【0007】 【課題を解決するための手段】このために本発明は、チ
ップの電極のタテ寸法Hとヨコ寸法Lの寸法比H/L
求めることによりチップ立ちを予知し、前記寸法比が
2.1以上であればクリーム半田をチップの電極よりも
内側のチップのモールド体の下面に対応する位置まで塗
布するようにスクリーンマスクのパターン孔を開孔して
基板のランド上にクリーム半田を塗布し、前記モールド
体の下面を前記クリーム半田に接着させて半田付けする
ようにしている。 【0008】 【作用】上記構成によれば、チップのモールド体はクリ
ーム半田に接着されているので、左右のクリーム半田の
溶融速度にアンバランスが生じて一方のクリーム半田が
先に溶融して表面張力が生じても、この接着力のために
チップ立ちが発生することはなく、チップの両側部の電
極を基板のランドに確実に半田付けできる。 【0009】 【実施例】次に、本発明の実施例を図面を参照して説明
する。図1は本発明の一実施例のクリーム半田が塗布さ
れた基板の部分平面図、図2(a)(b)は同チップを
半田付け中のチップと基板の断面図である。 【0010】図1において、基板1のランド2上にはス
クリーン印刷機などによりクリーム半田3が塗布されて
いる。図3に示す従来例では、クリーム半田3はランド
2の中央部に塗布されているのに対し、図1ではクリー
ム半田3はランド2の内端部まで塗布されている。この
ようにチップの電極よりも内側のモールド体の下面に対
応する位置までクリーム半田を塗布することにより、後
述するようにチップ立ちを阻止できる。 【0011】図2(a)はチップ4を基板1に搭載した
状態を示している。クリーム半田3はランドの内端部ま
で塗布されているので、モールド体5の下面はクリーム
半田3に接着されている。この基板1は加熱炉へ送られ
て加熱される。 【0012】図2(b)は加熱炉で加熱している状態を
示している。上述したように、左右のクリーム半田3は
同時に溶融するとは限らず、先きに溶融したクリーム半
田3の表面張力に引き寄せられて起立しようとするが、
モールド体5の下面はクリーム半田3に接着されている
ため、その接着力によりチップ4が起立するのは阻止さ
れる。したがって図2(b)に示すようにモールド体5
の両側部の電極6は、ランド2上に確実に半田付けされ
る。 【0013】ところで、加熱炉でクリーム半田を溶融さ
せる際に、チップ立ちが生じるか否かは、チップサイズ
やチップ重量などにより決定されるが、チップ立ちが生
じるか否かを予知できれば、スクリーンマスクの設計上
有利である。すなわちクリーム半田は、一般に、スクリ
ーン印刷機のスクリーンマスクのパターン孔を通してラ
ンド上に塗布されるが、チップが起立しやすいことが予
知できるならば、図1に示すようにクリーム半田をラン
ドの内端部まで塗布できるように、スクリーンマスクの
パターン孔を設計すればよいこととなる。 【0014】上述のように、チップ立ちが生じるか否か
は、チップサイズやチップ重量などにより決定される
が、もっと簡易な方法によりチップ立ちの有無を予知で
きることがスクリーンマスクの設計上望ましい。そこで
本発明者は実験を繰り返した結果、チップの電極のタ
テ、ヨコの寸法比によって、チップの起立の有無をほぼ
的確に予知できることを発見した。すなわち図2(a)
において、電極6のタテ寸法をH、ヨコ寸法をLとした
場合、H/L≧2.1であればチップ立ちが発生しやす
く、H/L<2.1であればチップ立ちは発生しにくい
ことを発見した。したがってこのH/Lの大きさを求め
ることによりチップ立ちの有無を予知し、H/L≧2.
1であれば、モールド体の下面に対応する位置までクリ
ーム半田を塗布できるように、スクリーンマスクのパタ
ーン孔を開孔し、このスクリーンマスクによりランド上
にクリーム半田を塗布すればよいこととなる。このよう
にH/Lの大きさを指標とすることにより、チップ立ち
の有無を予知し、スクリーンマスクの設計を行うことが
できる。 【0015】 【発明の効果】本発明によれば、チップの電極のタテ寸
法Hとヨコ寸法Lの寸法比H/Lを求めることによりチ
ップ立ちを予知し、前記寸法比が2.1以上であればク
リーム半田を電極よりも内側の前記チップのモールド体
の下面に対応する位置まで塗布し、この下面を前記クリ
ーム半田に接着させて半田付けするようにしているの
で、左右のクリーム半田の溶融速度にアンバランスが生
じて一方のクリーム半田が先に溶融しても、この接着力
のために、チップ立ちが発生することはなく、チップの
両側部の電極を基板のランドに確実に半田付けできる。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of soldering a chip such as a capacitor chip or a resistor chip to a land of a substrate. 2. Description of the Related Art Chip-type electronic components (hereinafter referred to as chips) such as a capacitor chip and a resistor chip are coated with cream solder on a land of a substrate, and electrodes are mounted on the cream solder and soldered. Is done. Hereinafter, a conventional chip soldering method will be described. FIG. 3 is a partial plan view of a conventional substrate to which cream solder is applied, and FIGS. 4 (a) and 4 (b) are cross-sectional views of the chip and the substrate while the chip is being soldered. In FIG. 3, a land 2 of a circuit pattern is formed on an upper surface of a substrate 1. A cream solder 3 is applied on the land 2 by a screen printing machine or the like. FIG. 4A shows a state where the chip 4 is mounted on the substrate 1. The chip 4 has electrodes 6 on both sides of the mold body 5, and the electrodes 6 are mounted on the cream solder 3 by landing. The substrate 1 on which the chip 4 is mounted is sent to a heating furnace, and soldering is performed by heating the cream solder 3 to a temperature higher than its melting temperature. FIG. 4B shows a chip being heated in a heating furnace. The cream solder 3 is melted by being heated in the heating furnace, but the cream solders 3 on the left and right are not always melted at the same time. In this example, the case where the cream solder 3 on the left is melted before the cream solder 3 on the right is shown. In this case, the surface tension is generated due to the melting of the cream solder 3 on the left side, and the chip 4 is attracted to the left side due to the surface tension, and tends to stand up in the direction of the arrow. This type of chip standing causes the chip to be smaller and smaller.
This is more likely to occur as the weight is reduced. [0006] Accordingly, the present invention provides
It is an object of the present invention to provide a chip soldering method capable of eliminating chip standing caused by imbalance in melting speed of cream solder. [0007] According to an aspect of the present invention To this end, foresee tombstoning by determining dimensional ratio H / L of the vertical dimension H and the horizontal dimension L of the tip of the electrode, the ratio of the dimensions is
If it is 2.1 or more, open the pattern hole of the screen mask so that the cream solder is applied to the position corresponding to the lower surface of the chip mold inside the chip electrode, and apply the cream solder on the land of the substrate. It is applied and the lower surface of the mold body is adhered to the cream solder and soldered. According to the above construction, since the mold of the chip is bonded to the cream solder, the melting speed of the left and right cream solders becomes unbalanced, and one of the cream solders melts first and the surface of the chip solders. Even if a tension occurs, the chip does not stand due to this adhesive force, and the electrodes on both sides of the chip can be securely soldered to the land of the substrate. Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a partial plan view of a substrate to which cream solder is applied according to one embodiment of the present invention, and FIGS. 2A and 2B are cross-sectional views of the chip and the substrate while the chip is being soldered. In FIG. 1, cream solder 3 is applied on a land 2 of a substrate 1 by a screen printing machine or the like. In the conventional example shown in FIG. 3, the cream solder 3 is applied to the center of the land 2, whereas in FIG. 1, the cream solder 3 is applied to the inner end of the land 2. By applying the cream solder to a position corresponding to the lower surface of the mold body inside the electrodes of the chip as described above, the standing of the chip can be prevented as described later. FIG. 2A shows a state where the chip 4 is mounted on the substrate 1. Since the cream solder 3 is applied to the inner end of the land, the lower surface of the mold body 5 is adhered to the cream solder 3. This substrate 1 is sent to a heating furnace and heated. FIG. 2B shows a state in which heating is performed in a heating furnace. As described above, the left and right cream solders 3 are not always melted at the same time, and tend to rise by being attracted by the surface tension of the previously melted cream solder 3,
Since the lower surface of the mold body 5 is bonded to the cream solder 3, the chip 4 is prevented from standing up due to the adhesive force. Therefore, as shown in FIG.
Are securely soldered on the lands 2. By the way, when the cream solder is melted in the heating furnace, whether or not the chip is formed is determined by the chip size, the chip weight, and the like. This is advantageous in terms of design. That is, the cream solder is generally applied onto the lands through the pattern holes of the screen mask of the screen printing machine. If it can be predicted that the chip is likely to stand upright, the cream solder is applied to the inner end of the lands as shown in FIG. What is necessary is just to design the pattern hole of the screen mask so that it can be applied to the part. As described above, whether or not a chip is formed is determined by the chip size, the chip weight, and the like. However, it is desirable from a design of a screen mask that the presence or absence of the chip can be predicted by a simpler method. Therefore, as a result of repeating the experiment, the inventor of the present invention has found that the presence or absence of the standing of the chip can be accurately predicted by the dimensional ratio of the length and width of the electrode of the chip. That is, FIG.
In the above, when the vertical dimension of the electrode 6 is H and the horizontal dimension is L, chip standing easily occurs when H / L ≧ 2.1, and chip standing occurs when H / L <2.1. I found it difficult. Therefore, by determining the magnitude of H / L, the presence / absence of chip standing is predicted, and H / L ≧ 2.
If 1, to allow solder paste to a position corresponding to the lower surface of the mold body, and opening the pattern holes of the screen mask, the lands on this screen mask
It is only necessary to apply cream solder to the surface . By using the magnitude of H / L as an index in this way, it is possible to predict the presence or absence of a chip standing and to design a screen mask. According to the present invention, the vertical dimension of the electrode of the chip is
By calculating the dimension ratio H / L of the modulus H and the horizontal dimension L,
If the dimensional ratio is 2.1 or more,
Molding the chip inside the chip inside the electrode with the ream solder
To the position corresponding to the lower surface of the
It is made to adhere to the solder and solder
Therefore, even if the melting speeds of the left and right cream solders are unbalanced and one of the cream solders melts first, the chip strength does not occur due to this adhesive force, and the electrodes on both sides of the chip are connected. Solder can be securely soldered to the land of the board.

【図面の簡単な説明】 【図1】本発明の一実施例のクリーム半田が塗布された
基板の部分平面図 【図2】本発明の一実施例のチップを半田付け中のチッ
プと基板の断面図 【図3】従来のクリーム半田が塗布された基板の部分平
面図 【図4】従来のチップを半田付け中のチップと基板の断
面図 【符号の説明】 1 基板 2 ランド 3 クリーム半田 4 チップ 5 モールド体 6 電極
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a partial plan view of a substrate coated with cream solder according to one embodiment of the present invention; FIG. Cross-sectional view [FIG. 3] Partial plan view of substrate on which conventional cream solder is applied [FIG. 4] Cross-sectional view of chip and substrate during soldering of conventional chip [Description of symbols] 1 substrate 2 land 3 cream solder 4 Chip 5 Mold 6 Electrode

───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 平4−151893(JP,A) 特開 平6−6021(JP,A) 特開 平3−73393(JP,A) 特開 平3−3391(JP,A) 特開 昭63−284891(JP,A) 実開 平3−50400(JP,U) (58)調査した分野(Int.Cl.7,DB名) H05K 3/34 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-4-151189 (JP, A) JP-A-6-6021 (JP, A) JP-A-3-73393 (JP, A) JP-A-3-3 3391 (JP, A) JP-A-63-284891 (JP, A) JP-A-3-50400 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H05K 3/34

Claims (1)

(57)【特許請求の範囲】 【請求項1】基板のランドにクリーム半田を塗布し、こ
のランド上にチップの両側部に設けられた電極を半田付
けするチップの半田付け方法であって、前記電極のタテ
寸法Hとヨコ寸法Lの寸法比H/Lを求めることにより
チップ立ちを予知し、前記寸法比が2.1以上であれば
前記クリーム半田を前記電極よりも内側の前記チップの
モールド体の下面に対応する位置まで塗布するようにス
クリーンマスクのパターン孔を開孔して基板のランド上
にクリーム半田を塗布し、前記モールド体の下面を前記
クリーム半田に接着させて半田付けすることを特徴とす
るチップの半田付け方法。
(57) [Claim 1] A method of soldering a chip, comprising applying cream solder to a land of a substrate and soldering electrodes provided on both sides of the chip on the land. Vertical of the electrode
The chip standing is predicted by obtaining the dimension ratio H / L of the dimension H and the horizontal dimension L. If the dimension ratio is 2.1 or more, the cream solder is applied to the chip inside the electrode. A pattern hole of a screen mask is opened so as to be applied to a position corresponding to the lower surface of the mold body, cream solder is applied on a land of the substrate, and the lower surface of the mold body is adhered to the cream solder and soldered. A chip soldering method, characterized in that:
JP24112795A 1995-09-20 1995-09-20 Chip soldering method Expired - Fee Related JP3492826B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24112795A JP3492826B2 (en) 1995-09-20 1995-09-20 Chip soldering method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24112795A JP3492826B2 (en) 1995-09-20 1995-09-20 Chip soldering method

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2000125763A Division JP2000323824A (en) 2000-01-01 2000-04-26 Soldering structure for chip

Publications (2)

Publication Number Publication Date
JPH0983123A JPH0983123A (en) 1997-03-28
JP3492826B2 true JP3492826B2 (en) 2004-02-03

Family

ID=17069691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24112795A Expired - Fee Related JP3492826B2 (en) 1995-09-20 1995-09-20 Chip soldering method

Country Status (1)

Country Link
JP (1) JP3492826B2 (en)

Also Published As

Publication number Publication date
JPH0983123A (en) 1997-03-28

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