JPH06268088A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH06268088A JPH06268088A JP5051673A JP5167393A JPH06268088A JP H06268088 A JPH06268088 A JP H06268088A JP 5051673 A JP5051673 A JP 5051673A JP 5167393 A JP5167393 A JP 5167393A JP H06268088 A JPH06268088 A JP H06268088A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- semiconductor device
- electromagnetic wave
- electromagnetic
- wave shielding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
- H01L23/295—Organic, e.g. plastic containing a filler
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置、特に、電
磁波による半導体素子の誤動作を防止して、高信頼度を
確保できる半導体装置の電磁波シールド技術に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to an electromagnetic wave shield technique for a semiconductor device capable of preventing malfunction of a semiconductor element due to electromagnetic waves and ensuring high reliability.
【０００２】[0002]
【従来の技術】半導体素子は、電磁波によって、誤動作
してしまうことがある。また、Ｘ線によるソフトエラー
に起因して、誤動作してしまうことがある。かかる事態
は、半導体装置の信頼性を失うことになる。そこで、半
導体装置を実装用基板に実装後に、高信頼度を要求され
る装置に於いては、当該基板単位もしくはモジュ−ル基
板上の各半導体パッケージ単位で、電磁波シールドフィ
ルムで覆う事により、これらの不具合を解消しようとし
ている。すなわち、当該基板全体に電磁波シールドフィ
ルムよりなる袋をかぶせたり、あるいは、個々のパッケ
ージ毎にそれぞれ電磁波シールドフィルムをかぶせたり
している。2. Description of the Related Art Semiconductor elements sometimes malfunction due to electromagnetic waves. Also, a malfunction may occur due to a soft error caused by X-rays. In such a situation, the reliability of the semiconductor device is lost. Therefore, after mounting the semiconductor device on the mounting substrate, in a device that requires high reliability, by covering the substrate unit or each semiconductor package unit on the module substrate with an electromagnetic wave shielding film, I am trying to resolve the problem. That is, the entire substrate is covered with a bag made of an electromagnetic wave shielding film, or each package is covered with an electromagnetic wave shielding film.
【０００３】[0003]
【発明が解決しようとする課題】しかるに、これでは、
基板実装後に電磁波対策が必要で、実装する側のセット
メーカーでの生産性が著しく阻害され、また、基板全体
に電磁波シールドフィルムよりなる袋をかぶせたりする
必要性等からスペース効率が悪いものになり、実装密度
も低いものになる。そこで、本発明は、基板実装後の電
磁波対策が不要となり、セットメーカーでの生産性が向
上でき、電磁波およびＸ線によるソフトエラーに起因す
る半導体素子の誤動作を防止して、信頼性を向上させる
ことのできる技術を提供することを目的とする。本発明
の前記ならびにそのほかの目的と新規な特徴は、本明細
書の記述および添付図面からあきらかになるであろう。However, in this case,
Electromagnetic wave countermeasures are necessary after mounting on the board, productivity of the set manufacturer on the mounting side is significantly impaired, and space efficiency is poor due to the need to cover the entire board with a bag made of an electromagnetic wave shielding film. , The packaging density is also low. Therefore, the present invention eliminates the need for countermeasures against electromagnetic waves after mounting on a substrate, can improve productivity in a set maker, prevent malfunction of semiconductor elements due to soft errors due to electromagnetic waves and X-rays, and improve reliability. The purpose is to provide a technology capable of doing so. The above and other objects and novel features of the present invention will be apparent from the description of the present specification and the accompanying drawings.
【０００４】[0004]
【課題を解決するための手段】本願において開示される
発明のうち代表的なものの概要を簡単に説明すれば、下
記のとおりである。すなわち、上記目的を達成するため
に、本発明では、半導体装置のモールドレジン内部に電
磁波シールド用のシールドキャップを埋め込みするよう
にし、また外部の当該半導体装置自体に電磁波シールド
用のシールドキャップを取付けするようにした。The outline of the representative ones of the inventions disclosed in the present application will be briefly described as follows. That is, in order to achieve the above object, in the present invention, a shield cap for electromagnetic wave shielding is embedded inside the mold resin of the semiconductor device, and the shield cap for electromagnetic wave shielding is attached to the external semiconductor device itself. I did it.
【０００５】[0005]
【作用】上記した手段によれば、半導体装置のモールド
レジン内部に電磁波シールド用のシールドキャップが埋
め込まれている事から、半導体素子の誤動作が防止で
き、また、Ｘ線によるソフトエラーの低減にも寄与する
ことができる。外部の当該半導体装置自体に電磁波シー
ルド用のシールドキャップを取付けする場合も同様であ
る。さらには、半導体装置自体が既に電磁波シールド用
のシールドキャップを有し、そのものを基板に実装すれ
ばよいので、基板実装後の電磁波対策に較べ、スペース
効率が良く、実装密度の向上が図れる。さらには、基板
実装後の電磁波対策が不要となる為、セットメーカーで
の生産性の向上が図れる。According to the above means, since the shield cap for electromagnetic wave shielding is embedded inside the molded resin of the semiconductor device, malfunction of the semiconductor element can be prevented, and also soft error due to X-ray can be reduced. Can contribute. The same applies when a shield cap for electromagnetic wave shielding is attached to the external semiconductor device itself. Furthermore, since the semiconductor device itself already has a shield cap for electromagnetic wave shielding, and the semiconductor device itself may be mounted on the substrate, space efficiency is improved and packaging density can be improved as compared with measures against electromagnetic waves after mounting on the substrate. Furthermore, since it is not necessary to take measures against electromagnetic waves after mounting on the board, the productivity of the set manufacturer can be improved.
【０００６】[0006]
【実施例】次に、本発明の実施例を図面を参照しつつ説
明する。 ［実施例１］図１は、本発明を適用した半導体装置の一
例を示す構造断面図である。図１に示すように、リード
フレーム１上に、半導体素子を含むチップ２をダイボン
ディングし、当該チップ２の電極（図示せず）とリード
フレーム１のボンデイング部（図示せず）とをボンデイ
ングワイヤ３でワイヤボンデイングする。次いで、チッ
プ２、ボンデイングワイヤ３およびチップとリードフレ
ーム１とのボンデイングワイヤ３による両接続部を、電
磁波シールド用のシールドキャップ４で覆う。次いで、
例えば、トランスモールドにより、当該電磁波シールド
用のシールドキャップ４の上から、例えばエポキシ樹脂
を用いたレジンモールドを行いモールド部５を形成す
る。当該リードフレーム１は、例えばＮｉ−Ｆｅ合金か
らなる。当該チップ２は、例えばシリコン単結晶基板か
ら成り、周知の技術によってその内部には多数の回路素
子が形成され、一つの回路機能が与えられている。回路
素子の具体例は、例えばＭＯＳトランジスタから成り、
これらの回路素子によって例えば論理回路およびメモリ
の回路機能が形成されている。 当該ボンデイングワイ
ヤ３は、例えばＡｕワイヤーにより構成される。上記実
施例によれば、半導体装置のモールド部５内部に内蔵さ
れた電磁波シールド用のシールドキャップ４により、チ
ップ２内の半導体素子を電磁波障害から保護し、誤動作
を防止し、また、Ｘ線によるソフトエラーからも保護す
ることができる。さらには、こうした半導体装置を基板
実装する場合、既に、半導体装置のモールド部５内部に
電磁波シールド用のシールドキャップ４が内蔵され、半
導体素子を含むチップ２を電磁波障害から保護している
ので、基板実装後の電磁波対策が不要となり、また、従
来の基板実装後の電磁波対策に較べ、スペース効率が良
く、実装密度の向上が図れる。さらに、基板実装後の電
磁波対策が不要となる為、セットメーカーでの生産性の
向上が図れる。Embodiments of the present invention will now be described with reference to the drawings. [Embodiment 1] FIG. 1 is a structural sectional view showing an example of a semiconductor device to which the present invention is applied. As shown in FIG. 1, a chip 2 including a semiconductor element is die-bonded on a lead frame 1, and an electrode (not shown) of the chip 2 and a bonding portion (not shown) of the lead frame 1 are bonded to each other by a bonding wire. Wire bond with 3. Next, the chip 2, the bonding wire 3, and both connecting portions of the chip and the lead frame 1 by the bonding wire 3 are covered with a shield cap 4 for electromagnetic wave shielding. Then
For example, a resin mold using, for example, an epoxy resin is formed on the shield cap 4 for electromagnetic wave shielding by a trans mold to form a mold portion 5. The lead frame 1 is made of, for example, a Ni—Fe alloy. The chip 2 is made of, for example, a silicon single crystal substrate, and a large number of circuit elements are formed therein by a well-known technique to provide one circuit function. A specific example of the circuit element is, for example, a MOS transistor,
The circuit functions of the logic circuit and the memory are formed by these circuit elements. The bonding wire 3 is composed of, for example, an Au wire. According to the above-described embodiment, the shield cap 4 for electromagnetic wave shielding built in the mold part 5 of the semiconductor device protects the semiconductor element in the chip 2 from electromagnetic interference, prevents malfunction, and also prevents X-rays. It can also protect against soft errors. Furthermore, when mounting such a semiconductor device on a substrate, since the shield cap 4 for electromagnetic wave shielding is already built in the mold portion 5 of the semiconductor device to protect the chip 2 including the semiconductor element from electromagnetic interference, Electromagnetic countermeasures after mounting are unnecessary, and space efficiency is improved and packaging density can be improved as compared with conventional electromagnetic countermeasures after mounting on a board. In addition, since it is not necessary to take measures against electromagnetic waves after mounting on the board, the productivity of the set manufacturer can be improved.
【０００７】［実施例２］図２は、本発明を適用した半
導体装置の他の外観図である。当該半導体装置も、上記
実施例１と同様に、その図示が省略されているが、リー
ドフレーム上に、半導体素子を含むチップをダイボンデ
ィングし、当該チップの電極とリードフレームのボンデ
イング部とをボンデイングワイヤでワイヤボンデイング
している。但し、この実施例では、例えば、トランスモ
ールドにより、例えばエポキシ樹脂を用いたレジンモー
ルドを行いモールド部５を形成後に、当該モールド部５
表面に電磁波シールド板６を貼付けしている。上記実施
例によっても、電磁波シールド板６により、半導体素子
を含むチップ２を電磁波障害から保護し、チップ２内部
の半導体素子の誤動作を防止し、また、Ｘ線によるソフ
トエラーからも保護することができる。さらには、こう
した半導体装置を基板実装する場合、既に、半導体装置
のモールド部５表面に電磁波シールド板６が取り付けさ
れ、これにより半導体素子を含むチップ２を電磁波障害
から保護し、また、Ｘ線によるソフトエラーからも保護
しているので、基板実装後の電磁波対策が不要となり、
また、従来の基板実装後の電磁波対策に較べスペース効
率が良く、実装密度の向上が図れる。さらに、基板実装
後の電磁波対策が不要となる為、セットメーカーでの生
産性の向上が図れる。以上本発明者によってなされた発
明を実施例にもとずき具体的に説明したが、本発明は上
記実施例に限定されるものではなく、その要旨を逸脱し
ない範囲で種々変更可能であることはいうまでもない。
例えば、以上の実施例では、この電磁波遮蔽板は、図２
に示すようにモールド部上面に貼る例を示したが、当該
電磁波遮蔽板を嵌め込みするようにしてもよい。以上の
説明では主として本発明者によってなされた発明をその
背景となった利用分野である樹脂封止型半導体装置に適
用した場合について説明したが、それに限定されるもの
ではない。[Embodiment 2] FIG. 2 is another external view of a semiconductor device to which the present invention is applied. Although not shown in the figure, the semiconductor device is not shown in the same manner as in the first embodiment, but a chip including a semiconductor element is die-bonded on the lead frame, and the electrode of the chip and the bonding portion of the lead frame are bonded. Wire bonding with wires. However, in this embodiment, for example, after resin molding using, for example, an epoxy resin is performed by transmolding to form the mold portion 5, the mold portion 5 is formed.
The electromagnetic wave shield plate 6 is attached to the surface. Also in the above embodiment, the electromagnetic wave shield plate 6 protects the chip 2 including the semiconductor element from electromagnetic interference, prevents the semiconductor element inside the chip 2 from malfunctioning, and also protects from soft errors due to X-rays. it can. Furthermore, when mounting such a semiconductor device on a substrate, the electromagnetic wave shield plate 6 is already attached to the surface of the mold part 5 of the semiconductor device, thereby protecting the chip 2 including the semiconductor element from electromagnetic interference, and by the X-ray. It also protects against soft errors, eliminating the need for electromagnetic wave countermeasures after board mounting.
In addition, space efficiency is better than that of the conventional electromagnetic wave countermeasures after board mounting, and the mounting density can be improved. In addition, since it is not necessary to take measures against electromagnetic waves after mounting on the board, the productivity of the set manufacturer can be improved. Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments, and various modifications can be made without departing from the scope of the invention. Needless to say.
For example, in the above embodiment, this electromagnetic wave shielding plate is shown in FIG.
Although the example in which the electromagnetic wave shielding plate is attached to the upper surface of the mold portion is shown as shown in, the electromagnetic wave shielding plate may be fitted. In the above description, the case where the invention made by the present inventor is mainly applied to the resin-encapsulated semiconductor device which is the field of application which is the background has been described, but the invention is not limited thereto.
【０００８】[0008]
【発明の効果】本願において開示される発明のうち代表
的なものによって得られる効果を簡単に説明すれば、下
記のとおりである。本発明によれば、半導体素子を含む
チップを電磁波障害から保護し、また、Ｘ線によるソフ
トエラーからも保護することができ、その電磁波対策が
既に半導体装置自体に施されているので、基板実装後の
電磁波対策が不要となり、また、従来の基板実装後の電
磁波対策に比較して、スペース効率が良く、実装密度の
向上が図れる。さらに、基板実装後の電磁波対策が不要
となる為、セットメーカーでの生産性の向上が図れる。The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. According to the present invention, a chip including a semiconductor element can be protected from electromagnetic interference and also can be protected from soft errors caused by X-rays, and the electromagnetic wave countermeasures have already been applied to the semiconductor device itself. It is not necessary to take countermeasures against electromagnetic waves later, and space efficiency is improved and packaging density can be improved as compared with conventional countermeasures against electromagnetic waves after mounting on a board. In addition, since it is not necessary to take measures against electromagnetic waves after mounting on the board, the productivity of the set manufacturer can be improved.
【図１】図１は、本発明を適用した半導体装置の一例を
示す構造断面図、FIG. 1 is a structural cross-sectional view showing an example of a semiconductor device to which the present invention is applied,
【図２】図２は、本発明を適用した半導体装置の他の外
観図FIG. 2 is another external view of a semiconductor device to which the present invention is applied.
１…リードフレーム、 ２…半導体素子を含むチップ、 ３…ボンデイングワイヤ ４…電磁波シールド用のシールドキャップ ５…レジンモールド部、 ６…電磁波シールド板 DESCRIPTION OF SYMBOLS 1 ... Lead frame, 2 ... Chip containing semiconductor element, 3 ... Bonding wire 4 ... Shield cap for electromagnetic wave shield 5 ... Resin mold part, 6 ... Electromagnetic wave shield plate
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成５年１０月２６日[Submission date] October 26, 1993
【手続補正１】[Procedure Amendment 1]
【補正対象書類名】図面[Document name to be corrected] Drawing
【補正対象項目名】全図[Correction target item name] All drawings
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図１】 [Figure 1]
【図２】 [Fig. 2]
Claims (2)
該半導体チップと該導電性支持体とをリード線で電気的
に接続し、該半導体チップ、該リード線および該半導体
チップと該導電性支持体とのリード線による接続部を覆
うようにして電磁波シールド用のシールドキャップを覆
設し、当該シールドキャップの周囲にレジンをモールド
してなることを特徴とする半導体装置。1. A semiconductor chip is mounted on a conductive support,
An electromagnetic wave is formed by electrically connecting the semiconductor chip and the conductive support with a lead wire, and covering the semiconductor chip, the lead wire and the connecting portion of the semiconductor chip and the conductive support with the lead wire. A semiconductor device comprising: a shield cap for a shield; and a resin molded around the shield cap.
半導体チップと該導電性支持体とをリード線で電気的に
接続し、該半導体チップ、該リード線および該半導体チ
ップと該導電性支持体とのリード線による接続部を覆う
ようにしてレジンをモールドし、当該レジンモールド表
面に電磁波シールド用のシールドキャップを取付けして
なることを特徴とする半導体装置。2. A semiconductor chip is mounted on a conductive support, and the semiconductor chip and the conductive support are electrically connected by a lead wire, and the semiconductor chip, the lead wire, and the semiconductor chip and the conductive material. 1. A semiconductor device, comprising: a resin molded so as to cover a connection portion of a conductive support with a lead wire; and a shield cap for electromagnetic wave shielding attached to a surface of the resin mold.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5051673A JPH06268088A (en) | 1993-03-12 | 1993-03-12 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5051673A JPH06268088A (en) | 1993-03-12 | 1993-03-12 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06268088A true JPH06268088A (en) | 1994-09-22 |
Family
ID=12893405
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5051673A Pending JPH06268088A (en) | 1993-03-12 | 1993-03-12 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06268088A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100448432B1 (en) * | 1997-10-28 | 2004-11-16 | 삼성전자주식회사 | Mold for fabricating air-cavity plastic package to improve reliability and reduce production cost |
| CN100353575C (en) * | 2003-12-25 | 2007-12-05 | 精工爱普生株式会社 | Light source unit and projector |
| JP2012069870A (en) * | 2010-09-27 | 2012-04-05 | Denso Corp | Electromagnetic shield structure of electronic component |
| CN104966699A (en) * | 2015-06-30 | 2015-10-07 | 陶象余 | Anti-radiation chip encapsulation casing |
| US10896879B2 (en) | 2018-03-14 | 2021-01-19 | Samsung Electronics Co., Ltd. | Semiconductor package having reflective layer with selective transmittance |
-
1993
- 1993-03-12 JP JP5051673A patent/JPH06268088A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100448432B1 (en) * | 1997-10-28 | 2004-11-16 | 삼성전자주식회사 | Mold for fabricating air-cavity plastic package to improve reliability and reduce production cost |
| CN100353575C (en) * | 2003-12-25 | 2007-12-05 | 精工爱普生株式会社 | Light source unit and projector |
| JP2012069870A (en) * | 2010-09-27 | 2012-04-05 | Denso Corp | Electromagnetic shield structure of electronic component |
| CN104966699A (en) * | 2015-06-30 | 2015-10-07 | 陶象余 | Anti-radiation chip encapsulation casing |
| US10896879B2 (en) | 2018-03-14 | 2021-01-19 | Samsung Electronics Co., Ltd. | Semiconductor package having reflective layer with selective transmittance |
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