JPH06253212A - Broad band matrix switcher - Google Patents

Broad band matrix switcher

Info

Publication number
JPH06253212A
JPH06253212A JP6257393A JP6257393A JPH06253212A JP H06253212 A JPH06253212 A JP H06253212A JP 6257393 A JP6257393 A JP 6257393A JP 6257393 A JP6257393 A JP 6257393A JP H06253212 A JPH06253212 A JP H06253212A
Authority
JP
Japan
Prior art keywords
circuit
buffer
output
matrix switcher
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6257393A
Other languages
Japanese (ja)
Inventor
Katsuya Kudo
勝也 工藤
Isao Fujita
勇雄 藤田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP6257393A priority Critical patent/JPH06253212A/en
Publication of JPH06253212A publication Critical patent/JPH06253212A/en
Pending legal-status Critical Current

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  • Studio Circuits (AREA)

Abstract

PURPOSE:To reduce power consumption of the switcher by providing a vibration function stop circuit for a buffer amplifier located at a pre-stage of a switch function to the matrix switcher in addition to a switch function of a cross point and applying ON/OFF control to the operation of the amplifier in interlocking with selection/non-selection of an input signal. CONSTITUTION:Circuit blocks 7-1, 7-2-7-n with an input buffer and switch circuits 3-5 arranged to them are arranged to plural input signals 1-1, 1-2-1-n and output signals selected by collecting output lines are outputted via an output buffer 8. The processing above is the same as a conventional matrix switcher, but in this invention, a dissolve circuit 6 is provided in interlocking with the switch circuit. For example, when a signal inputted to the block 7-1 is selected, the circuits 3, 4 are turned on and the circuit 5 is turned off and an operating current is supplied from the circuit 6 to the buffer in interlocking with above to allow the buffer to provide a signal and no operating current is supplied from the circuit 6 to the buffer 2 by turning off the circuits 3, 4 and turning on the circuit 5 in other blocks than the block 7-1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は,広帯域映像信号切換装
置特に広帯域マトリクススイッチャに関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wide band video signal switching device, and more particularly to a wide band matrix switcher.

【0002】[0002]

【従来の技術】一般的に信号増幅回路において,広い周
波数範囲特に数十MHZ 以上の高い周波数にわたり,平
坦な特性を得る場合,素子の入出力容量及び回路の浮遊
容量の影響を極力少なくするため低インピーダンスと
し,また,必要な出力信号を得るため動作電流を多くし
た回路定数としている。また,多数の信号の中から,切
換回路を設けて必要な信号のみをとりだす機能を持った
マトリクス・スイッチャでは,切換回路の素子及び配線
等により,高い周波数ほど不要な信号の漏洩が多くな
る。
BACKGROUND OF THE INVENTION Generally, the signal amplification circuit over a wide frequency range, especially tens MH Z frequency higher than the case of obtaining a flat characteristic, to minimize the effects of stray capacitance of the input and output capacitance and circuit elements Therefore, the impedance is low, and the circuit constant is set to increase the operating current to obtain the required output signal. Further, in a matrix switcher having a function of taking out only a necessary signal from a large number of signals by providing a switching circuit, unnecessary signals leak more at higher frequencies due to elements and wiring of the switching circuit.

【0003】従来の技術の例を複数入力,1出力に限定
して図2により説明する。複数の入力信号1−1,1−
2,…1−nの個々に対し,入力バッファ2と信号伝送
開閉装置(以下スイッチ回路と呼ぶ)3,4を配置した
回路ブロック9−1,9−2,…9−nを設け,各ブロ
ックのスイッチ回路4の出力回線を集合させ,選択した
出力信号を出力バッファ6より出力していた。また,ス
イッチ回路3,4が開状態の場合,接点間容量によるオ
フアイソレーションの劣化を防ぐため,スイッチ回路5
を閉じていた。
An example of a conventional technique will be described with reference to FIG. 2 by limiting to a plurality of inputs and one output. Multiple input signals 1-1, 1-
Circuit blocks 9-1, 9-2, ... 9-n in which an input buffer 2 and a signal transmission switchgear (hereinafter referred to as a switch circuit) 3, 4 are arranged for each of 2 ,. The output lines of the switch circuit 4 of the block are collected and the selected output signal is output from the output buffer 6. In addition, when the switch circuits 3 and 4 are in the open state, in order to prevent deterioration of off isolation due to the capacitance between contacts, the switch circuit 5
Was closed.

【0004】ここで,回路ブロック9は,その出力回線
を集合して出力バッファ8に導くためできるだけ隣接し
て配置する必要がある。従って,各回路ブロック間のク
ロストーク量が多かった。また,平坦な周波数特性を得
るために入力バッファ2を低インピーダンスとするた
め,多量の動作電流を供給する必要があった。なお,図
示していないがスイッチ回路3,4,5を動作させて入
力信号1−1,1−2…1−nのうちのいずれかを選択
した場合,他の回路ブロックのスイッチ回路3,4,5
は上記と逆の動作を行い,他の入力信号を出力しないよ
うに制御回路は構成されているものとする。
Here, the circuit blocks 9 must be arranged as close to each other as possible in order to collect their output lines and guide them to the output buffer 8. Therefore, the amount of crosstalk between each circuit block was large. In addition, since the input buffer 2 has a low impedance in order to obtain a flat frequency characteristic, it is necessary to supply a large amount of operating current. Although not shown, when the switch circuits 3, 4, 5 are operated to select any one of the input signals 1-1, 1-2, ... 1-n, the switch circuits 3, 4 of other circuit blocks are selected. 4,5
Performs the reverse operation to the above, and the control circuit is configured so as not to output other input signals.

【0005】[0005]

【発明が解決しようとする課題】前述のように信号出力
回線を集合して出力バッファへ導くので各信号系統の回
路ブロックを隣接して配置する必要がある。このため,
回路ブロック間のクロストーク量が多く,マトリクスス
イッチャの性能を阻害していた。また,入力バッファへ
多量の作動電流を供給するため,消費電力量が大きくな
り発熱量も多かった。本発明の目的は,これらの欠点を
除去し,クロストークの低減を図ると同時に消費電流の
低減を図った小型高性能の広帯域のマトリクススイッチ
ャを提供することにある。
As described above, since the signal output lines are gathered and led to the output buffer, it is necessary to arrange the circuit blocks of each signal system adjacent to each other. For this reason,
The amount of crosstalk between circuit blocks was large, impeding the performance of the matrix switcher. Moreover, since a large amount of operating current is supplied to the input buffer, the amount of power consumption is large and the amount of heat generated is large. An object of the present invention is to eliminate these drawbacks and to provide a small-sized, high-performance, wide-band matrix switcher in which the crosstalk is reduced and the current consumption is reduced.

【0006】[0006]

【課題を解決するための手段】本発明は上記目的を達成
するため,マトリクススイッチャにおいてクロスポイン
トのスイッチ機能の他にその前段のバッファアンプに増
幅機能停止(以下,ディゾルブという)回路を設けて、
各入力信号の選択,非選択に連動させて入力バッファア
ンプの動作をON/OFF制御するようにしたものであ
る。
In order to achieve the above object, the present invention provides a matrix switcher with a crosspoint switch function, and a buffer amplifier (hereinafter referred to as “dissolve”) circuit provided in the preceding stage of the buffer amplifier.
The operation of the input buffer amplifier is ON / OFF controlled in association with selection / non-selection of each input signal.

【0007】[0007]

【作用】その結果,入力信号が選択出力されていない入
力バッファに対し,ディゾルブ回路を作動させる(入力
バッファの作動を停止する)ことによりバッファの信号
出力がなくなり,クロストークを防ぐことができる。ま
た,上記により,選択出力されていない入力バッファは
作動しないので消費電力量は少ない。従って,マトリク
ススイッチャ自体の消費電力の低減が可能になる。
As a result, by activating the dissolve circuit (stopping the operation of the input buffer) with respect to the input buffer from which the input signal is not selectively output, the signal output of the buffer disappears and crosstalk can be prevented. Further, as described above, the power consumption is small because the input buffer that is not selectively output does not operate. Therefore, the power consumption of the matrix switcher itself can be reduced.

【0008】[0008]

【実施例】以下,本発明の実施例を,従来例と同様,複
数入力,1出力として図1により説明する。複数の入力
信号1−1,1−2,…1−n個々に対し,入力バッフ
ァ2とスイッチ回路3,4,5を配置した回路ブロック
7−1,7−2,…7−nを設置し,出力回線を集合さ
せ,選択した出力信号を出力バッファ8を介して出力す
る。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. For each of the plurality of input signals 1-1, 1-2, ... 1-n, circuit blocks 7-1, 7-2, ... 7-n in which an input buffer 2 and switch circuits 3, 4, 5 are arranged are provided. Then, the output lines are assembled and the selected output signal is output via the output buffer 8.

【0009】ここまでは従来の方法と同じであるが,本
発明ではスイッチ回路に連動したディゾルブ回路6を設
置する。例えば,回路ブロック7−1へ入力している信
号を選択すると,このブロックのスイッチ回路3,4が
ON,5がOFFとなり,これに連動してディゾルブ回
路6により入力バッファに作動電流を供給して信号を出
力する。この時,回路ブロック7−1以外については,
スイッチ回路3,4はOFF,5はONとなり,ディゾ
ルブ回路6は入力バッファ2へ作動電流を供給せず信号
を出力しない。従って,入力信号1−1以外の信号が回
路ブロック7−1に漏れ込むのを防ぐと同時に消費電力
を節減することができる。
Up to this point, the method is the same as the conventional method, but in the present invention, the dissolve circuit 6 interlocked with the switch circuit is installed. For example, when the signal input to the circuit block 7-1 is selected, the switch circuits 3 and 4 of this block are turned on and 5 is turned off, and in conjunction with this, the dissolve circuit 6 supplies the operating current to the input buffer. To output the signal. At this time, except for the circuit block 7-1,
The switch circuits 3 and 4 are turned off and the switch circuit 5 is turned on, so that the dissolve circuit 6 does not supply an operating current to the input buffer 2 and does not output a signal. Therefore, it is possible to prevent signals other than the input signal 1-1 from leaking into the circuit block 7-1 and at the same time reduce power consumption.

【0010】第1図においても図示していないがスイッ
チ回路3,4,5とディゾルブ回路6を動作させる制御
は,入力信号の選択に連動して行われる。上記におい
て,入力信号が選択されなかった系統の回路ブロックの
ディゾルブ回路はバッファへ作動電流を供給しないもの
としたが,この場合のバッファは動作しない程度の少量
の電流を流しておくことによって,入力信号の選択変更
時すなわちバッファの非動作から動作への切替わり時に
おけるノイズの発生を防止することができる。
Although not shown in FIG. 1, the control for operating the switch circuits 3, 4, 5 and the dissolve circuit 6 is performed in conjunction with the selection of the input signal. In the above, the dissolve circuit of the circuit block of the system where the input signal is not selected does not supply the operating current to the buffer. However, in this case, the buffer does not operate so that the input current is It is possible to prevent noise from occurring when the selection of the signal is changed, that is, when the buffer is switched from non-operation to operation.

【0011】なお,バッファ2とディゾルブ回路6,及
びスイッチ回路3,4,5はそれぞれ異なる回路素子で
構成することなく同様の動作を行う各1個のICで置き
換えることができる。実際のマトリクススイッチャでは
複数入力,複数出力として構成されており,図1におけ
る各入力系統において入力バッファ2の出力が複数の出
力に対応した複数のスイッチ回路に分配されるように構
成される。そして,各入力系統の所定出力系統ごとに各
スイッチ回路の出力回線を集合させ,各出力バッファを
介して出力端子へ導かれるようになっている。本発明を
適用した製品において,1入力信号系統につき5チャネ
ル(R,G,B,HD,VD)で,8入力,4出力の映
像マトリクススイチャの場合,周波数帯域:150MH
z(−3dB),クロストーク:−50dB(60MH
z),消費電力:100Wを達成し,クロストークは1
0dB以上の改善,消費電力は20%の低減を図ること
ができた。
The buffer 2, the dissolve circuit 6, and the switch circuits 3, 4, and 5 can be replaced with respective one ICs that perform the same operation without being composed of different circuit elements. The actual matrix switcher has a plurality of inputs and a plurality of outputs, and in each input system in FIG. 1, the output of the input buffer 2 is distributed to a plurality of switch circuits corresponding to the plurality of outputs. Then, the output lines of each switch circuit are collected for each predetermined output system of each input system, and are led to the output terminal via each output buffer. In the product to which the present invention is applied, in the case of a video matrix switcher having 8 inputs and 4 outputs with 5 channels (R, G, B, HD, VD) per 1 input signal system, frequency band: 150 MH
z (-3 dB), crosstalk: -50 dB (60 MH
z), power consumption: 100W, crosstalk is 1
We were able to improve it by over 0 dB and reduce power consumption by 20%.

【0012】[0012]

【発明の効果】以上説明したごとく,本発明によれば入
力バッファは選択された入力信号系統の回路ブロックの
もののみ動作するため,クロストークを大幅に低減させ
ることが出来る。また,非選択入力信号系統の入力バッ
ファには動作電流を供給しないため発熱量も低減され
る。従って,高性能で小型,低消費電力の広帯域マトリ
クススイッチャを実現することができる。
As described above, according to the present invention, the input buffer operates only in the circuit block of the selected input signal system, so that the crosstalk can be greatly reduced. In addition, since the operating current is not supplied to the input buffer of the non-selected input signal system, the heat generation amount is also reduced. Therefore, it is possible to realize a high performance, small size and low power consumption wide band matrix switcher.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明のマトリクススイッチャの部分的な系統
図である。
FIG. 1 is a partial systematic diagram of a matrix switcher of the present invention.

【図2】従来のマトリクススイッチャの部分的な系統図
である。
FIG. 2 is a partial system diagram of a conventional matrix switcher.

【符号の説明】[Explanation of symbols]

1−1,1−2,…1−n 入力信号 2 入力バッファ 3,4,5 スイッチ回路 6 ディゾルブ回路 7−1,7−2,…7−n 回路ブロック 8 出力バッファ 1-1, 1-2, ... 1-n input signal 2 input buffer 3, 4, 5 switch circuit 6 dissolve circuit 7-1, 7-2, ... 7-n circuit block 8 output buffer

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 複数の広帯域映像信号の中から単数また
は複数の任意の信号を選択して出力するマトリクススイ
ッチャにおいて,出力する各信号の選択,非選択に連動
させて入力バッファへの作動電流供給をそれぞれON,
OFFすることにより,不要信号の漏洩量及び消費電流
の低減を図るようにしたことを特徴とする広帯域マトリ
クススイッチャ。
1. A matrix switcher for selecting and outputting a single or a plurality of arbitrary signals from a plurality of wideband video signals, and supplying an operating current to an input buffer by interlocking with the selection and deselection of each signal to be output. Respectively ON,
A wide-band matrix switcher characterized by reducing the amount of unnecessary signal leakage and current consumption by turning it off.
【請求項2】 請求項1において,入力バッファへの作
動電流供給をOFFとした場合,出力信号が生じない程
度の微小電流が流れるようにしたことを特徴とする広帯
域マトリクススイッチャ。
2. The wide band matrix switcher according to claim 1, wherein when the operating current supply to the input buffer is turned off, a minute current that does not generate an output signal flows.
JP6257393A 1993-02-26 1993-02-26 Broad band matrix switcher Pending JPH06253212A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6257393A JPH06253212A (en) 1993-02-26 1993-02-26 Broad band matrix switcher

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6257393A JPH06253212A (en) 1993-02-26 1993-02-26 Broad band matrix switcher

Publications (1)

Publication Number Publication Date
JPH06253212A true JPH06253212A (en) 1994-09-09

Family

ID=13204185

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6257393A Pending JPH06253212A (en) 1993-02-26 1993-02-26 Broad band matrix switcher

Country Status (1)

Country Link
JP (1) JPH06253212A (en)

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