JPH06244103A - Manufacture of semiconductor - Google Patents

Abstract

PURPOSE:To provide a crystalline silicon film by a method wherein after clusters or the like are formed on a silicon film in the amorphous state, and reacted with amorphous silicon, catalyst material which has not yet reacted is eliminated, and annealing is performed at a temperature lower than the crystallization temperature of ordinary amorphous silicon. CONSTITUTION:A substratum silicon oxide film 12 of 2000Angstrom in thickness is formed by a plasma CVD method. An amorphous silicon film 13 is deposited to be 1500Angstrom thick by a plasma CVD method, and a nickel film 14 is deposited by a sputtering method. After that, the nickel film is made to react with the amorphous silicon film 13, and a thin crystalline silicon layer 15 is formed on the interface. Then annealing is performed for 8 hours in a nitrogen atmosphere at 450-580 deg.C in an annealing furnace. By the above process, the amorphous silicon film is crystallized, and a crystalline silicon film 16 can be obtaied.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film insulating gate type field effect transistor (thin film transistor or TF).
The present invention relates to a method for obtaining a crystalline semiconductor used in a thin film device such as T).

[0002]

2. Description of the Related Art Conventionally, a crystalline silicon semiconductor thin film used for a thin film device such as a thin film insulating gate type field effect transistor (TFT) is formed on an insulating surface such as an insulating substrate by a plasma CVD method or a thermal CVD method. The obtained amorphous silicon film was crystallized in a device such as an electric furnace at a temperature of 600 ° C. or more for a long time of 12 hours or more. In particular, a longer heat treatment was required to obtain sufficient characteristics (high electrolytic effect mobility and high reliability).

[0003]

However, such a conventional method has many problems. One is low throughput and therefore high cost. For example, if it takes 24 hours for this crystallization step, 720 substrates must be processed at the same time if the processing time per substrate is 2 minutes. However, for example, in a commonly used tubular furnace, the number of substrates that can be processed at one time is 50 at most, and when only one apparatus (reaction tube) is used, it takes as long as 30 minutes per substrate. I got it. Ie 1
To achieve a processing time of 2 minutes per sheet, 15 reaction tubes had to be used. This meant that the scale of the investment increased and that the depreciation of the investment was large, and that it was reflected in the cost of the product.

Another problem was the temperature of the heat treatment. In general, substrates used for manufacturing TFTs are roughly classified into those made of pure silicon oxide such as quartz glass, and non-alkali borosilicate glass such as Corning No. 7059 (hereinafter, Corning 7059). Of these, the former has excellent heat resistance and can be handled in the same manner as a normal semiconductor integrated circuit wafer process, and therefore has no problem with temperature. However, its cost is high, and it exponentially increases exponentially as the substrate area increases. Therefore, at present, T
Used only in FT integrated circuits.

On the other hand, alkali-free glass has a sufficiently low cost as compared with quartz, but has a problem in heat resistance, and generally has a strain point of about 550 to 650 ° C., and particularly easily available materials at 600 ° C. or lower. Therefore, the heat treatment at 600 ° C. causes irreversible shrinkage and warpage of the substrate. In particular, it was remarkable in a large substrate having a diagonal of more than 10 inches. For the above reasons, regarding the crystallization of the silicon semiconductor film, the heat treatment condition of 550 ° C. or lower and within 4 hours has been indispensable for cost reduction. An object of the present invention is to provide a method for manufacturing a semiconductor that satisfies such conditions and a method for manufacturing a semiconductor device using such a semiconductor.

[0006]

DISCLOSURE OF THE INVENTION According to the present invention, a disordered crystalline state which can be said to be an amorphous state or a substantially amorphous state (for example, a state where a portion having good crystallinity and an amorphous portion are mixed) Film, particles, clusters (hereinafter referred to as catalyst material) containing at least one of nickel, iron, cobalt, and platinum (hereinafter referred to as catalyst material) are formed on the silicon film in (1), and this is first reacted with amorphous silicon. Unreacted catalyst material is removed, and then the temperature is lower than the crystallization temperature of normal amorphous silicon, preferably 20 to 150 ° C. lower, eg 5
It is characterized in that a crystalline silicon film is obtained by annealing at a temperature of 80 ° C. or lower.

The present inventor has considered that the barrier energy of the above process is lowered by some catalytic action, in addition to the conventional idea of solid phase crystallization. The present inventors have nickel (Ni), iron (Fe), cobalt (Co), platinum (Pt) are likely to bind to the silicon, for example, in the case of nickel, easily nickel silicide (Formula NiSi _x, 0.
It was noted that 4 ≦ x ≦ 2.5) and that the lattice constant of nickel silicide is close to that of silicon crystal. Therefore, as a result of simulating the energy of the ternary system of crystalline silicon-nickel silicide-amorphous silicon, amorphous silicon easily reacts at the interface with nickel silicide, and the reaction of amorphous silicon + nickel silicide → nickel silicide + crystalline silicon It has become clear that The potential barrier of this reaction is sufficiently low and the reaction temperature is also low.

This reaction equation shows that nickel atoms transform amorphous silicon into crystalline silicon. Actually, at 580 ° C. or lower, the reaction starts and
It became clear that the reaction was observed even at 0 ° C. The crystalline silicon obtained by this reaction had good crystallinity. However, nickel atoms themselves are not preferable for silicon as a semiconductor material. Therefore, a step of removing nickel atoms is necessary. For this, hydrochloric acid (HCl) or hydrofluoric acid (HF) may be used. These acids attack nickel and nickel silicide, but do not attack amorphous silicon and crystalline silicon.

Even if the nickel atoms are removed, if the crystalline silicon formed by the above reaction remains, crystallization can be performed using this as a nucleus. As described above, it has been clarified that the crystallinity of the silicon crystal produced by the above reaction is good, and the crystallization of amorphous silicon is promoted by using the crystal as a nucleus. Typically,
2 compared to the crystallization temperature of normal amorphous silicon
It was shown that crystallization can be performed at a temperature of 0 to 150 ° C lower.
In addition, the time required for crystal growth has been shortened as compared with the conventional one. As a matter of course, the higher the temperature, the faster the crystallization proceeds. Similar reactions were observed with iron, cobalt, and platinum, although inferior to nickel.

In the present invention, it is preferable to use a film, particles, clusters or the like containing nickel, iron, cobalt, platinum simple substance or its silicide, etc. as the catalyst material. However, oxides of the above elements are not preferable. This is because the oxide is a stable compound and cannot initiate the above reaction.

In the present invention, the crystal growth direction can be controlled by providing the above-mentioned catalyst material selectively. The crystalline silicon obtained by using such a method is different from the conventional solid phase epitaxial growth,
Since it has a structure close to a single crystal with good crystallinity continuity over a long distance, it is convenient for use in a semiconductor element such as a TFT.

Further, the amorphous silicon film as a starting material for this crystallization has a better result (crystallization rate) as the hydrogen concentration is lower. However, since hydrogen is released as crystallization progresses, the hydrogen concentration in the obtained silicon film was not so clearly correlated with the hydrogen concentration in the amorphous silicon film as the starting material. The hydrogen concentration in crystalline silicon according to the present invention is typically 0.
The content was 01 at% or more and 5 at% or less. Furthermore, in order to obtain good crystallinity, the amorphous silicon film in the carbon, nitrogen, oxygen concentration may as small, 1 × 10 ¹⁹
It is desired to be cm ⁻³ or less.

[0013]

EXAMPLES Example 1 A method of forming a nickel film on a Corning 7059 glass substrate, crystallizing an amorphous silicon film using this as a catalyst to obtain a crystalline silicon film will be described with reference to FIG. A base silicon oxide film 12 having a thickness of 2000Å is formed on the substrate 11 by plasma C
It was formed by the VD method. Next, the amorphous silicon film 13 is deposited by plasma CVD to 500 to 3000 Å,
For example, 1500 Å is deposited, 430 ℃ in a nitrogen atmosphere, 0.
Hydrogen was discharged for 1 to 2 hours, for example, 0.5 hours.
Subsequently, the nickel film 14 having a thickness of 1 is formed by the sputtering method.
The accumulated amount is from 00 to 1000Å, for example, 500Å. The substrate is 100 to 500 ° C., preferably 18 when the nickel film is formed.
Good results were obtained by heating to 0-250 ° C.
This is because the adhesion is improved between the underlying silicon film and the nickel film. It was also possible to use nickel silicide instead of nickel. (Fig. 1 (A))

After that, the nickel film 14 and the amorphous silicon film 13 were reacted by heating at 450 to 580 ° C. for 1 to 10 minutes to form a thin crystalline silicon layer 15 at the interface. The thickness of this crystalline silicon layer depends on the reaction temperature and time, but at 550 ° C. for 10 minutes,
It was about 300Å. (Fig. 1 (B))

Next, the nickel film and the nickel silicide film formed by reaction with the nickel film were etched with 5 to 30% hydrochloric acid. This etching did not affect the crystalline silicon produced by the reaction of amorphous silicon and (silicicated) nickel. (FIG. 1C) Next, this was annealed in a nitrogen atmosphere at 450 to 580 ° C., for example, 550 ° C. for 8 hours in an annealing furnace. By this step, the amorphous silicon film was crystallized and the crystalline silicon film 16 could be obtained. The results of Raman scattering spectroscopy and X-ray diffraction of the crystalline silicon obtained at this time are shown in FIGS. 3 and 4. In FIG. 3, C-Si is a Raman spectrum of single crystal silicon which is a standard sample. Further, (a) is a Raman spectrum obtained in this example,
(B) is a Raman spectrum when normal amorphous silicon having no catalyst material is annealed under the above conditions. It can be seen that good crystalline silicon was obtained by the present invention.

Example 2 This example is shown in FIG. A 2000 Å-thick underlying silicon oxide film 22 was formed on a Corning 7059 glass substrate 21 by plasma CVD. Next, an amorphous silicon film 23 is deposited to a thickness of 500 to 3000 Å, for example, 500 Å and 1500 Å by the plasma CVD method, and the amorphous silicon film 23 is deposited in a nitrogen atmosphere at 430 ° C. for 0.1 to 2
Hydrogen was degassed for a time, for example, 0.5 hours.

Then, a nickel film having a thickness of 100 to 1000 Å, for example, 500 Å was deposited by the sputtering method. It was also possible to use nickel silicide instead of nickel. The nickel film thus formed was etched to form patterns 24a, 24b and 24c as shown in the figure. (FIG. 2 (A)) Then, it heats at 450-580 degreeC for 1-10 minutes,
The nickel films 24a to 24c and the amorphous silicon film 23 were made to react with each other to form thin crystalline silicon regions 25a, 25b and 25c at their interfaces. (Fig. 2 (B))

Next, the nickel film and the nickel silicide film formed by reaction with the nickel film were etched with 5 to 30% hydrochloric acid. This etching did not affect the crystalline silicon 25a to 25c produced by the reaction between amorphous silicon and (silicified) nickel. (FIG. 2 (C)) Next, this is placed in an annealing furnace at 450 to 580 ° C., for example, 5
Annealing was performed at 50 ° C. for 4 hours in a nitrogen atmosphere. Figure 2
In (D), in the intermediate state, crystallization proceeds from the previously formed crystalline silicon regions 25a to 25b, and the crystalline silicon regions 26a, 26b, and 26c become amorphous regions 2.
It shows how it expands in 3.

Finally, the amorphous silicon film was entirely crystallized to obtain a crystalline silicon film 27. In the first embodiment, the crystal growth direction proceeds vertically from the surface to the substrate side, whereas in the present embodiment, it proceeds laterally from the nickel pattern. For example, the crystalline silicon regions 26a to 26c shown in FIG. 2D each have a structure close to a single crystal. Therefore, potential barriers such as grain boundaries are relatively unlikely to occur in the lateral direction, which is convenient for use in TFTs and the like. However, for example, since crystal defects are large in the portion where the crystalline silicon regions 26a and 26b collide, it is not preferable to use that portion.
FIG. 5 shows the results of measuring the crystallization rate according to this example. It was revealed that the thicker the silicon film, the faster the crystallization proceeded.

[0020]

INDUSTRIAL APPLICABILITY As described above, the present invention is epoch-making in the sense that it accelerates the crystallization of amorphous silicon at a low temperature and in a short time.
Since the devices and methods are extremely general and are excellent in mass productivity, the benefits to the industry are immeasurable.

For example, since the conventional solid phase growth method requires annealing for at least 24 hours,
If the substrate processing time per sheet was 2 minutes, 15 annealing furnaces were required.
Since it can be shortened within the time, the number of annealing furnaces can be reduced to 1/6 or less. The improvement in productivity and the reduction in capital investment resulting from this result in a reduction in the substrate processing cost, which in turn leads to a reduction in the TFT price and thereby a new demand. As described above, the present invention is industrially useful and is suitable for patent.

[Brief description of drawings]

FIG. 1 is a sectional view showing a process of an example. (Example 1)

FIG. 2 is a sectional view showing a process of an example. (Example 2)

FIG. 3 shows a result of Raman scattering spectroscopy of a crystalline silicon film. (Example 1)

FIG. 4 shows an X-ray diffraction result of a crystalline silicon film.
(Example 1)

FIG. 5 shows a crystallization rate of silicon. (Example 2)

[Explanation of symbols]

 11 ... Substrate 12 ... Base silicon oxide film 13 ... Amorphous silicon film 14 ... Nickel film (particles, clusters) 15 ... Crystal silicon region 16 ... Crystal silicon region

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yasuhiko Takemura 398 Hase, Atsugi, Kanagawa Prefecture Semiconductor Energy Research Institute Co., Ltd.

Claims (4)

[Claims] 1. A first step of forming a substantially amorphous silicon film on a substrate, and forming a catalyst material containing at least one of nickel, iron, cobalt and platinum on the silicon film. A second step, a third step of reacting the surface of the amorphous silicon with a catalyst material, and a fourth step of removing the catalyst material after the step,
A fifth step of annealing the substrate at a temperature lower than the crystallization temperature of amorphous silicon after the above step, and a fifth step of manufacturing a semiconductor. 2. The catalyst material according to claim 1, wherein the catalyst material used in the second step contains silicon and nickel, and the composition ratio thereof is silicon / nickel = 0.4 to 2.5. Manufacturing method of semiconductor. 3. The method for producing a semiconductor according to claim 1, wherein the annealing temperature in the fifth step is lower than the crystallization temperature of normal amorphous silicon by 20 to 150 ° C. 4. The method for manufacturing a semiconductor according to claim 2, wherein the fourth step is performed using hydrochloric acid or hydrofluoric acid.