KR0180503B1 - Crystallized semiconductor layer semiconductor device using the same and process for their fabrication - Google Patents

Abstract

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor fabricated by a method comprising crystallizing a substantially amorphous silicon film by annealing at a temperature lower than a typical amorphous silicon crystallization temperature. A film, particles, clusters or the like of a catalyst material such as nickel, iron, cobalt, platinum, palladium alone or silicides thereof is formed above or below the amorphous silicon film, and among the materials formed by the reaction of this with amorphous silicon, the catalyst The substance containing the substance is removed, and crystallization is promoted by using the remaining crystalline silicon as a nucleus to obtain a crystalline silicon film.

Description

Thin film transistors, semiconductors and semiconductor devices

The present invention relates to a thin film insulated gate field effect transistor (hereinafter referred to as a thin film transistor or TFT).

Conventionally, a crystalline silicon semiconductor thin film used in a thin film device such as a thin-film insulated gate field effect transistor (TFT) is electrically converted to an amorphous silicon film formed on an insulating surface such as an insulating substrate by plasma CVD or thermal CVD. It was produced by crystallizing at a temperature of 600 DEG C or higher over 12 hours. In particular, in order to obtain good performance (high field effect mobility and high reliability), a longer heat treatment has been required.

However, this conventional method has many problems. One problem is that the throughput is high because of the low throughput. For example, if a time of 24 hours is required for this crystallization step and the processing time per substrate is 2 minutes, it is necessary to simultaneously process 720 sheets of substrate. However, for example, in a tubular furnace that is usually used, the maximum number of substrates that can be processed at one time is 50 sheets, and when only one apparatus (reaction tube) is used, the processing time per substrate is 30. It was minutes. That is, in order to make the processing time per board | substrate 2 minutes, 15 reaction tubes were needed. This means that the required investment is large, the depreciation of the investment is large, and the price of the product is high.

Another problem was the temperature of the heat treatment. Typically, the substrate used in the fabrication of TFTs can be roughly divided into pure silicon oxide, such as quartz glass, and alkali-free borosilicate glass, such as Corning's # 7059 (hereafter referred to as Corning 7059). have. Among them, the former is excellent in heat resistance and can be handled in the same way as the substrate is handled in a normal semiconductor integrated circuit wafer process, so there is no problem with regard to heat. However, his price is expensive, and his price increases exponentially with the increase of the substrate area. Therefore, it is currently used only for TFT integrated circuits having a relatively small area.

On the other hand, alkali-free glass has a sufficiently low price compared to quartz, but has a problem in terms of heat resistance, and generally its strain point is about 550 to 650 ° C, and especially 600 ° C or less in a material that is easy to obtain, so that heat treatment at 600 ° C. In Esau, a problem of irreversible shrinkage and distortion occurred in the substrate. This problem was especially noticeable on large substrates with diagonals exceeding 10 inches. For this reason, regarding the crystallization of the silicon semiconductor film, it was considered that heat treatment conditions of 550 ° C. or less and within 4 hours are indispensable for cost reduction. An object of the present invention is to provide a semiconductor manufacturing method which solves these conditions and a semiconductor device manufacturing method using such a semiconductor.

In the present invention, nickel is placed on or under a silicon film in an amorphous state or in a complicated crystalline state (for example, a state where a good crystallinity part and an amorphous part are mixed) that can be said to be an amorphous state. , Iron, cobalt, platinum or palladium-containing films, island-like films, dots, lines, particles, or clusters, and the like, which are lower than the usual amorphous silicon crystallization temperature, preferably lower than 20 to 150 ° C. Or annealing at a temperature lower than the glass transition point of the substrate, for example, 580 ° C. or lower, to obtain a crystalline silicon film.

Regarding the crystallization of the conventional silicon film, a method of performing solid phase epitaxial growth using a crystalline island-like film as a nucleus and a seed crystal has been proposed (for example, Japanese Patent Laid-Open Publication). 1-214110). In this method, however, crystal growth hardly proceeded at a temperature of 600 ° C or lower. In the silicon system, generally, in order to transition from an amorphous state to a crystalline state, a small amount of these molecules are broken in a state in which the molecular chains in the amorphous state are cleaved and these cleaved molecules are not bonded again with other molecules. It is introduced into a molecule having crystalline properties and reassembled into a part of the crystal. However, in this process, a large amount of energy is required to cleave the original molecular chain and keep these cleaved molecules unbound with other molecules, which was a barrier in the crystallization reaction. In order to provide this energy, several hours are required at a temperature of about 1000 ° C., or several hours at a temperature of about 600 ° C., and the required time is exponentially dependent on the temperature (= energy), so 600 ° C. For example, it was hard to observe that a crystallization reaction advanced at 550 degreeC. Conventional notions of solid state epitaxial crystallization have not provided an answer to this problem.

The inventors have considered reducing the barrier energy of the process by the action of certain catalysts, completely separate from conventional solid phase crystallization concepts. The inventors have found that nickel, iron, cobalt, platinum and palladium readily bond with silicon, for example, in the case of nickel, nickel silicide (formula NiSi _x , 0.4 ≦ x ≦ 2.5) is formed, and the lattice of nickel silicide Note that the integer is close to that of the silicon crystal. Accordingly, simulation of the ternary energy of crystalline silicon-nickel silicide-amorphous silicon and the like revealed that the amorphous silicon easily reacts at the interface with the nickel silicide and the following reaction occurs.

Amorphous silicon (silicon A) + nickel silicide (silicon B) → nickel silicide (silicon A) + crystalline silicon (silicon B). … … … (One)

(A and B represent the position of silicon)

The potential barrier of this reaction is low enough, and the temperature of the reaction is also low.

This scheme shows that nickel reconstructs amorphous silicon into crystalline silicon as it progresses. In fact, it was found that the reaction was initiated at 580 ° C. or lower, and the reaction was observed even at 450 ° C. Typically, crystallization has been shown to be possible at temperatures between 20 and 150 ° C. below conventional amorphous silicon crystallization temperatures. Naturally, the higher the temperature, the faster the reaction proceeds.

In the present invention, nickel, iron, cobalt, platinum or palladium alone or their silicides, acetates or islands of islands (islands), stripes, lines or spots, or nickel, iron, cobalt Membranes, particles or clusters containing at least one of platinum, palladium can be used as starting materials. As the reaction proceeds, nickel, iron, cobalt, platinum or palladium expands around the starting material, expanding the region of crystalline silicon. On the other hand, oxides are not preferred as materials containing nickel, iron, cobalt, platinum or palladium because they are stable compounds and do not initiate the reaction.

As described above, the crystalline silicon extending from a specific place is different from the conventional solid state epitaxial growth, but has a good crystallinity continuity and has a structure close to the single crystal structure, which is advantageous for use in semiconductor devices such as TFTs. When materials containing nickel, iron, cobalt, platinum, or palladium were uniformly dispersed on a substrate, the starting point of crystallization was myriad, and it was difficult to obtain a film having good crystallinity.

The lower the concentration of hydrogen of the amorphous silicon film as a starting material of this crystallization, the better the result (crystallization rate) is obtained. However, since hydrogen was released as crystallization progressed, such a clear correlation was not found between the hydrogen concentration in the obtained silicon film and the hydrogen concentration of the amorphous silicon film as a starting material. The hydrogen concentration in the crystalline silicon obtained according to the present invention was typically 1 × 10 ¹⁵ atoms · cm ^{−3 to} 5 atomic%. In addition, in order to obtain good crystallinity, the concentrations of carbon, nitrogen, and oxygen in the amorphous silicon film should be as low as possible, preferably 1 × 10 ¹⁹ cm ^-3 or less. Therefore, this should be taken into account in selecting nickel, iron, cobalt, platinum or palladium used in practicing the present invention.

A feature of the present invention is that crystal growth proceeds in a circular manner. This is because nickel in the above reaction proceeds in an isotropic phase, which is different from conventional crystallization in which growth occurs linearly along the crystal lattice surface.

In particular, by selectively disposing a material containing nickel, iron, cobalt, platinum or palladium, it is possible to control the direction of crystal growth. Unlike crystalline silicon produced by conventional solid state epitaxial growth, crystalline silicon obtained by using this kind of technology has a structure of good crystallinity continuity over a long distance and close to single crystal, and thus, It is very suitable for use in semiconductor devices.

In the present invention, nickel, iron, cobalt, platinum or palladium are used, but these materials are not preferable for silicon used as a semiconductor material. When the catalyst material added to promote crystallization remains in the active layer of the semiconductor device, there is a problem such that the leakage current is increased. Therefore, if such a substance is excessively contained in the silicon film, it is necessary to remove the substance. As for nickel, when the crystal growth of nickel silicide reaches its end point as a result of the reaction, that is, when crystallization is completed, the nickel silicide is easily dissolved in hydrofluoric acid or hydrochloric acid. Therefore, by treating with these acids, nickel contained in the substrate can be reduced.

When catalyst elements such as nickel, iron, cobalt, platinum and palladium are almost uniformly diffused throughout the silicon film by annealing for crystallization, a process for removing nickel is necessary. For this nickel removal, it has been found that annealing at 400 to 650 DEG C in an atmosphere containing chlorine atoms in the form of chlorine or chloride is effective. The annealing time was suitably 0.1 to 6 hours. The longer the annealing time, the lower the nickel concentration in the silicon film, but the annealing time can be determined according to the balance between the manufacturing cost and the required properties of the workpiece. Examples of the chloride include hydrogen chloride, various methane chlorides (CH ₃ Cl, CH ₂ Cl ₂ , CHCl ₃ ), various ethane chlorides (C ₂ H ₅ Cl, C ₂ H ₄ Cl ₂ , C ₂ H ₃ Cl ₃ , C ₂ H ₂ Cl ₄ , C ₂ HCl ₅ ) and various ethylene chlorides (C ₂ H ₃ Cl, C ₂ H ₂ Cl ₂ , C ₂ HCl ₃ ). In particular, the most readily available material is trichloroethylene (C ₂ HCl ₃ ). According to the SIMS (Secondary Ion Mass Spectrometry) method, the preferred concentration of nickel, iron, cobalt, platinum or palladium in the silicon film (silicon film used in a semiconductor device such as TFT) according to the present invention is 1 × 10 ¹⁵ cm ^-3. It was found to be 1 atomic%, more preferably 1 × 10 ^{15 to} 1 × 10 ¹⁹ cm ⁻³ . At concentrations smaller than the above ranges, crystallization does not proceed sufficiently, and at high concentrations, characteristics and reliability deteriorate.

Objects in the form of a film containing nickel, iron, cobalt, platinum or palladium can be formed using various physical and chemical methods. For example, methods requiring vacuum devices such as vacuum deposition, sputtering and CVD methods, and atmospheric methods such as spin coating and dipping (coating), doctor blade methods, screen printing and spray pyrolysis methods Can be used.

In particular, the spin coating method and the dipping method are techniques that provide excellent film thickness uniformity and enable fine concentration adjustment without requiring huge equipment. Solutions for use in this technique include acetates and nitrates of nickel, iron, cobalt, platinum and palladium, or various carboxylic acid chlorides or dissolved or dispersed in water, alcohols (low and high) or petroleum (saturated hydrocarbons or unsaturated hydrocarbons), or the like. Other organic acid chlorides can be used.

In this case, however, oxygen and carbon contained in these salts may diffuse into the silicon film, thereby deteriorating semiconductor characteristics. However, as a result of investigation by thermal equilibrium and differential thermal analysis, oxides or After crushing alone, it was confirmed that a material that hardly diffuses into the silicon film was suitable. In particular, when lower substances such as acetates and nitrates are heated in a reducing atmosphere such as a nitrogen atmosphere, they break down at 400 ° C. or lower to form a metal body. Similarly, when they are heated in an oxygen atomizer, oxides first form and then oxygen escapes at high temperatures, leaving behind a metallic body.

The crystalline silicon film formed according to the present invention is used in a semiconductor device such as a TFT. As can be seen from the above description, a large grain boundary exists at the end of the crystallization, which is where the tip of the crystal growth initiated from a number of starting points meets, and the concentration of nickel, iron, cobalt, platinum or palladium is high. For these reasons, it is not desirable to manufacture a semiconductor device. In particular, the channel of the TFT should not be provided in a region having a large grain boundary.

The region which is the starting point of crystallization, ie, the region provided with the material containing nickel, iron, cobalt, platinum or palladium, has a high concentration of nickel, iron, cobalt, platinum or palladium. For this reason, attention must be paid to the fabrication of semiconductor devices. In addition, such regions are easily etched by a solution containing hydrofluoric acid as compared to a silicon film containing no nickel, iron, cobalt, platinum or palladium. For this reason, such regions become a cause of defective contact formation. Therefore, when fabricating a semiconductor device using the present invention, it is necessary to optimize the pattern of the nickel, iron, cobalt, platinum, or palladium-containing film and the pattern of the semiconductor device which are the starting points of the crystallization.

In addition, according to the present invention, nickel, iron, or silicon on an amorphous silicon film or a film having a difficult crystalline state (for example, a state in which a crystalline portion and an amorphous portion are mixed) may be considered to be amorphous. Forming a film, particle or cluster containing at least one of cobalt, platinum or palladium (hereinafter referred to as a catalytic material); First reacting the catalytic material with amorphous silicon and then removing the unreacted catalyst material; And annealing the obtained structure to a temperature lower than the usual amorphous silicon crystallization temperature, preferably 20 to 150 ° C., or to a temperature below the glass transition temperature of a glass material normally used as a substrate, for example, 580 ° C. or less. Provided is a method of manufacturing a semiconductor device, the method comprising:

Even after nickel, iron, cobalt, platinum or palladium atoms are removed from the crystalline silicon, crystallization can be initiated using the remaining crystalline silicon formed by the above reaction (1) as a nucleus. As described above, the silicon crystal formed by the reaction has excellent crystallinity. Therefore, it has been found that these crystals can be used as nuclei to promote the crystallization of amorphous silicon. Typically, it has been shown that crystallization can be achieved at a temperature 20-150 ° C. below the normal amorphous silicon crystallization temperature. It has also been found that the time required for crystal growth is shortened. Of course, the higher the temperature, the faster the crystallization proceeds. Although less active than using nickel, similar reactions have been found to occur with iron, cobalt, platinum or palladium. Hereinafter, the present invention will be described in more detail based on Examples.

1 (A) to (D) are sectional views showing the manufacturing process of Example 1 of the present invention.

2 (A) to (E) are sectional views showing the production process of Example 2 of the present invention.

3 is a graph showing the results of Raman scattering spectroscopy of the crystalline silicon film obtained in Example 1. FIG.

4 is a diagram showing an X-ray diffraction pattern of the crystalline silicon film obtained in Example 1. FIG.

5 is a graph showing the crystallization rate of silicon in Example 2. FIG.

6 (A) to (E) are sectional views showing the production process of Example 3 of the present invention.

7 (A) to (C) are sectional views showing a catalyst element introduction step using a solution in Example 4. FIG.

8 (A) to (C) are plan views showing a crystallization process for producing a TFT according to the present invention and the arrangement of the TFT.

9 (A-1) to (D) are sectional views showing a step of selectively crystallizing a film according to the present invention.

10 (A) to (C) are sectional views showing the manufacturing process of Example 5 of the present invention;

11 (A) to (C) are sectional views showing the manufacturing process of Example 5 of the present invention;

12 (A) to (C) are sectional views showing the manufacturing process of Example 6 of the present invention;

13 (A) to (C) are sectional views showing the manufacturing process of Example 7 of the present invention;

14 (A) to (D) are sectional views showing the manufacturing process of Example 8 of the present invention;

15 (A) to (D) are sectional views showing the manufacturing process of Example 9 of the present invention;

16 is a graph showing the nickel concentration in the crystalline silicon film in Example 9. FIG.

17 (A) to (C) are sectional views showing the fabrication process in Example 10 of the present invention;

18 (A) and (B) are sectional views showing the fabrication process in Example 11 of the present invention;

19 (A) to (E) are sectional views showing the fabrication process in Example 12 of the present invention;

20 (A) to (E) are sectional views showing the manufacturing process of Example 13 of the present invention;

21 (A) to (D) are sectional views showing the manufacturing process of Example 14 of the present invention;

(A)-(D) is sectional drawing which shows the manufacturing process of Example 15 of this invention,

23 (A) to (C) are sectional views showing the fabrication process in Example 16 of the present invention.

24 (A) to (C) are sectional views showing the manufacturing process of Example 17 of the present invention.

25 is a graph showing the nickel concentration in the crystalline silicon film in Example 17. FIG.

26 (A) to (F) are sectional views showing the manufacturing process of Example 18 of the present invention.

* Explanation of symbols for main parts of the drawings

11: Substrate 12: Silicon Oxide Film 13: Amorphous Silicon Film

14: nickel film 15: thin crystalline silicon film 16: crystalline silicon film

26a to 26c: crystalline silicon region 124a, 124b: anodic oxide 155: nickel silicide region

180: silicon oxide film 182: thin silicon oxide film 183: water film

184: spinner 203: nickel film 204: amorphous silicon film

234: resist pattern 253: resist pattern 254: nickel film

Example 1

A method of obtaining a crystalline silicon film by forming a nickel film on a Corning # 7059 glass substrate and crystallizing the amorphous silicon film using the nickel film as a catalyst will be described based on FIGS. 1A to 1D.

A silicon oxide film 12 having a thickness of 2000 GPa was formed on the substrate 11 as a base film by plasma CVD, and thereafter, the amorphous silicon film 13 was 500-3000 GPa, for example. And formed to a thickness of 1500 kPa. The silicon film was kept at 430 ° C. in a nitrogen atmosphere at 0.1 to 2 hours, for example, 0.5 hours to remove hydrogen from the film, and then the nickel film 14 was sputtered on the film by a sputtering method. For example, a thickness of 500 mm 3 was deposited. When the nickel film is formed, good results can be obtained by heating the substrate to a temperature of 100 to 500 DEG C, preferably 180 to 250 DEG C, since the adhesion of the nickel film to the silicon oxide film formed as the underlayer is improved. to be. Instead of the nickel film, a nickel silicide film may be used (Fig. 1 (A)).

Then, the nickel film 14 and the amorphous silicon film 13 are reacted by heating at 450-580 degreeC for 1 to 10 minutes, and the thin crystalline silicon film 15 is obtained in those interfaces. The thickness of the crystalline silicon film depends on the reaction temperature and the reaction time, and a film having a thickness of about 300 mm 3 can be obtained at a reaction of 550 ° C. for 10 minutes.

Next, the nickel silicide film obtained from the nickel film through the nickel film and the reaction was etched with hydrochloric acid at a concentration of 5 to 30%. In this etching, there was no influence on the crystalline silicon formed by the reaction of amorphous silicon with nickel (silicide) (Fig. 1 (C)).

Subsequently, this was annealed for 8 hours under an atmosphere of nitrogen in an annealing furnace maintained at 450 to 580 ° C, for example, 550 ° C. In this step, the amorphous silicon film was crystallized to obtain a crystalline silicon film 16 (Fig. 1 (D)). The results of Raman scattering spectroscopy and X-ray diffraction of the obtained crystalline silicon film are shown in Figs. 3 and 4, respectively. In Fig. 3, the curve denoted by C-Si is a Raman spectrum of single crystal silicon which is a standard sample, and the curves denoted by (a) and (b) show the Raman spectrum of the silicon film obtained in this example, and usually have no catalyst material. The Raman spectrum of the film | membrane obtained by annealing amorphous silicon of the above conditions is shown, respectively. It is clear from this result that good silicon crystals are obtained by the process according to the present invention.

Example 2

This embodiment is shown to FIG. 2 (A)-(E). A 2000 nm thick silicon oxide film 22 was formed on the Corning # 7059 glass substrate 21 as a base film by a plasma CVD method, and an amorphous silicon film 23 was formed thereon at 500 to 3000 mm 3, for example, It deposited at the thickness of 500-1500 mm <3>. The silicon film is kept at 430 ° C. in a nitrogen atmosphere at 0.1 to 2 hours, for example, 0.5 hours to remove hydrogen from the film, and the nickel film is 100 to 1000 Pa, for example, 500 Pa by sputtering thereon. Deposited in thickness. Instead of the nickel film, a nickel silicide film may be used. The nickel film thus obtained was etched to form nickel films 24a, 24b, and 24c having a predetermined pattern. (FIG. 2A).

Thereafter, the film was heated at 450 to 580 ° C for 1 to 10 minutes to react the nickel films 24a to 24c with the amorphous silicon film 23 to form thin crystalline silicon regions 25a, 25b, and 25c at their interfaces. (Fig. 2 (B))

Subsequently, the nickel silicide film obtained from the nickel film through the nickel film and the reaction was etched with hydrochloric acid at a concentration of 5 to 30%. In this etching, there was no influence on the crystalline silicon regions 25a to 25c formed by the reaction of amorphous silicon with nickel (silicide) (Fig. 2 (C)).

Next, it was annealed for 4 hours under nitrogen atmosphere in an anneal furnace which was maintained at 450-580 degreeC, for example, 550 degreeC. 2D shows that in the intermediate state of the annealing, crystallization proceeds from the previously formed crystalline silicon regions 25a to 25c so that the crystalline silicon regions 26a, 26b and 26c are enlarged into the amorphous region 23. Indicates an outgoing appearance.

Finally, all of the amorphous silicon film was crystallized to obtain a crystalline silicon film 27 (FIG. 2 (E)). In contrast to the case of Example 1 in which crystal growth proceeds vertically from the surface to the substrate side, in this embodiment, crystal growth proceeds laterally from the nickel film pattern. For example, the crystalline silicon regions 26a to 26c shown in Fig. 2D each have a crystal structure close to a single crystal. Therefore, since the potential barrier is less likely to occur laterally in the crystalline silicon region, this structure can be suitably applied to a semiconductor device such as a TFT. However, in the part where the crystalline silicon regions 26a and 26b collide with each other, for example, since the crystal defect is large, it is not preferable to use the part.

5 shows the relationship between the crystallization rate and the crystallization temperature in this example. The thicker the silicon film, the faster the crystallization was found.

Example 3

This embodiment relates to a method of obtaining a silicon film having improved crystallinity by irradiating a laser beam onto the silicon film after crystallizing the silicon film once by heating. In addition, the present embodiment provides a process for producing a TFT using the silicon film thus crystallized.

6 (A) to (E) are sectional views showing the manufacturing process of this embodiment. First, a silicon oxide film 602 having a thickness of 2000 GPa was formed on the Corning # 7059 glass substrate 601 as a base film by plasma CVD, and an intrinsic (type I) amorphous silicon film was formed thereon from 100 to 1500 GPa, For example, it was deposited to a thickness of 800 mm 3. Next, a process similar to that described in Example 2 (see Fig. 2A) was selectively deposited on the silicon film with a catalyst material that promotes crystallization of the nickel film, i.e., amorphous silicon. Then, the obtained structure was heated at 450-580 degreeC for 1 to 10 minutes, the nickel film was made to react with an amorphous silicon film, and the thin crystalline silicon film was obtained at the interface.

Next, the nickel silicide film obtained from the nickel film through the nickel film and the reaction was etched with hydrochloric acid at a concentration of 5 to 30%. In this etching, there was no influence on the crystalline silicon formed by the reaction of amorphous silicon with nickel (silicide).

Then, annealing was further performed at 550 ° C. for 12 hours in an atmospheric nitrogen atmosphere to obtain a crystalline silicon film 603 covering the entire surface of the structure.

Thereafter, a KrF excimer laser was used to irradiate the surface of the crystalline silicon film 603 with laser light having a wavelength of 248 nm and a pulse width of 20 nsec to further promote crystallization of the silicon film. At this time, 2 shots of the laser beam were irradiated with an output energy density of 200 to 400 mJ / cm ² , for example, 250 mJ / cm ² . By maintaining the substrate at 300 ° C by heating during the laser light irradiation, the effect of the laser light irradiation was enhanced. Generally, it is preferable to heat a board | substrate to 200-450 degreeC. (FIG. 6 (A))

In addition to the KrF excimer laser, laser light emitted from an XeCl excimer laser operating at a wavelength of 308 nm and an ArF excimer laser operating at a wavelength of 193 nm may be used. Alternatively, instead of laser light, strong light equivalent to laser light may be irradiated. In particular, the use of RTA (Rapid Heat Annealing) including irradiating infrared light is effective because the silicon film can be selectively heated in a short time.

Thus, a silicon film having good crystallinity can be obtained using any of the above methods. The crystalline silicon film 603 crystallized by opening anneal was changed into a silicon film having crystallinity further improved by laser light irradiation. In addition, observation by a transmission electron microscope revealed that the film irradiated with laser light was composed of relatively large oriented grains.

The silicon film obtained after completion of crystallization was patterned into a square having a side length of 10 to 1000 µm to obtain an island-like silicon film 603 'serving as an active layer of the TFT. (Fig. 6 (B))

Next, a silicon oxide film 604 was formed to function as a gate insulating film. Here, the silicon film was exposed to an oxidizing atmosphere of 500 to 750 ° C., preferably 550 to 650 ° C. to form a silicon oxide film 604 functioning as a gate insulating film on the surface of the silicon region. In this heat treatment step, the oxidation reaction can be further enhanced by injecting water vapor, nitrogen dioxide, or the like into the atmosphere. Of course, the silicon oxide film can be formed using any of the known means for vapor phase crystal deposition, such as the plasma CVD method and the sputtering method (Fig. 6 (C)).

Thereafter, a polycrystalline silicon film containing 0.01 to 0.2% of phosphorus was deposited to a thickness of 3000 to 8000 Pa, specifically 6000 Pa, by the reduced pressure CVD method, and then the silicon film was patterned to form the gate electrode 605. Formed. Next, the self-alignment of impurities (phosphorus in this embodiment) that imparts N-type conductivity to the active layer region (source / drain constituting the channel) is performed by ion doping (plasma doping) using the gate electrode as a mask. Was added. In this embodiment, phosphine (PH ₃ ) was used as the doping gas, and ion doping was performed with an acceleration voltage of 60 to 90 kV. The dose of phosphorus was 1 * 10 <^15> -8 * 10 <^15> cm <^-2> , for example, 5 * 10 <^15> cm <^-2> . Thus, N-type conductive impurity regions 606 and 607 for source / drain regions were obtained.

Then, laser light was irradiated and annealed. In this embodiment, a KrF excimer laser operated at a wavelength of 248 nm and a pulse width of 20 nsec was used, but other lasers can also be used. The laser beam was irradiated with 2-10 shots, for example 2 shots, per place at an energy density of 200-400 mJ / cm ² , for example, 250 mJ / cm ² . By heating the substrate to 200 to 450 DEG C during laser light irradiation, the effect of laser annealing can be further enhanced. (FIG. 6 (D))

Alternatively, this process may be performed by a so-called RTA (Rapid Heat Annealing), i.e., lamp annealing using near infrared light. Since near-infrared light can be absorbed more easily by crystallized silicon than by amorphous silicon, an effective annealing can be achieved comparable to that of opening at temperatures above 1000 ° C. It is more advantageous that near infrared light is less absorbed by the glass substrate. In fact, far infrared light is easily absorbed by the glass substrate, but light in the region from the visible to the near infrared, that is, the wavelength region of 0.5 to 4 μm, is hardly absorbed by the glass substrate. Thus, the annealing can be completed in a shorter time without heating the substrate to a high temperature. This method is most suitable for processes in which shrinkage of the glass substrate is undesirable.

Next, a silicon oxide film 608 having a thickness of 6000 kPa was formed as an interlayer insulating material by plasma CVD. Instead of silicon oxide, a polyimide film may be used. Then, contact holes were formed in the interlayer insulator, and electrodes and wirings 609 and 610 were formed using a multilayer film of a metal material, for example, titanium nitride and aluminum. Finally, annealing was carried out at 350 ° C. for 30 minutes under a pressure of 1 atmosphere to complete the TFT. (FIG. 6 (E))

As explained in this embodiment, the amorphous silicon film can be crystallized more advantageously than by simply heating by introducing nickel as a catalyst element for crystallization, and the crystallinity of the crystallized silicon film in this way is also laser light. Can be further improved by examining In this way, crystalline silicon having particularly high crystallinity can be obtained. By using the silicon film which has favorable crystallinity, a high performance TFT is obtained.

More specifically, except that the crystallization process described in Example 2 is not used, the N-channel TFT obtained through the same process as in this example has a field effect mobility of 50 to 90 cm ² / Vs and 3 to 3. It has a threshold voltage of 8 V. These values are clearly contrasted with the mobility of 150 to 200 cm ² / Vs and the threshold voltage of 0.5 to 1.5 V obtained in the N-channel TFT fabricated according to this embodiment. In other words, the mobility is considerably increased, and the variation of the threshold voltage is also greatly reduced.

Previously, such high levels of the above described TFT characteristics were obtained from the amorphous silicon film only by laser crystallization. However, the silicon film obtained by the conventional laser crystallization had a change in characteristics. In addition, the crystallization process required irradiating laser light at an energy density of 350 mJ / cm ² or more at a temperature of 400 ° C. or more, and thus could not be applied to mass production. In contrast to the conventional process, the TFT fabrication process according to the present embodiment can be performed at a lower substrate temperature and energy density than that in the conventional process. Thus, the process according to the invention is suitable for mass production. Moreover, the quality of the apparatus obtained by this process is as uniform as that of the apparatus obtained by the conventional solid-phase growth crystallization using open anneal. Thus, TFTs of uniform quality can be obtained stably.

In Examples 1 and 2 described above, it was found that when the nickel concentration is low, insufficient crystallization occurs. However, the process according to this embodiment uses laser irradiation to compensate for insufficient crystallization. Thus, even when the nickel concentration is low, a satisfactory high quality TFT can be obtained. This means that a device still containing nickel at a low concentration can be realized, and a device having excellent electrical stability and reliability can be obtained.

Example 4

The present embodiment relates to a method of introducing a catalyst element into an amorphous silicon film by applying an upper surface of the amorphous silicon film with a solution containing a catalyst element that promotes crystallization of the amorphous silicon film.

The present embodiment also provides a method for obtaining a crystalline silicon film containing a catalyst element at low concentration by selectively introducing a catalyst element into an amorphous silicon film and then proceeding crystal growth from the place to a portion where the catalyst element is not introduced. To provide.

7 (A)-(C) show the production steps of this embodiment. First, a 1000 nm thick amorphous silicon film 702 was deposited on a 10 cm × 10 cm Corning # 7059 glass substrate 701 by plasma CVD, and then a silicon oxide film 704 was used as a mask thereon. It was deposited to a thickness of 1200 mm 3. As the silicon oxide film 704, a silicon oxide film as thin as 500 GPa can be used without any problem, and the film thickness can be made denser and the film thickness can be made thinner.

Next, the silicon oxide film 704 was patterned as desired by a conventional photolithography technique, and then irradiated with ultraviolet (UV) light to form a thin silicon oxide film 703 in an oxygen atmosphere. More specifically, UV light was irradiated for 5 minutes to form the silicon oxide film 703. The silicon oxide film 703 is believed to have a thickness of 20 to 50 GPa. Thus, a structure as shown in Fig. 7A was obtained.

The silicon oxide film is formed to improve the wettability to the solution to be applied later. Desirable wettability is sometimes ensured by the hydrophilicity of the silicon oxide mask, but this is rare because the pattern size only occurs when it matches the solution. Therefore, in order to ensure good wettability, it is safe to use the silicon oxide film 703.

Next, 5 ml of a acetate solution containing 100 ppm by weight of nickel was dropped onto a 10 cm × 10 cm square substrate. The spinner 707 was operated at 50 rpm for 10 seconds to form a uniform water film 706 on the entire surface of the substrate. After holding the substrate for 5 minutes, spinner 707 was operated at 2000 rpm for 60 seconds to perform spin drying. The substrate may be placed on a spinner and rotated at a speed of 0 to 150 rpm. This process is shown in Figure 7 (B).

Then, the obtained structure was heated at 450 to 580 ° C. for 1 to 10 minutes to form a very thin nickel silicide film on the surface of the amorphous silicon film 702. In this process, it was confirmed that crystalline silicon was formed not only at the portion indicated by 710 but also at the phase boundary between the amorphous silicon film 702 and the nickel silicide film. Next, the surface of the amorphous silicon film 702 was etched with 5% hydrochloric acid to remove the nickel silicide film.

Thereafter, heat treatment was performed at 550 ° C. for 4 hours in a nitrogen atmosphere. Thus, crystallization occurs in the transverse direction indicated by arrow 708 from the region 709 where nickel is introduced to the region 711 where nickel is not introduced. Of course, crystallization also occurs in the region 709 into which nickel is directly introduced.

In Fig. 7C, crystallization takes place in the region 709 into which nickel is directly introduced, and proceeds laterally in the region 711.

The nickel concentration introduced can be controlled by varying the nickel concentration in the service applied. In this example, the nickel concentration in the solution was adjusted to 100 ppm. However, it was confirmed that crystallization occurred even when the concentration was reduced to 10 ppm. Crystallization occurs in the same way even when a solution containing nickel at a concentration of 10 ppm is used. In this case, the nickel concentration in the region 711 shown in Fig. 7C can be lowered by one digit. However, using a solution containing nickel at too low a concentration shortens the crystal growth distance in the transverse direction indicated by arrow 708, which is not preferable.

The crystalline silicon film thus obtained can be used as the active layer of the TFT. In particular, using region 711 to form the active layer is useful because this region contains catalytic elements at low concentrations.

In addition, it is effective to further enhance the crystallinity of the crystalline silicon film by irradiating laser light or strong light in the same manner as in Example 3.

In this example, an acetate solution was used as a solution containing a catalytic element. However, other useful solutions include solutions containing various aqueous solutions and organic solvents. The catalytic element does not necessarily need to be contained as a compound, but may be simply dispersed in a solution.

The solvent for the catalytic element may be selected from the group consisting of polar solvents, that is, water, alcohols, acids and aqueous ammonia.

When nickel is used as the catalytic element, nickel is incorporated into the polar solvent in the form of a nickel compound. The nickel compounds are typically nickel embrittlement, nickel acetate, nickel hydroxide, nickel carbonate, nickel chloride, nickel oxide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, nickel 4-cyclohexyl butyrate, nickel oxide, And nickel hydroxide.

Further, the solvent for the catalytic element may be one selected from the group consisting of nonpolar solvents of benzene, toluene, xylene, carbon tetrachloride, chloroform and ether.

In this case, nickel is contained in the solution in the form of a nickel compound selected from the group consisting of nickel acetylacetonate and nickel 2-ethylhexanate.

It is also effective to add surfactants to solutions containing catalytic elements. The surfactant increases the adhesion of the solution to the surface of the silicon oxide film and controls the adsorption property. The surfactant may be applied in advance to the surface to be coated. When nickel alone is used as the catalytic element, the nickel alone can be dissolved in the acid beforehand to obtain its solution.

Instead of using a nickel-containing solution completely dissolved in the solution, a material containing an dispersion, that is, a metal nickel powder or a dispersion medium in which a powder of a nickel compound is uniformly dispersed may be used. The same applies to other cases in which a substance other than nickel is used as the catalyst element.

A solution containing a nonpolar solvent, that is, a toluene solution of nickel 2-ethylhexanate can be applied directly to the surface of the amorphous silicon film. In this case, it is effective to use a material such as an adhesive generally used for forming a resist. However, the use of excess adhesive prevents the transfer of catalytic elements to amorphous silicon.

The catalytic element, depending on the type of solution, is incorporated into the solution in an amount of approximately 1 to 200 ppm by weight, preferably 1 to 50 ppm by weight for nickel. The range of this addition amount is determined in consideration of the nickel concentration of the crystallized film and the resistance to hydrofluoric acid.

Example 5

This embodiment describes a method of forming a plurality of island-like nickel films on a Corning 7059 glass substrate, crystallizing the amorphous silicon film using this as a starting point, and manufacturing a TFT using the obtained crystalline silicon film. There are two methods for forming the island-like nickel film, and forming the film on the amorphous silicon film and below. 9A is a method of forming a nickel film under an amorphous silicon film, and FIG. 9A-2 is a method of forming a nickel film on an amorphous silicon film. In the latter method, since the nickel film is selectively etched after depositing nickel on the entire surface of the amorphous silicon film, the nickel and the amorphous silicon react in small amounts to form nickel silicide over the entire surface. If this silicide remains, since the good crystalline silicon film to be provided in the present invention cannot be obtained, it is necessary to sufficiently remove the nickel silicide with hydrochloric acid or hydrofluoric acid. Therefore, the thickness of amorphous silicon is reduced as compared with the initial thickness.

The former method does not pose such a problem, but in this case as well, it is required to completely remove the nickel film other than the island portion by etching. In order to suppress the influence of remaining nickel, the substrate is treated with oxygen plasma, ozone, or the like to oxidize nickel other than the island-like portion.

In any manner, a silicon oxide film 101B having a thickness of 2000 GPa was formed on the substrate (Corning 7059) 101A as a base film by plasma CVD. The amorphous silicon film 101 was formed to have a thickness of 200 to 3000 Pa, preferably 500 to 1500 Pa, by plasma CVD or reduced pressure CVD. The amorphous silicon film was annealed at 350 to 450 ° C. for 0.1 to 2 hours to discharge hydrogen atoms. When the hydrogen concentration in the film was 5 atomic% or less, crystallization was easily achieved.

In the case of Fig. 9A-1, before forming the amorphous silicon film 101, a nickel film is deposited to a thickness of 50 to 1000 GPa, preferably 100 to 500 GPa by a sputtering method, and this is photolithography. Patterning was performed to form an island-like nickel film 102.

On the other hand, in the case of Fig. 9A-2, after the amorphous silicon film 101 is formed, a nickel film is deposited to a thickness of 50 to 1000 GPa, preferably 100 to 500 GPa by the sputtering method. Patterning was performed by photolithography to form an island-like nickel film 102. The figure which looked at this pattern from the top is shown to FIG. 8 (A).

Each island-like nickel film is a square with 2 μm on one side, and the interval thereof is 5 to 50 μm, for example, 20 μm. The same effect can be obtained by using nickel silicide instead of nickel. Good results can be obtained by heating the substrate to 100 to 500 ° C, preferably 180 to 250 ° C when forming the nickel film. This is because the adhesion between the underlying silicon oxide film and the nickel film is improved and the silicon oxide and nickel react to form nickel silicide. The same effect can be obtained by using silicon nitride, silicon carbide or silicon instead of silicon oxide.

Then, it was annealed at 450 to 650 캜, for example, 550 캜 for 8 hours in a nitrogen atmosphere. Fig. 9B shows the intermediate state in the annealing. In Fig. 9 (A-1) and (A-2), nickel grows from the island-like nickel films at both ends to the central portion as nickel silicide 103A. The portion 103 where nickel has passed is made of crystalline silicon. Finally, as shown in FIG. 9 (C), nickel crystals starting from two island-like nickel films meet, leaving nickel 103A in the center, and crystallization is terminated.

Fig. 8B shows the state of the substrate in this state as seen from above. Nickel silicide 103A shown in FIG. 9 (C) forms a grain boundary 104. As the annealing continues, the nickel atoms move along the grain boundary 104 and collect in the region 105 located in the center of the island nickel. At this stage, the initial island shape is not maintained.

Crystalline silicon can be obtained by the above process. It is not preferable that the nickel atoms diffuse from the nickel silicide 103A produced at this time into the semiconductor film. Therefore, it is necessary to etch the nickel film with hydrofluoric acid or hydrochloric acid. Neither hydrofluoric acid nor hydrochloric acid affects the silicon film. The etched shape is shown in Fig. 9D. The part where the grain boundary existed forms the groove 104A. It is not preferable to form the semiconductor region or the active layer of the TFT on both sides of each groove. An example of the arrangement of the TFTs is shown in FIG. 8C, but the semiconductor region 106 is disposed so as not to intersect the grain boundary 104. On the other hand, the gate wiring 107 may cross the grain boundary 104.

Examples of a method for producing a TFT using the crystalline silicon obtained by the above steps are shown in Figs. 10A to 10C and 11A to 11C. In FIG. 10A, the center part X represents the place where the groove 104A was located. The central portion X is disposed so that the semiconductor regions of the TFTs do not cross each other. That is, the crystalline silicon film 103 obtained by the process of Figs. 9 (A-1) to (D) was patterned to form island-like semiconductor regions 111a and 111b. Then, the silicon oxide film 112 functioning as a gate insulating film was formed by RF plasma CVD method, ECR plasma CVD method, sputtering method, or the like.

Subsequently, a polycrystalline silicon film having a thickness of 3000 to 6000 mm ³ doped with phosphorus at a concentration of 1 × 10 ^{20 to} 5 × 10 ²⁰ cm ^-3 was formed by LPCVD (pressure reduction CVD method), and the film was patterned by photolithography. Thus, gate electrodes 113a and 113b were formed. (FIG. 10A)

Then, impurities were implanted by plasma doping. As the doping gas, phosphine (PH ₃ ) was used in the case of an N-type semiconductor, and diborane (B ₂ H ₆ ) was used in the case of a P-type semiconductor. In the figure, an N-channel TFT is shown. The acceleration voltage was 80 kV for phosphine ions and 65 kV for diborane ions. Next, annealing was performed at 550 ° C for 4 hours to activate impurities to form impurity regions 114a to 114d. For activation, a method of using light energy such as laser annealing or flash lamp annealing may be used (Fig. 10 (B)).

Finally, the silicon oxide is deposited to a thickness of 5000 kPa in the same manner as in the conventional TFT fabrication method to form the interlayer insulator 115. Contact holes were formed in the interlayer insulator 115, and conductive wirings and electrodes 116a to 116d were formed in the source and drain regions. (Fig. 10 (C)).

TFT was produced by the above process. The TFT shown in the figure is an N-channel type. The field effect mobility of the obtained TFT was 40 to 60 cm ² / Vs in the N-channel type, and 30 to 50 cm ² / Vs in the P-channel type.

11A to 11C show a case of manufacturing a TFT having an aluminum gate. In FIG. 11A, the center part X indicates the place where the groove 104A (FIG. 9D) was located. The central portion X is disposed so that the semiconductor regions of the TFTs do not cross each other. That is, the crystalline silicon film 103 obtained by the processes of Figs. 9A to 9D is patterned to form island-like semiconductor regions 121a and 121b. Thereafter, a silicon oxide film 122 serving as a gate insulating film was formed by an RF plasma CVD method, an ECR plasma CVD method, a sputtering method, or the like. When the plasma CVD method is used, good results were obtained by using TEOS (tetraethoxysilane) and oxygen as the source gas. Next, an aluminum film (thickness 5000 kPa) containing 1% silicon was formed by the sputtering method, and this was patterned by the photolithography method to form gate wirings and electrodes 123a and 123b.

Subsequently, the substrate was immersed in an ethylene glycol solution of 3% tartaric acid, and platinum was used as the cathode, and aluminum wiring was used as the anode to allow anodization by passing a current therethrough. The current was initially applied so that the voltage rose to 2 V / min, the voltage was kept constant when 220 V was reached, and the current was stopped when the current became 10 µA / m ² or less. As a result, anode oxides 124a and 124b having a thickness of 2000 GPa were formed (FIG. 11A).

Thereafter, impurities were implanted by plasma doping. As the doping gas, phosphine (PH ₃ ) was used in the case of an N-type semiconductor, and diborane (B ₂ H ₆ ) was used in the case of a P-type semiconductor. In the figure, an N-channel TFT is shown. The acceleration voltage was 80 kV for phosphine ions and 65 kV for diborane ions. Then, impurities were activated by laser annealing to form impurity regions 125a to 125d. For this purpose, KrF laser (wavelength: 248 nm) was used, and 5 shots of each laser beam having an energy density of 250 to 300 mJ / cm ² were irradiated (Fig. 11 (B)).

Finally, in the same manner as in the conventional TFT fabrication method, silicon oxide was deposited to a thickness of 5000 kPa to form an interlayer insulator 126. Contact holes were formed in the interlayer insulator 126, and conductive wirings and electrodes 127a to 127d were formed in the source region and the drain region. (FIG. 11C).

The field effect mobility of the obtained TFT was 60 to 120 cm ^{2 /} Vs in the N-channel type and 50 to 90 cm ² / Vs in the P-channel type. In addition, it was confirmed that the shift register fabricated using this TFT operates at 6 MHz at a drain voltage of 17 V and 11 MHz at a drain voltage of 20 V. FIG.

Example 6

12A to 12C show a case of manufacturing a TFT having an aluminum gate as shown in FIGS. 11A to 11C. Here, amorphous silicon was used as the active layer. As shown in Fig. 12A, a silicon oxide film was deposited as a base film 132 on the substrate 131, and an amorphous silicon film 133 having a thickness of 2000 to 3000 mm 3 was formed thereon. An appropriate amount of P-type or N-type impurities may be added to the amorphous silicon film. Thereafter, as mentioned above, the island-like nickel or nickel silicide films 134A and 134B were formed and annealed at 550 ° C. for 4 hours in this state to crystallize the amorphous silicon film.

Next, the crystalline silicon film thus obtained was patterned by the photolithography method as shown in Fig. 12B. At this time, since the silicon film of the center part (intermediate part between island-like nickel or nickel silicide films 134A and 134B) of a figure contains a large amount of nickel, it patterned so that this center part may be removed and the island-shaped silicon area | region ( 135A, 135B). Next, a substantially intrinsic amorphous silicon film 136 was deposited on the island-like silicon regions 135A and 135B.

Thereafter, as shown in Fig. 12C, the gate insulating film 137 was formed of a material such as silicon nitride, silicon oxide, or the like, and the gate electrode 138 was formed of aluminum. Next, anodization was carried out in the same manner as shown in Figs. 11A to 11C, and impurities were diffused by ion doping to form impurity regions 139A and 139B. Thereafter, the interlayer insulator 140 was deposited. A contact hole was formed in this interlayer insulator, and metal electrodes 141A and 141B were formed in the source and drain regions to complete the TFT. This TFT has a feature that the semiconductor regions of the source and drain portions are thicker than the thickness of the active layer and have a low resistivity. As a result, the resistance of the source and drain regions is reduced, and the characteristics of the TFT are improved. It is also easy to form a contact.

Example 7

13A to 13C show a case of manufacturing a CMOS TFT. As shown in FIG. 13A, a silicon oxide film was deposited as a base film 152 on the substrate 151, and an amorphous silicon film 153 having a thickness of 1000 to 1500 kPa was formed thereon. Then, as mentioned above, an island-like nickel or nickel silicide film 154 was formed and annealed at 550 ° C in this state. By this process, the nickel silicide region 155 grew, and crystallization advanced. After 4 hours of annealing, as shown in Fig. 13B, the amorphous silicon film was changed to crystalline silicon. In addition, as the crystallization progressed, nickel silicide regions 159A and 159B were driven to both ends.

Then, the crystalline silicon film thus obtained was patterned by the photolithography method as shown in Fig. 13B to form island-like silicon regions 156. At this time, it should be noted that both ends of the island-like silicon region have a high concentration of nickel. After forming the island-shaped silicon region, the gate insulating film 157 and the gate electrodes 158A and 158B were formed.

Thereafter, as shown in Fig. 13C, the impurities are diffused by the ion doping method to form the N-type impurity region 160A and the P-type impurity region 160B. At this time, for example, phosphorus was used as the N-type impurity, and phosphine (PH ₃ ) was used as the doping gas, and the entire surface was doped at an acceleration voltage of 60 to 110 kV. Next, the region of the N-channel TFT was covered with a photoresist and doped with a P-type impurity such as boron at an acceleration voltage of 40 to 80 kV. At this time, diborane (B ₂ H ₆ ) was used as the doping gas.

After ion doping, laser light was irradiated in the same manner as shown in Figs. 11A to 11C to activate the source and drain regions. Then, the interlayer insulator 161 was deposited, contact holes were formed in the interlayer insulator, and metal electrodes 162A, 162B, and 162C were formed in the source and drain to complete the TFT.

Example 8

This example is similar to the process of Example 7 except that a laser light irradiation step is performed to further improve the crystallinity of the crystalline silicon film after the crystallization step by heating at 550 ° C. for 4 hours.

14A to 14D show the steps of manufacturing a CMOS TFT in this embodiment. First, as shown in Fig. 14A, a silicon oxide film is formed on the substrate 151 by the sputtering method as a base film 152 with a thickness of 2000 GPa, and the thickness is 1000 to 1500 by the plasma CVD method. N amorphous silicon film 153 was formed. Next, an island-like nickel or nickel silicide film 154 was formed.

Then, it was annealed at 550 ° C. for 4 hours in a nitrogen atmosphere. By this step, the nickel silicide region 155 grew. In other words, crystallization proceeded. The crystalline silicon film thus obtained was patterned by the photolithography method as shown in Fig. 14B to form island-shaped silicon regions 156.

Next, KrF excimer laser light 170 having a wavelength of 248 nm and a pulse width of 20 nsec was irradiated. The laser beam was irradiated with 2 shots per place at an energy density of 250 mJ / cm ² . The energy density may be set at 200 to 400 mJ / cm ² in consideration of various conditions such as film thickness and substrate temperature. XeCl lasers emitting laser light of wavelength 308 nm or ArF lasers emitting laser light of wavelength 193 nm may be used.

In addition, other strong light may be used which can produce the same effect as laser light irradiation. In particular, rapid thermal annealing (RTA) techniques using infrared light irradiation allow silicon to selectively absorb infrared light, allowing annealing to be effected effectively. Laser light irradiation may be performed before the patterning process.

After opening, the crystallized region was formed in the silicon film 153. However, an uncrystallized region (not shown) may remain in the silicon film 153. The crystallinity of the crystallized region was further improved by subsequent laser annealing or RTA. Therefore, this region is suitable as an active region of the thin film transistor. On the other hand, the uncrystallized region was also converted into a polycrystalline structure, but the Raman spectroscopy measurement of this region showed relatively poor crystallinity compared to the previously crystallized region. In addition, as a result of observation by a transmission electron microscope, countless microcrystals were observed in the uncrystallized film after laser annealing or RTA, but relatively large crystals uniformly oriented in the previously crystallized region were observed. This means that the uncrystallized region has a large number of grain boundaries even after laser annealing or RTA, which is not very suitable as an active region of the thin film transistor. Therefore, it is preferable to remove the uncrystallized region before or after the laser annealing or RTA to form island silicon regions to be active regions of the TFT.

Then, after the gate insulating film 157 was formed, the gate electrodes 158A and 158B mainly containing silicon were formed. Thereafter, as shown in Fig. 14C, the impurities are diffused by the ion doping method to form the N-type impurity region 160A and the P-type impurity region 160B. At this time, as the N-type impurity, for example, phosphorus was used, and phosphine (PH ₃ ) was used as the doping gas, and impurity doping was performed on the entire surface at an acceleration voltage of 60 to 110 kV. Thereafter, the region of the N-channel TFT was covered with a photoresist and doped with P-type impurities such as boron at an acceleration voltage of 40 to 80 kV using diborane (B ₂ H ₆ ) as the doping gas.

After ion doping, the laser light 171 was irradiated to activate the source and drain regions. Next, an interlayer insulator 161 was formed, contact holes were formed in the interlayer insulator, and metal electrodes 162A, 162B, and 162C were formed in the source and drain regions to complete the TFT.

In this example, a catalytic element was introduced to promote crystallization. Thus, a low temperature, short time crystallization step was used together with the annealing step using laser light irradiation. The crystallization process was performed at 550 degreeC for about 4 hours. In this way, a silicon film having good crystallinity could be obtained, and a high performance TFT could be obtained using such a crystalline silicon film.

More specifically, the N-channel TFT obtained in Example 5 has a field effect mobility of 40 to 60 cm ² / Vs for the silicon gate type (FIG. 10), and 60 for the aluminum gate type (FIG. 11). It had a field effect mobility of ˜120 cm ² / Vs, and the threshold voltage was 3 to 8 V. However, the mobility of the N-channel TFT obtained in this embodiment was 150 to 200 cm ² / Vs, and the threshold voltage was 0.5 to 1.5 V. Thus, mobility is greatly improved, and variation in threshold voltage is reduced.

Until now, these features could only be obtained by laser crystallization of an amorphous silicon film. In the laser crystallization of the prior art, the characteristics of the obtained silicon film varied widely. In addition, crystallization required a temperature higher than 400 ° C., and irradiation of a laser beam of high energy density exceeding 350 mJ / cm ² was required. Therefore, there were many problems in mass production. In this embodiment, low substrate temperature and low energy density are sufficient. Therefore, mass production can be performed without any difficulty. In addition, the characteristic variation is comparable to the variation when the solid crystal growth method using ordinary openil is used. Therefore, the obtained TFT has a uniform characteristic.

In the present invention, when the nickel concentration is low, the silicon film is not sufficiently crystallized and the characteristics of the TFT are not good. However, in this embodiment, even though the crystallinity of the silicon film is not sufficiently high, crystallinity can be supplemented by laser light irradiation, so that even if the nickel concentration is low, the characteristics of the TFT do not decrease. Therefore, the nickel concentration in the active layer region of the device can be further lowered, so that the electrical stability and reliability of the device can be further improved.

Example 9

In this embodiment, the catalyst element is introduced into the amorphous silicon film by applying a solution containing a catalyst element that promotes crystallization of amorphous silicon to the amorphous silicon film.

In addition, in this embodiment, a catalytic element is selectively introduced. Crystals grow from the region where the catalytic element is introduced to the region where the catalytic element is not introduced. Thus, a crystalline silicon film doped with a low concentration of the catalytic element is obtained.

15A to 15D show the fabrication process of this embodiment. The same parts as in Figs. 9 (A-1) to (D) are denoted by the same reference numerals.

First, a silicon oxide film as a base film 101B was formed on the glass substrate (Coring 7059) 101A of 10 cm x 10 cm size by the sputtering method to a thickness of 2000 GPa, and the thickness was 1000 by plasma CVD. An amorphous silicon film 101 was formed.

Thereafter, a silicon oxide film 180 having a thickness of 2000 GPa was formed. According to the experiments of the present inventors, even when the thickness of the silicon oxide film 180 is 500 kPa, no problem occurs. If the film is dense, it is considered that the film thickness can be further reduced.

The silicon oxide film 180 is patterned in a desired pattern by a conventional photolithography method and irradiated with ultraviolet light for 5 minutes in an oxygen atmosphere, and the thin silicon oxide film 182 is exposed on the exposed surface of the amorphous silicon film 101. Formed. The thickness of the silicon oxide film 182 is considered to be approximately 20 to 50 GPa.

This silicon oxide film is for improving the wettability of the solution applied in a later step. In this state, 5 ml of the acetate solution was dripped on the 10 cm x 10 cm board | substrate. This acetate solution was made to contain 100 ppm by weight of nickel. At this time, the spinner 184 was rotated at a speed of 50 rpm to form a uniform water film 183 on the entire surface of the substrate. After maintaining this state for 5 minutes, the spinner 184 was rotated at 2000 rpm for 60 seconds, and spin drying was performed. The water film can also be held on the spinner by rotating the spinner at 0 to 150 rpm (Fig. 15 (A)).

By the above process, nickel was introduced into the region 185 and then heat treated at 300 ° C to 500 ° C to form nickel silicide on the surface of the region 185. Then, the silicon oxide film 180 which functions as a mask was removed, and it heated at 550 degreeC for 4 hours in nitrogen atmosphere. In this way, the amorphous silicon film 101 was crystallized. At this time, crystals grew laterally, that is, parallel to the substrate, from the region 185 into which nickel was introduced, to the region where nickel was not introduced. Of course, crystallization also occurred in the region where nickel was directly introduced.

Next, a heat treatment was performed to form a nickel silicide film on the surface of the region 185 to remove the silicon oxide film 180. Alternatively, crystallization may be performed by heating at 550 ° C. for 4 hours without removing the silicon oxide film 180. In this case, a process for forming a nickel silicide film is not necessary. The silicon oxide film 180 may be removed after the crystallization process.

15B shows a state in which crystallization is in progress. That is, nickel introduced at the edge grows toward the center as nickel silicide. The portion 103 where nickel has passed is made of crystalline silicon. If crystallization continues, the two parts of crystal growth meet with the region 185 into which nickel is introduced as a starting point, leaving a nickel silicide region 103A therebetween as shown in Fig. 15C. Thus, the crystallization process ends.

Crystalline silicon could be obtained by the above process. It is undesirable to diffuse nickel from the formed nickel silicide region 103A into the semiconductor film. Therefore, the nickel silicide region 103A was etched with hydrofluoric acid or hydrochloric acid. This state is shown in FIG. 15 (D). The part where the grain boundary existed formed the groove 104A.

In FIG. 15C, crystallization progressed transversely from region 185 through region 186. The nickel concentration in the region 186 is shown in FIG. 16. This figure shows the distribution of nickel in the thickness direction of the region 186 of the crystalline silicon film which has undergone the crystallization process. The distribution was measured by SIMS (secondary ion mass spectrometry). It was confirmed that the nickel concentration in the region 185 into which nickel was directly introduced is at least one order higher than the concentration shown in FIG. Using the crystalline silicon film thus obtained, a TFT was produced in the same manner as in Example 5.

The crystalline silicon film thus obtained was irradiated with a laser beam or a strong light equivalent to the laser beam, and the crystallinity was more effectively improved in the same manner as in Example 8. In Example 8, the nickel concentration in the silicon film was relatively high, and nickel was deposited on the outside of the silicon film by laser light irradiation. Nickel particles having a size of about 0.1 to 10 탆 were formed in the silicon film. As a result, the morphology of the membranes deteriorated. However, in this embodiment, since the concentration of nickel may be much lower than that obtained in Examples 5 and 6, nickel silicide was not deposited and the film was not roughened by laser light irradiation.

The nickel concentration shown in FIG. 16 can be controlled by controlling the nickel concentration in the solution. In this example, the nickel concentration in the solution was set to 100 ppm. It was confirmed that crystallization was possible even when the concentration was 10 ppm. In this case, the nickel concentration (FIG. 16) in the region 186 shown in Fig. 15C can be further reduced by one order, but when the nickel concentration of the solution is reduced, the lateral crystal growth distance becomes short.

The silicon film crystallized as described above can be used directly as the active layer of the TFT. In particular, forming the active layer of the TFT using the region 186 is very useful in that the concentration of the catalyst element is low.

In this example, an acetate solution was used as a solution containing a catalytic element. This solution can be selected from various aqueous solutions, organic solvents, and the like. The form of the catalytic element is not limited to the compound. The catalytic element may simply be dispersed in the solution.

When nickel is used as a catalyst and contained in a polar solvent such as water, alcohol, acid or ammonia, nickel is introduced as a nickel compound. Representative examples of the nickel compound include nickel embrittlement, nickel acetate, nickel hydroxide, nickel carbonate, nickel chloride, nickel oxide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, 4-cyclohexyl butyrate nickel, nickel oxide and hydroxide Nickel may be mentioned.

The solvent may be selected from, for example, benzene, toluene, xylene, carbon tetrachloride, chloroform.

In this case, nickel is introduced in the form of a nickel compound. Representative examples of the nickel compound include nickel acetylacetonate and nickel 2-ethylhexanoate.

It is also advantageous to add a surfactant to the solution containing the catalytic element. This improves the adhesion to the surface to be coated and controls the adsorption property. This surfactant may be applied in advance to the surface to be coated. When nickel alone is used as the catalytic element, it is necessary to dissolve the nickel alone in an acid to make a solution.

In the above example, a solution in which nickel or a catalytic element is completely dissolved is used, but it is not always necessary to completely dissolve nickel. In this case, a material such as an emulsion containing a medium in which nickel alone or a powder of nickel compound is uniformly dispersed may be used. Also, a solution used to form an oxide film may be used. Ohka diffusion source (OCD) manufactured by Tokyo Okagyo Co., Ltd. can be used as a solution. When this OCD solution is used, the solution is applied to the surface to be coated and then fired at about 200 ° C. Thus, the silicon oxide film can be easily formed. In addition, any impurities may be used since the impurities may be added as intended.

This principle also applies when materials other than nickel are used as catalyst elements. When a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate is used, it can be applied directly to the surface of the amorphous silicon film. In this case, it is advantageous to apply in advance a material such as an adhesive used for applying the resist. However, if the coating amount is too large, introduction of the catalyst element into the amorphous silicon film is prevented.

The amount of catalytic element contained in the solution depends on the type of solution. Approximately, the ratio of nickel weight to solution weight is 200 to 1 ppm, preferably 50 to 1 ppm, and this range is determined in consideration of the nickel concentration in the film after the completion of crystallization and resistance to hydrofluoric acid.

In this embodiment, the solution containing the catalyst element was applied to the upper surface of the amorphous silicon film. However, the solution containing the catalyst element may be applied to the underlying film before the amorphous silicon film is formed.

Example 10

A method of obtaining a crystalline silicon film by forming a nickel film on a Corning 7059 glass substrate, crystallizing an amorphous silicon film using the nickel film as a catalyst, and a crystalline silicon film will be described with reference to FIGS. 17A to 17C. A base silicon oxide film 202 having a thickness of 2000 GPa is formed on the substrate 201 by the plasma CVD method, and a nickel film 203 having a thickness of 1000 GPa or less, for example, 50 GPa, is formed thereon by the sputtering method. Deposited. Nickel film having a thickness of 100 GPa or less is a form described by particles or clusters in which a plurality of particles are coalesced rather than a film. When the nickel film is formed, when the substrate is heated to 100 to 500 ° C, preferably 180 to 250 ° C, good results are obtained. This is because the adhesion between the underlying silicon oxide film and the nickel film is improved. Instead of nickel, nickel silicide may be used (Fig. 17 (A)).

Thereafter, an amorphous silicon film 204 having a thickness of 500 to 3000 mV, for example, 1500 mV, is deposited by plasma CVD method, and hydrogen purging is performed at 430 ° C for 0.1 to 2 hours, for example, 0.5 hour in a nitrogen atmosphere. purging) (FIG. 17 (B)).

Next, this was annealed in an anneal furnace at 450 to 580 ° C, for example, 550 ° C for 8 hours in a nitrogen atmosphere. 17C shows that in the intermediate state of annealing, crystallization proceeds as nickel diffuses from the previously formed nickel film (particles and clusters), and the crystalline silicon region 205 is expanded into the amorphous region 204A. It looks thin.

After crystallization is completed, the temperature is maintained at 400 to 600 ° C., for example 550 ° C., and trichloroethylene (C ₂ HCl ₃ ) is diluted to 1 to 10%, for example 10%, with hydrogen or oxygen, It was introduced into an anneal and annealed for 0.1 to 2 hours, for example 1 hour. When the chlorinated material was analyzed in this way by secondary ion mass spectrometry (SIMS), the nickel concentration in the silicon film was 0.01 atomic%. Nickel concentration in the unchlorinated process was 5 atomic%.

Example 11

This example is shown in Figs. 18A and 18B. A base silicon oxide film 202 having a thickness of 2000 GPa was formed on the Corning 7059 glass substrate 201 by plasma CVD, and thereafter, an amorphous silicon film 204 having a thickness of 500 to 3000 GPa, for example, 1500 GPa, was formed thereon. Was deposited by plasma CVD, and hydrogen purging was carried out at 430 ° C. for 0.1 to 2 hours, for example, 0.5 hours in a nitrogen atmosphere.

Thereafter, a nickel film 203 having a thickness of 1000 GPa or less, for example, 80 GPa, was deposited by the sputtering method. Nickel films having a thickness of 100 GPa or less have a form described by particles or clusters in which a plurality of particles are coalesced rather than a film. When the nickel film is formed, favorable results are obtained by heating the substrate to 100 to 500 ° C, preferably 180 to 250 ° C. This is because the adhesion between the underlying silicon oxide film and the nickel film is improved. Instead of nickel, nickel silicide may be used (Fig. 18 (A)).

This was then annealed in an nitrogen atmosphere at 450-580 ° C., for example at 550 ° C. for 4 hours. 18 (B) shows that in the intermediate state of annealing, crystallization proceeds as nickel diffuses from the previously formed nickel film (particles and clusters), and the crystalline silicon region 205 expands into the amorphous region 204A. It looks thin.

After crystallization is complete, the temperature is maintained at 400-600 ° C., for example 580 ° C., and trichloroethylene (C ₂ HCl ₃ ) is diluted 1-10%, for example 5%, with hydrogen or oxygen, It was introduced into an anneal and annealed for 0.1 to 2 hours, for example 0.5 hours.

Example 12

This embodiment is shown in Figs. 19A to 19E. A 2000 nm thick silicon oxide film 232 was formed on the Corning 7059 glass substrate 231 by plasma CVD, and thereafter, a nickel film 233 having a thickness of 1000 GPa or less, for example, 80 GPa was sputtered thereon. It was deposited by law (Fig. 19 (A)).

Then, photoresist was applied to the entire surface, and a resist pattern 234 was formed using a known photolithography method (Fig. 19 (B)).

This was then immersed in a suitable etchant, for example 5-30% hydrochloric acid solution, to remove the exposed portion of the nickel film. Even when nickel silicide is used, the film can be removed in the same manner (FIG. 19 (C)).

Thereafter, the photoresist was removed by a known method to form a nickel film pattern 235. (Fig. 19 (D))

Thereafter, an amorphous silicon film was deposited to a thickness of 500 to 3000 Pa, for example, 1500 Pa, by plasma CVD, and hydrogen purging was performed at 430 ° C for 0.1 to 2 hours, for example, 0.5 hours in a nitrogen atmosphere. This was then annealed in an nitrogen atmosphere at 450-580 ° C., for example at 550 ° C. for 4 hours. FIG. 19E shows a state in which crystallization proceeds as nickel diffuses from the previously formed nickel film pattern in the intermediate state of the annealing, and the crystalline silicon region 236 enlarges into the amorphous region 237. .

After crystallization is complete, the temperature is maintained at 400-600 ° C., for example 580 ° C., and hydrogen chloride (HCl) is diluted to 1-10%, for example 10%, with hydrogen or oxygen and introduced into the annealing system. For 0.1 to 2 hours, for example, 0.5 hours. When the chlorinated material was analyzed in this way by secondary ion mass spectrometry (SIMS), the nickel concentration in the silicon film was 5-10 ppm. Nickel concentration in the absence of the chlorination treatment was 1 atomic%.

Example 13

This embodiment is shown in Figs. 20A to 20E. An underlying silicon oxide film 242 having a thickness of 2000 GPa was formed on the Corning 7059 glass substrate 241 by a plasma CVD method, and an amorphous silicon film 243 having a thickness of 500 to 3000 GPa, for example, 1500 GPa, was formed thereon. Was deposited by the plasma CVD method, and then a nickel film 244 having a thickness of 1000 GPa or less, for example, 80 GPa, was formed by the sputtering method (FIG. 20 (A)).

Next, a photoresist was applied to the entire surface, and a resist pattern 245 was formed using a known photolithography method (Fig. 20 (B)).

This was then immersed in a suitable etchant, for example, 5-30% hydrochloric acid solution to remove the exposed portion of the nickel film. (Fig. 20 (C)).

Then, the photoresist was removed by a known method to form a nickel film pattern 246. (Fig. 20 (D))

Thereafter, hydrogen purging was carried out at 430 ° C for 0.1 to 2 hours, for example, 0.5 hours in a nitrogen atmosphere. This was then annealed in a nitrogen atmosphere at 450-580 ° C., for example 550 ° C., for 4 hours in an anneal furnace. FIG. 20E shows a state in which crystallization proceeds as nickel diffuses from the previously formed nickel film pattern in the intermediate state of the annealing, and the crystalline silicon region 247 expands into the amorphous region 248. .

After crystallization is complete, the temperature is maintained at 400-600 ° C., for example 580 ° C., and trichloroethylene (C ₂ HCl ₃ ) is diluted 1-10%, for example 5%, with hydrogen or oxygen, It was introduced into an anneal and annealed for 0.1 to 2 hours, for example 0.5 hours. When the chlorinated material was analyzed in this way by secondary ion mass spectrometry (SIMS), the nickel concentration in the silicon film was 5-10 ppm. The nickel concentration in the thing which did not perform the said chlorination process was 0.1-1 atomic%.

Example 14

This embodiment is shown in Figs. 21A to 21D. A 2000 nm thick silicon oxide film 252 was formed on the Corning 7059 glass substrate 251 by plasma CVD, and then a photoresist was applied to the entire surface, and a resist pattern ( 253) (FIG. 21 (A)).

Thereafter, a nickel film 254 having a thickness of 80 kPa was deposited by sputtering. (Fig. 21 (B))

Then, the photoresist was removed by a known method, and the nickel film deposited on the photoresist was also removed at the same time to form a nickel film pattern 255. (Fig. 21 (C))

Thereafter, an amorphous silicon film was deposited to a thickness of 1000 GPa by plasma CVD. Hydrogen purging was not performed. This was then annealed in an nitrogen atmosphere at 450-580 ° C., for example at 550 ° C. for 4 hours. FIG. 21E shows a state in which the crystallization proceeds as nickel diffuses from the previously formed nickel film pattern in the intermediate state of the annealing, and the crystalline silicon region 256 expands into the amorphous region 257. .

After crystallization is complete, the temperature is maintained at 550 ° C., and trichloroethylene (C ₂ HCl ₃ ) is diluted 1-10%, for example 5%, with hydrogen or oxygen, introduced into the anneal, and annealed for 0.5 hours. Was performed.

Example 15

This embodiment is shown in Figs. 22 (A) to (D). A 2000 nm thick underlying silicon oxide film 262 was formed on a Corning 7059 glass substrate 261 by plasma CVD, and thereafter a 500 nm thick amorphous silicon film 263 was deposited thereon by plasma CVD. . Hydrogen purging was not performed. Then, photoresist was applied to the entire surface, and a resist pattern 264 was formed by a known photolithography method (Fig. 22 (A)).

Then, a nickel film 265 was formed to a thickness of about 100 GPa by the electron beam deposition method (Fig. 22 (B)).

Then, the photoresist was removed by a known method, and the nickel film deposited on the resist was also removed at the same time to form a nickel film pattern 266. (Fig. 22 (C))

Next, it was annealed at 550 ° C. in an annealer for 4 hours in a nitrogen atmosphere. FIG. 22D shows a state in which the crystallization proceeds as nickel diffuses from the previously formed nickel film pattern in the intermediate state of the annealing, and the crystalline silicon region 267 expands into the amorphous region 268. .

After crystallization was completed, the temperature was maintained at 500 ° C., and hydrogen chloride (HCl) was diluted to 1 to 10%, for example, 1% with hydrogen or oxygen, introduced into an anneal, and annealed for 0.5 hours.

Example 16

In this embodiment, a catalyst element that promotes crystallization of an amorphous silicon film is introduced into an amorphous silicon film, and crystallization is performed by heating, and after the step, a step of further improving crystallinity by irradiation with a laser beam, It is an example of obtaining the crystalline silicon film which has favorable crystallinity.

The manufacturing process of this embodiment is demonstrated based on FIG. 23 (A)-(C). First, a base silicon oxide film 202 having a thickness of 2000 GPa is formed on the substrate 201 by plasma CVD, and thereafter, a nickel film having a thickness of 1000 GPa or less, for example, 50 GPa, by sputtering thereon. (203) was deposited. Nickel films having a thickness of 100 GPa or less have a form described by particles or clusters in which a plurality of particles are coalesced rather than a film. At the time of film-forming of a nickel film, when a board | substrate was heated at 100-500 degreeC, Preferably it is 180-250 degreeC, favorable result was obtained. This is because the adhesion between the underlying silicon oxide film and the nickel film is improved. Instead of nickel, nickel silicide may be used (Fig. 23 (A)).

Thereafter, an amorphous silicon film 204 having a thickness of 500 to 3000 mm 3, for example 1500 mm 3, is deposited by plasma CVD, and hydrogen purging is carried out at 430 ° C. for 0.1 to 2 hours, for example, 0.5 hours in a nitrogen atmosphere. (FIG. 23 (B)).

This was then annealed in an anneal furnace at 450-580 ° C., for example 550 ° C., for 8 hours in a nitrogen atmosphere. 23C shows that in the intermediate state of annealing, crystallization progresses as nickel diffuses from the previously formed nickel film (particles and clusters), and the crystalline silicon region 205 is expanded into the amorphous region 204A. It looks thin.

After completion of the open anneal, annealing by irradiation of the laser light 271 was performed. As the laser light, KrF excimer laser light (wavelength 248 nm, pulse width 20 nsec) was used. The laser beam was irradiated with 2 shots per place at an energy density of 250 mJ / cm ² . The substrate was heated to 300 ° C. at the time of laser light irradiation. This increases the effect of laser light irradiation.

As the laser light, an XeCl excimer laser (wavelength 308 nm), an ArF excimer laser (wavelength 193 nm), or the like may be used. Alternatively, strong light equivalent to laser light may be used. In particular, RTA (Rapid Heat Annealing) for irradiating infrared light for a short time has an advantage that the silicon film can be selectively heated in a short time.

After completion of the annealing by laser light irradiation, the temperature is maintained at 400 to 600 ° C., for example, 550 ° C., and trichloroethylene (C ₂ HCl ₃ ) is 1 to 10%, for example, with hydrogen or oxygen. Dilution was carried out at 10%, introduced into an anneal, and annealed for 0.1 to 2 hours, for example, 1 hour. In this way, a crystalline silicon film was obtained.

When the chlorinated product was analyzed in this way by secondary ion mass spectrometry (SIMS), the nickel concentration in the silicon film was 1 × 10 ¹⁸ cm ^-3 . Nickel concentration in the absence of the chlorination was 1 × 10 ¹⁹ cm ⁻³ .

In the above manner, a silicon film having good crystallinity can be obtained. As a result of this treatment, the region 205 crystallized by open annealed became a favorable crystalline silicon film. On the other hand, as a result of laser light irradiation, a polycrystalline film was obtained even in the uncrystallized region 204A, and a change in film quality was observed, but it was found by Raman spectroscopy that the crystallinity in this region was not good. In addition, as a result of observing with a transmission electron microscope, a myriad of small crystals were formed in the region 204A irradiated with laser light in the state that has not yet crystallized, whereas in the region 205 irradiated with laser light after crystallization, Relatively large crystals aligned in the same direction were observed.

When the crystalline silicon film thus obtained was formed in an island shape and a TFT was produced, a marked improvement in performance was observed. That is, in the N-channel TFT fabricated using the silicon film crystallized in accordance with Example 1, the field effect mobility is 40 to 60 cm ² / Vs, while the threshold voltage is 3 to 8 V, In the N-channel TFT fabricated using the silicon film obtained according to the present embodiment although manufactured in exactly the same manner, the mobility was 150 to 200 cm ² / Vs and the threshold voltage was 0.5 to 1.5 V. FIG. Mobility is greatly improved and variation in threshold voltage is reduced.

Conventionally, this type of performance has been obtained by crystallizing an amorphous silicon film only by laser crystallization. In conventional laser crystallization, there was a wide variation in the characteristics of the silicon film obtained, and the temperature of 400 ° C or higher and high energy of 350 mJ / cm ² or higher. Since the irradiation of the laser light of density was necessary for crystallization, there was a problem that mass production was poor. In this regard, in this embodiment, since the substrate temperature and the energy density are satisfactory even at values lower than the above values, there is no problem regarding mass production. In addition, since the variation in the characteristics was approximately the same as that in the solid crystal growth by conventional open annealing, the obtained TFT also had uniform characteristics.

In the present invention, when the nickel concentration is too low, the crystallization of the silicon film is not satisfactory, and the characteristics of the TFT obtained are not good. However, in this embodiment, even if the crystallinity of the silicon film is not satisfactory, the crystallinity can be supplemented by subsequent laser light irradiation, so that even if the nickel concentration is low, there is no deterioration in the characteristics of the TFT. As a result, the nickel concentration in the active layer region of the device can be further reduced, and a structure with very good electrical stability and reliability of the device can be adopted.

Example 17

This embodiment relates to an example in which nickel, which functions as a catalyst element, is introduced into a liquid phase. This embodiment is described below based on Figs. 24A to 24C.

First, a base silicon oxide film 286 having a thickness of 2000 상 에 was formed by plasma CVD on a Corning 7059 glass substrate 281 having a size of 10 cm x 10 cm, and then an amorphous silicon film 283 was formed thereon by plasma CVD. It deposited by the thickness of 500 mm by the method. Then, a silicon oxide film having a thickness of 1500 kPa was formed on the entire surface, and a mask pattern 284 was formed using a known photolithography method. This mask pattern 284 made of a silicon oxide film is for selectively introducing nickel. As the mask pattern, a resist may be used instead of silicon oxide.

Next, ultraviolet light was irradiated in an oxygen atmosphere to form a thin silicon oxide film 282. This silicon oxide film 282 was made by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 282 is considered to be approximately 20 to 50 GPa. This silicon oxide film is formed in order to improve the wettability of the solution applied in a later step. In this state, 5 ml of a acetate solution (in the case of a 10 cm × 10 cm substrate) prepared by adding 100 ppm (by weight) was added dropwise to the sample. Spinner 280 was rotated at 50 rpm for 10 seconds to perform spin coating to form a uniform water film 285 on the entire surface of the substrate. Then, this state was maintained for 5 minutes, and the spinner 280 was rotated at 2000 rpm for 60 seconds to perform spin drying. The membrane may be held on the spinner by rotating the spinner at 0-150 rpm.

Thus, the state shown in Fig. 24B is obtained. In this state, the catalytic element nickel is in contact with the amorphous silicon film 283 through a very thin oxide film (silicon nitride film) 282.

Next, it was annealed at 550 ° C. in an annealer for 4 hours in a nitrogen atmosphere. At this time, nickel diffuses through the oxide film 282 to the amorphous silicon film, and crystallization proceeds.

FIG. 24C shows a state in which crystallization proceeds with diffusion of nickel from the oxide film 282 in the intermediate state of the annealing, and the crystalline silicon region 287 expands into the amorphous region 288. Indicates.

After crystallization was completed, the temperature was maintained at 500 ° C, and hydrogen chloride (HCl) was diluted to 1 to 10%, for example, 1% with hydrogen or oxygen, introduced into an anneal, and annealed for 0.5 hours.

In this way, a crystalline silicon film was obtained. Fig. 25 shows SIMS measurement results of nickel concentration in the crystalline silicon film after the crystallization step is completed. The region where the nickel concentration is measured is protected by the silicon oxide film 284 functioning as a mask, and the region where nickel is not directly introduced.

It was also confirmed that the nickel concentration in the region where nickel was directly introduced, that is, in the region where nickel was diffused through the oxide film 282, was higher by one order than the concentration distribution shown in FIG. As in Example 16, it is effective to further improve the crystallinity of the silicon film obtained by irradiating laser light or equivalent strong light.

By controlling the nickel concentration in the solution, it is possible to control the nickel concentration shown in FIG. Although the nickel concentration in the solution was set to 100 ppm in this example, it was found that crystallization was still possible even if this concentration was set to 10 ppm. In this case, the nickel concentration shown in FIG. 25 can be further reduced by one order. However, when the nickel concentration in the solution is low, there is a problem that the crystal growth distance is shortened.

The crystalline silicon film crystallized in the above manner can be used as it is for the active layer of the TFT. Especially. It is very advantageous to form the active layer of the TFT using a region where crystal growth has occurred in a direction parallel to the substrate from a region where nickel is introduced, in that the catalyst element concentration there is low.

In this embodiment, the acetate solution was used as the solution containing the catalytic element, but an aqueous solution or an organic solvent solution or the like can also be used. Here, the catalytic element is not contained as a compound, but may be simply contained by dispersion.

As the solvent made to contain the catalytic element, any of polar solvents such as water, alcohol, acid and ammonia can be used.

When nickel is used as the catalyst and nickel is contained in the polar solvent, nickel is introduced in the form of a nickel compound. As this nickel compound, for example, nickel embrittlement, nickel acetate, nickel hydroxide, nickel carbonate, nickel chloride, nickel oxide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, 4-cyclonuclear lactate nickel, and nickel oxide And nickel compounds selected from nickel hydroxide can be used.

As the solvent, any of apolar solvents such as benzene, toluene, xylene, carbon tetrachloride, chloroform and ether may be used.

In this case, nickel is introduced as the nickel compound, and for example, a nickel compound selected from nickel acetylacetonate and nickel 2-ethylhexanoate can be used.

It is advantageous to add a surfactant to the solution containing the catalytic element. This is because the surfactant increases the adhesion to the surface to be coated and controls the adsorption property. This surfactant may be applied in advance to the surface to be coated. When nickel alone is used as the catalytic element, it is necessary to first dissolve nickel in an acid to make it a solution.

The above is an example of using a solution made by completely dissolving the catalyst element nickel, but a material such as an emulsion in which a single nickel or powder of a nickel compound is uniformly dispersed in a dispersion medium may be used instead of completely dissolving nickel. . Alternatively, a solution for forming an oxide film may be used. As this kind of solution, OCD manufactured by Tokyo Oka Kogyo Co., Ltd. can be used. By applying this OCD to an amorphous silicon film and firing at about 200 ° C, a silicon oxide film can be simply formed. Thus, the catalytic element can be diffused from the silicon oxide film into the amorphous silicon film. The same applies when a material other than nickel is used as the catalyst element.

It is also possible to apply the solution directly to the surface of the amorphous silicon film by using a nonpolar solvent such as a toluene solution of nickel 2-ethylnucleate as the solution. In this case, it is advantageous to apply a material such as an adhesive agent used for resist application in advance. However, if the coating amount is too large, the addition of the catalyst element to the amorphous silicon film may be hindered and adversely affect, so care should be taken.

The amount of catalyst element contained in the solution depends on the type of solution, but in general, the amount of nickel in the solution is preferably 1 to 200 ppm, preferably 1 to 50 ppm (by weight). This is determined in consideration of the nickel concentration in the film after completion of crystallization and resistance to hydrofluoric acid.

Example 18

This embodiment relates to an example of the positional relationship between a crystallized region, an active layer (channel region), a contact hole and a region to which a catalyst element is added in manufacturing a TFT according to the present invention. The pixel portion of the active matrix is described below.

26A to 26F show manufacturing steps of the TFT of this embodiment. First, as shown in Fig. 26A, a silicon oxide underlayer 92 is deposited on the substrate 91 by a sputtering method to a thickness of 2000 GPa, and thereafter, an amorphous silicon film ( 93) was deposited to a thickness of 300-1500 mm 3, for example 800 mm 3. Then, a silicon oxide film 94 of 200 to 2000 GPa, for example, 300 GPa was formed and punched to form holes 96a and 96b. Thus, the silicon oxide film 94 was patterned with a mask. Then, a very thin nickel film or nickel compound film 95 was formed on the entire surface by the sputtering method or the spin coating method as in Example 9.

Next, annealing was performed at 550 ° C. for 4 hours in a nitrogen atmosphere. By this process, the portions 97a and 97b of the silicon film 93 located directly below the holes 96a and 96b are changed into silicides, and the silicon regions 98a and 98b are crystallized from the portions. The tips 99a and 99b have a high nickel concentration (Fig. 26 (B)).

After sufficient crystallization, the crystallization proceeding from the holes 96a and 96b collide with each other at the midpoint between the holes and stop at that midpoint. A region 99c having a high nickel concentration remains at its midpoint. In this state, photoannealing can be further performed by an excimer laser or the like as in Example 8. (Fig. 26 (C))

Next, the crystalline silicon film thus obtained was patterned to form an island-shaped silicon region 400. Some of the regions of high nickel concentration 97a and 99c remain in the silicon region 400. Thereafter, a silicon oxide gate insulating film 401 having a thickness of 700 to 2000 GPa, for example, 1200 GPa was formed by the plasma CVD method (Fig. 26 (D)).

Thereafter, an aluminum gate electrode 402 was formed by the same means as in Example 5, and an anode oxide 403 having a thickness of 1000 to 5000 GPa was formed around the gate electrode. Then, the impurities are diffused by ion doping, thereby forming the N-type impurity regions 404 and 405. As shown in Fig. 26E, the gate electrode should be positioned so that the regions of high nickel concentration 97a, 99c deviate from the portion (channel region) located immediately below the gate electrode.

After doping, the source and drain regions were activated by laser light irradiation. Then, the interlayer insulator 406 was deposited, and a transparent conductive film having a thickness of 500 to 1500 kV, for example, 800 kPa was formed by the sputtering method, and then patterned by etching to form the pixel electrode 407. . Then, contact holes were formed in the interlayer insulator 406, and metal electrodes 408 and 409 were formed in the source and drain to complete the TFT. Reference numerals 410a and 410b denote positions where the holes 96a and 96b existed (Fig. 26 (F)).

It is desirable to form contact holes away from regions of high nickel concentration 97a, 99c. This can be realized by designing the contact holes so that the contact holes do not overlap with the holes 96a and 96b for nickel addition. Otherwise, since high nickel concentration regions are easily etched by a solution containing hydrofluoric acid as compared to a silicon film containing no nickel, a defect contact is easily formed by overetching the silicon film when forming a contact hole. . In the figure, the contact on the left partially overlaps the region 97a of high nickel concentration. It is preferable that at least part of the electrode is in contact with a region other than the region where nickel is added.

As described above, the present invention is groundbreaking in the sense of encouraging the lowering and shortening of the crystallization of amorphous silicon, and furthermore, since the equipment, apparatus and technology for achieving it are very general and well suited for mass production, The advantages of the invention on industry are enormous.

For example, in the conventional solid phase growth method, since annealing of at least 24 hours was required, when the substrate processing time per sheet is 2 minutes, 15 annealings were required, but in the present invention, the time required for annealing is Since it can be shortened within 4 hours, the number of annealing can be reduced to 1/6 or less. The improvement of productivity and the reduction of facility investment by this result in the reduction of the substrate processing cost, and hence the decrease in the TFT price, thereby creating the demand for the new TFT. Thus, this invention is industrially advantageous invention.

Claims (25)

A non-single crystal semiconductor film containing silicon, containing a catalytic material capable of promoting crystallization of silicon, and having crystallinity, A gate insulating film adjacent to the semiconductor film, and A gate electrode adjacent to the gate insulating film; Thin film transistor, characterized in that the concentration of the catalyst material is 1 × 10 ¹⁹ atoms / cm ³ or less. The thin film transistor according to claim 1, wherein the concentration of the catalytic material is 1 × 10 ¹⁵ atoms / cm ³ or more. The thin film transistor according to claim 1, wherein the semiconductor film contains 1x10 ¹⁵ atoms / cm ^{3 to} 5 atomic% hydrogen. A polycrystalline semiconductor film containing silicon and containing a catalyst material capable of promoting crystallization of silicon; A gate insulating film adjacent to the semiconductor film, and A gate electrode adjacent to the gate insulating film; Thin film transistor, characterized in that the concentration of the catalyst material is 1 × 10 ¹⁹ atoms / cm ³ or less. The thin film transistor according to claim 4, wherein the concentration of the catalytic material is 1 × 10 ¹⁵ atoms / cm ³ or more. The thin film transistor according to claim 4, wherein the semiconductor film contains 1x10 ¹⁵ atoms / cm ^{3 to} 5 atomic% hydrogen. It includes a crystalline semiconductor film containing silicon, doped with hydrogen at a concentration of 5 atomic% or less, and containing a catalyst capable of promoting crystallization of amorphous silicon at a concentration of 1x10 ¹⁹ atoms / cm ³ or less. A semiconductor characterized by the above-mentioned. The method of claim 7, wherein the semiconductor, characterized in that the concentration of the catalyst less than 1 × 10 ¹⁵ atoms / cm ^3. 8. A semiconductor according to claim 7, wherein the concentration of the catalyst is 1 x 10 ¹⁵ atoms / cm ³ . 8. A semiconductor according to claim 7, wherein the semiconductor contains carbon, oxygen and nitrogen of 1x10 ¹⁹ atoms / cm ³ or less, respectively. 8. The semiconductor according to claim 7, wherein crystallization of said semiconductor film is confirmed by Raman scattering spectroscopy. 8. A semiconductor according to claim 7, wherein said semiconductor is formed on an insulating surface. A non-single crystal semiconductor film formed on an insulating surface, doped with a catalytic metal, containing silicon, and having crystallinity; A gate electrode adjacent to the semiconductor film with a gate insulating film interposed therebetween; And the metal is introduced into the semiconductor film for crystallization of the semiconductor film, and then removed to a concentration of 1 × 10 ¹⁹ atoms / cm ³ or less. The thin film transistor according to claim 13, wherein the metal is removed by annealing the semiconductor film in an atmosphere containing chlorine atoms. The thin film transistor according to claim 13, wherein the metal is removed by dissolving a metal silicide formed by introduction of the metal in hydrofluoric acid or hydrochloric acid. A crystalline semiconductor film containing silicon and containing a catalyst metal capable of promoting crystallization of silicon at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or less, A gate insulating film adjacent to the semiconductor film, and A gate electrode adjacent to the gate insulating film; The crystalline semiconductor film depositing an amorphous semiconductor film containing silicon on an insulating surface, providing a material containing the catalyst metal to the amorphous semiconductor film, crystallizing the amorphous semiconductor film, and crystallization And a process for reducing the concentration of the catalyst metal by treating the surface of the semiconductor film with a gettering agent containing fluorine or chlorine. The thin film transistor according to claim 16, wherein the gettering agent is hydrofluoric acid or hydrochloric acid. A crystalline semiconductor film containing silicon and containing a catalyst metal capable of promoting crystallization of silicon at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or less, A gate insulating film adjacent to the semiconductor film, and A gate electrode adjacent to the gate insulating film; The crystalline semiconductor film depositing an amorphous semiconductor film containing silicon on an insulating surface, providing a material containing the catalyst metal in a selected portion of the amorphous semiconductor film, and heating the amorphous semiconductor film, Forming an amorphous semiconductor film in a horizontal direction with respect to the insulating surface, and reducing the concentration of the catalyst metal by treating the surface of the crystallized semiconductor film with a gettering agent containing fluorine or chlorine. Thin film transistor, characterized in that the. 19. The thin film transistor according to claim 18, wherein the gettering agent is hydrofluoric acid or hydrochloric acid. 19. The thin film transistor according to claim 18, wherein the crystalline semiconductor film contains hydrogen. A semiconductor device comprising a crystalline semiconductor film containing hydrogen and containing a catalytic material capable of promoting crystallization of the semiconductor film at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or less and containing silicon. The semiconductor device according to claim 21, wherein the electron mobility of said crystalline semiconductor film is 150 to 200 cm ² / Vs. 22. A semiconductor device according to claim 21, wherein said catalyst material comprises a metal selected from the group consisting of nickel, iron, cobalt, platinum and palladium. A crystalline semiconductor film containing hydrogen, containing a catalytic material capable of promoting crystallization of the semiconductor film at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or less, and containing silicon; And the crystalline semiconductor film has an electron mobility of 40 to 60 cm ² / Vs. A crystalline semiconductor film containing hydrogen, containing a catalytic material capable of promoting crystallization of the semiconductor film at a concentration of 1 × 10 ¹⁹ atoms / cm ³ or less, and containing silicon; And the crystalline semiconductor film has a hole mobility of 30 to 50 cm ² / Vs.