JP3921162B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for obtaining a crystalline semiconductor used in a thin film device such as a thin film insulated gate field effect transistor (thin film transistor or TFT).
[0002]
[Prior art]
Conventionally, a crystalline silicon semiconductor thin film used for a thin film device such as a thin film insulated gate field effect transistor (TFT) is an amorphous silicon film formed by a plasma CVD method or a thermal CVD method in an apparatus such as an electric furnace. It was produced by crystallization at a temperature of 600 ° C. or more for a long time of 12 hours or more. In particular, in order to obtain sufficient characteristics (high field effect mobility and high reliability), a longer heat treatment has been required.
[0003]
[Problems to be solved by the invention]
However, such conventional methods have many problems. One is low throughput and therefore high cost. For example, if this crystallization process requires 24 hours, 720 substrates had to be processed at the same time if the processing time per substrate was 2 minutes. However, for example, in a normally used tubular furnace, the number of substrates that can be processed at one time is 50 at most, and when only one apparatus (reaction tube) is used, it takes 30 minutes per sheet. I have. That is, 15 reaction tubes had to be used in order to reduce the processing time per sheet to 2 minutes. This meant that the scale of the investment increased and that the depreciation of the investment was large and rebounded to the cost of the product.
[0004]
Another problem was the temperature of the heat treatment. In general, a substrate used for manufacturing a TFT is roughly classified into a substrate made of pure silicon oxide such as quartz glass and an alkali-free borosilicate glass such as Corning No. 7059 (hereinafter referred to as Corning 7059). Among these, the former has excellent heat resistance and can be handled in the same way as a normal wafer process of a semiconductor integrated circuit, and therefore has no problem with respect to temperature. However, its cost is high and increases exponentially with an increase in substrate area. Therefore, at present, it is used only for TFT integrated circuits having a relatively small area.
[0005]
On the other hand, the alkali-free glass has a sufficiently low cost compared to quartz, but has a problem in terms of heat resistance, and generally has a strain point of about 550 to 650 ° C., and particularly easily available material is 600 ° C. or less. The heat treatment at 600 ° C. caused problems such as irreversible shrinkage and warping of the substrate. This was particularly noticeable when the substrate was larger than 10 inches diagonal. For the reasons described above, heat treatment conditions of 550 ° C. or less and within 4 hours have been indispensable for cost reduction for crystallization of a silicon semiconductor film. An object of the present invention is to provide a method for manufacturing a semiconductor that satisfies such conditions, and a method for manufacturing a semiconductor device using such a semiconductor.
[0006]
[Means for Solving the Problems]
The present invention can be applied to a silicon film in an amorphous state or a messy crystalline state that can be said to be a substantially amorphous state (for example, a state in which a portion having good crystallinity and an amorphous portion are mixed). An island-like film or dots, particles, clusters, lines, etc. containing nickel, iron, cobalt, platinum, and palladium are formed underneath, and this is formed at a temperature lower than the normal crystallization temperature of amorphous silicon, or glass of the substrate. A crystalline silicon film is obtained by annealing at a temperature lower than the transition point temperature.
[0007]
As for the conventional crystallization of a silicon film, a method (for example, JP-A-1-214110) has been proposed in which a crystalline island-shaped film is used as a nucleus and this is used as a seed crystal for solid phase epitaxial growth. However, in such a method, crystal growth hardly progressed at a temperature of 600 ° C. or lower. In the silicon system, in general, in order to shift from the amorphous state to the crystalline state, the molecular chain in the amorphous state is broken, and the broken molecule does not bind to other molecules again. It goes through a process of recombining the molecule into a part of the crystal to match some crystalline molecule. However, in this process, the energy for breaking the first molecular chain and maintaining it in a state not bonded to other molecules is large, and this is a barrier in the crystallization reaction. In order to give this energy, it takes several minutes at a temperature of about 1000 ° C., or several tens of hours at a temperature of about 600 ° C., and the time depends exponentially on the temperature (= energy). For example, at 550 ° C., it was hardly observed that the crystallization reaction proceeds. The conventional idea of solid phase epitaxial crystallization also did not give an answer to this problem.
[0008]
The present inventor has considered that the barrier energy of the above-described process is reduced by some kind of catalytic action, completely independent of the conventional idea of solid-phase crystallization. The inventor of the present invention easily combines nickel (Ni), iron (Fe), cobalt (Co), platinum (Pt), and palladium (Pd) with silicon. For example, in the case of nickel, nickel silicide (chemical formula NiSi) _x 0.4 ≦ x ≦ 2.5), and the lattice constant of nickel silicide is close to that of silicon crystal. Therefore, as a result of simulating ternary energy such as crystalline silicon-nickel silicide-amorphous silicon, amorphous silicon reacts easily at the interface with nickel silicide,
Amorphous silicon (silicon A) + nickel silicide (silicon B)
→ Nickel silicide (silicon A) + crystalline silicon (silicon B)
(Silicon A and B indicate the position of silicon)
It became clear that this reaction occurred. The potential barrier for this reaction is sufficiently low and the reaction temperature is low. This reaction equation shows that nickel progresses while transforming amorphous silicon into crystalline silicon. In practice, it was found that the reaction started at 580 ° C. or lower, and that the reaction was observed even at 450 ° C. As a matter of course, the higher the temperature, the faster the reaction proceeds. Similar effects were also observed with platinum, iron, and cobalt.
[0009]
In the present invention, at least one of nickel, iron, cobalt, platinum, palladium such as island-like, stripe-like, linear, dot-like nickel, iron, cobalt, platinum, palladium alone or their silicide, acetate, nitrate, etc. Starting from films, particles, clusters, etc. containing two, nickel, iron, cobalt, platinum, and palladium expand from this to the surroundings with the above reaction, thereby expanding the crystalline silicon region . Note that oxides are not preferable as materials containing nickel, iron, cobalt, and platinum. This is because an oxide is a stable compound and cannot start the above reaction.
[0010]
Crystalline silicon spread from a specific location is different from conventional solid-phase epitaxial growth, but has a crystallinity-continuous structure close to a single crystal, so it can be used for semiconductor devices such as TFTs. This is convenient. In the case where a material containing nickel, iron, cobalt, platinum, and palladium is uniformly provided on the substrate, there are innumerable starting points for crystallization, and therefore it is difficult to obtain a film with good crystallinity.
In addition, the amorphous silicon film as a starting material for the crystallization gave better results as the hydrogen concentration was lower. However, since hydrogen is released as the crystallization progresses, the hydrogen concentration in the obtained silicon film is not so clearly correlated with the hydrogen concentration in the amorphous silicon film as the starting material. The hydrogen concentration in the crystalline silicon according to the invention is typically 1 × 10 ¹⁵ Atom / cm ^Three It was 5 atomic percent or less.
[0011]
Although nickel, iron, cobalt, platinum, and palladium are used in the present invention, these materials are not preferable for silicon as a semiconductor material. Therefore, when it is excessively contained in the silicon film, it is necessary to remove it. However, with regard to nickel, nickel silicide that has reached the end of crystallization as a result of the above reaction is either hydrofluoric acid or Since it dissolves easily in hydrochloric acid, nickel can be reduced from the substrate by treatment with these acids.
Furthermore, in order to actively reduce nickel, iron, cobalt, platinum, and palladium, hydrogen chloride, various methane chlorides (CH _Three Cl, CH ₂ Cl ₂ , CHCl _Three ), Various ethane chlorides (C ₂ H _Five Cl, C ₂ H _Four Cl ₂ , C ₂ H _Three Cl _Three , C ₂ H ₂ Cl _Four , C ₂ HCl _Five ) Or various ethylene chloride (C ₂ H _Three Cl, C ₂ H ₂ Cl ₂ , C ₂ HCl _Three ) And the like in an atmosphere containing chlorine. In particular, trichlorethylene (C ₂ HCl _Three ) Is an easy-to-use material. The concentration of nickel, iron, cobalt and platinum in the silicon film according to the present invention is 1 × 10 ¹⁵ cm ^-3 ˜1 atomic%, more preferably 1 × 10 ¹⁶ cm ^-3 ~ 1x10 ¹⁹ cm ^-3 Was found to be preferable. Below this range, crystallization does not proceed sufficiently. On the other hand, when it exceeds this range, characteristics and reliability deteriorate.
[0012]
Various physical and chemical methods can be used to form film-like nickel, iron, cobalt, platinum, and palladium. For example, it can be performed in the atmosphere such as a vacuum deposition method, a sputtering method, a CVD method and other necessary methods of a vacuum apparatus, a spin coating method, a dip method (coating method), a doctor blade method, a screen printing method, a spray pyrolysis method, etc. Is the method.
In particular, the spin coating method and the dip method do not require any special equipment, but are excellent in film thickness uniformity and capable of fine density adjustment. The solutions used in these means include nickel, iron, cobalt, platinum, palladium acetates and nitrates, various carboxylates, and other organic acid salts such as water, various alcohols (lower and higher grades), petroleum ( What is dissolved or diffused in a saturated hydrocarbon or unsaturated hydrocarbon) may be used.
[0013]
However, in this case, there is a concern that oxygen and carbon contained in these salts diffuse into the silicon film and deteriorate semiconductor characteristics. However, as a result of research conducted by thermobalance and differential thermal analysis, suitable materials decompose into oxides or simple substances at a temperature of 450 ° C. or lower, and then diffuse into the silicon film. It was confirmed that there was almost nothing. In particular, when a low-order substance such as acetate or nitrate was heated in a reducing atmosphere such as a nitrogen atmosphere, it decomposed at 400 ° C. or lower to form a single metal. Similarly, when heated in an oxygen atmosphere, it was observed that an oxide was first formed, and oxygen was released at a higher temperature to form a single metal.
[0014]
When the crystalline silicon film produced according to the present invention is used for a semiconductor element such as a TFT, as is apparent from the above description, the crystallization end point (this is a portion where crystallization started from a plurality of starting points hits. However, since there are large grain boundaries (discontinuous portions of crystallinity) and the concentration of nickel, iron, cobalt, platinum, palladium, etc. is high, it is not preferable to provide a semiconductor element. In particular, the channel region of the TFT should not be provided.
In addition, the location where crystallization is started, that is, the region where a substance having nickel, iron, cobalt, platinum, palladium, or the like is provided has a high concentration of these elements. Compared with silicon films that do not contain these elements, it is generally easier to etch with hydrofluoric acid solutions, which may cause contact failure when forming contact holes and the like. . Therefore, in forming a semiconductor element using the present invention, it is necessary to optimize the pattern of the coating film containing nickel, iron, cobalt, platinum, palladium, etc. and the pattern of the semiconductor element, which are the starting points for crystallization. . The following examples illustrate the invention in more detail.
[0015]
【Example】
[Example 1] In this example, a plurality of island-shaped nickel films on a Corning 7059 glass substrate are formed, and an amorphous silicon film is crystallized using these as starting points, and the obtained crystalline silicon film is used. A method for manufacturing a TFT will be described. There are two methods for forming an island-shaped nickel film in that it is provided on an amorphous silicon film or below. FIG. 2A-1 shows a method provided below, and FIG. 2A-2 shows a method provided above. In particular, it is necessary to pay attention to the latter, since nickel is formed on the entire surface of the amorphous silicon film, and this is selectively etched. Nickel is formed. If this is left as it is, a good crystalline silicon film as intended by the present invention cannot be obtained. Therefore, it is required to sufficiently remove this nickel silicide with hydrochloric acid, hydrofluoric acid or the like. . For this reason, the amorphous silicon becomes thinner than the initial stage.
[0016]
On the other hand, such a problem does not occur with the former, but in this case as well, it is desirable that the nickel film other than the island-like portions be completely removed by etching. Furthermore, in order to suppress the influence of residual nickel, the substrate may be treated with oxygen plasma, ozone, or the like to oxidize nickel other than the island regions.
[0017]
In either case, an underlying silicon oxide film 1B having a thickness of 2000 mm was formed on the substrate (Corning 7059) 1A by plasma CVD. The amorphous silicon film 1 has a thickness of 200 to 3000 mm, preferably 500 to 1500 mm, and was formed by plasma CVD or low pressure CVD. The amorphous silicon film was easy to be crystallized when hydrogen was extracted by annealing at 350 to 450 ° C. for 0.1 to 2 hours and the hydrogen concentration in the film was kept at 5 atomic% or less. In the case of FIG. 2A-1, a nickel film is deposited to a thickness of 50 to 1000 mm, preferably 100 to 500 mm, by sputtering before the amorphous silicon film 1 is formed, and is patterned to form island-shaped nickel regions. 2 was formed.
[0018]
On the other hand, in the case of FIG. 2 (A-2), after the amorphous silicon film 1 is formed, a nickel film is deposited by sputtering to a thickness of 50 to 1000 mm, preferably 100 to 500 mm, and this is patterned to form island-shaped nickel. Region 2 was formed. FIG. 1A shows a drawing of this state as viewed from above.
[0019]
The island-like nickel was a square with a side of 2 μm, and the interval was 5 to 50 μm, for example 20 μm. A similar effect can be obtained by using nickel silicide instead of nickel. In addition, when the nickel film was formed, good results were obtained by heating the substrate to 100 to 500 ° C., preferably 180 to 250 ° C. This is because the adhesion between the underlying silicon oxide film and the nickel film is improved, and the silicon oxide and nickel react to produce nickel silicide. Similar effects can be obtained by using silicon nitride, silicon carbide, or silicon instead of silicon oxide.
[0020]
Next, this was annealed in a nitrogen atmosphere at 450 to 650 ° C., for example, 550 ° C. for 8 hours. FIG. 2B shows an intermediate state in which nickel proceeds from the island-like nickel film at the end in FIG. 2A to the central portion as nickel silicide 3A, and the portion 3 through which nickel has passed. Is crystalline silicon. Eventually, as shown in FIG. 2C, crystallization starting from two island-like nickel films collides, leaving nickel silicide 3A in the middle, and crystallization is completed.
[0021]
FIG. 1B shows a state in which the substrate in this state is viewed from above, and the nickel silicide 3 </ b> A in FIG. 2C is a grain boundary 4. If the annealing is further continued, the nickel moves along the grain boundaries 4 and collects in an intermediate region 5 of these island-like nickel regions (although the original shape is not retained at this stage).
[0022]
Crystalline silicon can be obtained by the above steps, but it is not preferable that nickel is diffused into the semiconductor film from the nickel silicide 3A generated at this time. Therefore, it is desirable to etch with hydrofluoric acid or hydrochloric acid. Note that neither hydrofluoric acid nor hydrochloric acid affects the silicon film. The state after etching is shown in FIG. The portion where the grain boundary exists is the groove 4A. It is not preferable to form a semiconductor region (active layer or the like) of the TFT so as to sandwich this groove. An example of the TFT arrangement is shown in FIG. 1C. The semiconductor region 6 is arranged so as not to cross the grain boundary 4. On the other hand, the gate wiring 7 may cross the grain boundary 4.
[0023]
An example of manufacturing a TFT using crystalline silicon obtained through the above steps is shown in FIGS. In FIG. 3A, X in the center means the place where the groove 4A in FIG. 2 was present. As shown in the drawing, the portion X is arranged so that the semiconductor region of the TFT does not cross. That is, the crystalline silicon film 3 obtained in the step shown in FIG. 2 was patterned to form island-like semiconductor regions 11a and 11b. Then, a silicon oxide film 12 functioning as a gate insulating film was formed by a method such as an RF plasma CVD method, an ECR plasma CVD method, or a sputtering method.
[0024]
Further, phosphorus is 1 × 10 5 by low pressure CVD. ²⁰ ~ 5x10 ²⁰ cm ^-3 A doped polycrystalline silicon film having a thickness of 3000 to 6000 mm was formed and patterned to form gate electrodes 13a and 13b. (Fig. 3 (A))
[0025]
Next, impurity doping was performed by a plasma doping method. As a doping gas, for example, phosphine (PH _Three ), Diborane (B ₂ H ₆ ) Was used. In the figure, an N-type TFT is shown. The acceleration voltage was 80 keV for phosphine and 65 keV for diborane. Further, annealing was performed at 550 ° C. for 4 hours to activate the impurities and form the impurity regions 14a to 14d. A method using light energy such as laser annealing or flash lamp annealing can also be used for activation. (Fig. 3 (B))
[0026]
Finally, a silicon oxide film having a thickness of 5000 mm is deposited as an interlayer insulator 15 in the same manner as in the normal TFT fabrication, and contact holes are formed in the silicon oxide film to form wiring / electrodes 16a to 16d in the source region and the drain region. . (Figure 3 (C))
A TFT (N-channel type in the figure) was manufactured through the above steps. The field effect mobility of the obtained TFT is 40-60 cm in the N channel type. ² / Vs, P channel type, 30-50cm ² / Vs.
[0027]
FIG. 4 shows a case where an aluminum gate TFT is manufactured. In FIG. 4A, X in the center means the place where the groove 4A in FIG. 2 was present. As shown in the drawing, the portion X is arranged so that the semiconductor region of the TFT does not cross. That is, the crystalline silicon film 3 obtained in the step shown in FIG. 2 was patterned to form island-like semiconductor regions 21a and 21b. Then, a silicon oxide film 22 functioning as a gate insulating film was formed by a method such as an RF plasma CVD method, an ECR plasma CVD method, or a sputtering method. When the plasma CVD method is employed, TEOS (tetra-ethoxy silane) and oxygen are preferably used as the source gas. Then, an aluminum film (thickness 5000 mm) containing 1% silicon was deposited by sputtering, and this was patterned to form gate wiring / electrodes 23a and 23b.
[0028]
Next, the substrate was immersed in an ethylene glycol solution of 3% tartaric acid, and platinum was used as a cathode, and an aluminum wiring was used as an anode. The current is first applied so that the voltage increases at 2 V / min. When the voltage reaches 220 V, the voltage is constant, and the current is 10 μA / m. ² The current was stopped when: As a result, anodic oxides 24a and 24b having a thickness of 2000 mm were formed. (Fig. 4 (A))
[0029]
Next, impurity doping was performed by a plasma doping method. As a doping gas, N-type phosphine (PH _Three ), Diborane (B ₂ H ₆ ) Was used. The figure shows an N-channel TFT. The acceleration voltage was 80 keV for phosphine and 65 keV for diborane. Furthermore, this was laser-annealed to activate the impurities and form impurity regions 25a to 25d. The laser used was a KrF laser (wavelength 248 nm), 250 to 300 mJ / cm. ² A laser beam having an energy density of 5 shots was irradiated. (Fig. 4 (B))
[0030]
Finally, a silicon oxide film having a thickness of 5000 mm is deposited as an interlayer insulator 26 in the same manner as in the normal TFT fabrication, and contact holes are formed in the silicon oxide film to form wiring / electrodes 27a to 27d in the source region and the drain region. . (Fig. 4 (C))
The field effect mobility of the obtained TFT is N-channel type and 60 to 120 cm. ² / Vs, P-channel type, 50-90cm ² / Vs. In addition, it was confirmed that the shift register manufactured using this TFT operates at 6 MHz at a drain voltage of 17 V and at 11 MHz at 20 V.
[0031]
Example 2 FIG. 5 shows a case where an aluminum gate TFT is manufactured as in FIG. Here, however, amorphous silicon was used as the active layer. As shown in FIG. 5A, a base silicon oxide film 32 was deposited on a substrate 31, and an amorphous silicon film 33 having a thickness of 2000 to 3000 mm was further deposited. An appropriate amount of P-type or N-type impurities may be mixed in the amorphous silicon film. Then, as shown above, island-like nickel or nickel silicide coatings 34A and 34B were formed, and in this state, the amorphous silicon film was crystallized by annealing at 550 ° C. for 4 hours.
[0032]
Next, the crystalline silicon film thus obtained was patterned as shown in FIG. At this time, since the silicon film in the central part (intermediate part of the nickel or nickel silicide coatings 34A, 34B) contains a large amount of nickel, patterning is performed so as to remove the silicon film 35A, 35B was formed. Further, a substantially intrinsic amorphous silicon film 36 was deposited thereon.
Thereafter, as shown in FIG. 5C, a film is formed of a material such as silicon nitride or silicon oxide as the gate insulating film 37, the gate electrode 38 is formed of aluminum, and anodic oxidation is performed as in FIG. Impurity regions 39A and 39B are formed by diffusing impurities by ion doping. Further, an interlayer insulator 40 is deposited, contact holes are formed, and metal electrodes 41A and 41B are formed on the source and drain to complete the TFT. This TFT is characterized in that the semiconductor film in the source and drain portions is thicker and the resistivity is lower than the thickness of the active layer. As a result, the resistance in the source and drain regions is reduced, and the TFT characteristics are reduced. Will improve. Further, the contact can be easily formed.
[0033]
Example 3 FIG. 6 shows a case where a CMOS type TFT is manufactured. As shown in FIG. 6A, a base silicon oxide film 52 was deposited on a substrate 51, and an amorphous silicon film 53 having a thickness of 1000 to 1500 mm was further deposited. Then, an island-like nickel or nickel silicide coating 54 is formed as described above, and annealing is performed at 550 ° C. in this state. By this step, the silicon silicide region 55 grows and crystallization proceeds. By annealing for 4 hours, the amorphous silicon film is changed to crystalline silicon as shown in FIG. Further, the silicon silicide 59A and 59B are driven to the end by the progress of crystallization.
[0034]
Next, the crystalline silicon film thus obtained was patterned as shown in FIG. 6B to form island-like silicon regions 56. At this time, it should be noted that the nickel concentration is high at both ends of the island region. After forming the island-like silicon region, a gate insulating film 57 and gate electrodes 58A and 58B were formed.
[0035]
Thereafter, as shown in FIG. 5C, impurities are diffused by ion doping to form an N-type impurity region 60A and a P-type impurity region 60B. In this case, for example, phosphorus as an N-type impurity (doping gas is phosphine PH). _Three Then, the entire surface is doped with an acceleration voltage of 60 to 110 kV, and then the region of the N-channel TFT is covered with a photoresist to form a P-type impurity such as boron (the doping gas is diborane B). ₂ H ₆ ) And doping at an acceleration voltage of 40 to 80 kV.
[0036]
After the doping is completed, the source and drain are activated by laser light irradiation as in the case of FIG. 4, and further, the interlayer insulator 61 is deposited, contact holes are formed, and the metal electrodes 62A, 62B, and 62C are formed. A TFT is completed by forming the source and drain.
[0037]
[Embodiment 4] The present embodiment relates to a configuration in which the crystallinity of the crystalline silicon film is further improved by irradiating laser light after the crystallization step by heating at 550 ° C. for 4 hours in the step of Embodiment 3. .
FIG. 7 shows a manufacturing process of the CMOS type TFT of this embodiment. First, as shown in FIG. 7A, a base silicon oxide film 52 was deposited on a substrate 51 to a thickness of 2000 mm by a sputtering method. Further, an amorphous silicon film 53 having a thickness of 1000 to 1500 mm was deposited by a plasma CVD method. Then, an island-like nickel or nickel silicide coating 54 was formed.
[0038]
Then, annealing was performed at 550 ° C. for 4 hours in a nitrogen atmosphere. By this step, the silicon silicide region 55 grows and crystallization proceeds. Next, the crystalline silicon film thus obtained was patterned as shown in FIG. 7B to form island-like silicon regions 56.
[0039]
Further, KrF excimer laser light (wavelength 248 nm, pulse width 20 nsec) 71 was irradiated. Irradiation conditions are 250 mJ / cm ² 2 shots. The irradiation power is 200 to 400 mJ / cm in consideration of conditions such as film thickness and substrate temperature. ² And it is sufficient. As the laser light, an XeCl laser (wavelength 308 nm), an ArF laser (wavelength 193 nm), or the like can also be used.
[0040]
Moreover, you may irradiate the strong light which can acquire the effect equivalent to the irradiation of a laser beam. In particular, RTA (rapid thermal annealing) by irradiation with infrared light can selectively absorb infrared light into silicon, so that effective annealing can be performed. Note that laser light irradiation may be performed before the patterning step.
As described above, a silicon film with good crystallinity can be obtained. As a result of such treatment, the silicon film 53 crystallized by thermal annealing became a silicon film with better crystallinity. On the other hand, even in a non-crystallized region (not shown), a polycrystalline film was obtained as a result of laser irradiation, and alteration of the film was observed, but it was revealed by Raman spectroscopy that the crystallinity was not good. Became. In addition, in the observation with a transmission electron microscope, the laser is irradiated without being crystallized, and the crystallized film has an infinite number of small crystals, whereas the film irradiated with laser after crystallization according to the present invention. In 53, relatively large crystals with the same crystal orientation were observed.
[0041]
Thereafter, gate electrodes 58A and 58B mainly composed of silicon were formed. Then, as shown in FIG. 7C, impurities are diffused by ion doping to form an N-type impurity region 60A and a P-type impurity region 60B. In this case, for example, phosphorus as an N-type impurity (doping gas is phosphine PH). _Three Then, the entire surface is doped with an acceleration voltage of 60 to 110 kV, and then the region of the N-channel TFT is covered with a photoresist to form a P-type impurity such as boron (the doping gas is diborane B). ₂ H ₆ ) And doping at an acceleration voltage of 40 to 80 kV.
[0042]
After the doping, the source and drain are activated by laser light irradiation, and further, an interlayer insulator 61 is deposited, contact holes are formed, and metal electrodes 62A, 62B, and 62C are formed on the source and drain to form a TFT. Is completed.
As shown in this example, by introducing a catalyst element that promotes crystallization, by combining a crystallization process at a low temperature of about 550 ° C. for 4 hours and an annealing process by laser light irradiation in combination. A crystalline silicon film with good crystallinity can be obtained. A high-performance TFT can be obtained by manufacturing a TFT using such a crystalline silicon film.
That is, in the N-channel TFT obtained in Example 1, the field effect mobility (mobility) is 40 to 60 cm. ² / Vs (silicon gate type, see FIG. 3) or 60-120 cm ² / Vs (aluminum gate type, see FIG. 4), the threshold voltage was 3 to 8 V, but the mobility of the N-channel TFT obtained in this example was 150 to 200 cm. ² / Vs and the threshold voltage are 0.5 to 1.5 V, and it is noted that the mobility is greatly improved and the variation in the threshold voltage is reduced.
[0043]
Conventionally, such characteristics were possible only by laser crystallization of an amorphous silicon film. However, conventional laser crystallization has a large variation in characteristics of the obtained silicon film. 350 mJ / cm at the temperature of ² Irradiation with the above high laser energy was necessary, and there was a problem in mass productivity. In this respect, in this example, the substrate temperature and the energy density are sufficient to be smaller than that, so there was no problem with respect to mass productivity. Furthermore, since the variation is similar to that of the conventional solid phase growth crystallization method by thermal annealing, the obtained TFT has uniform characteristics.
[0044]
In the present invention, when the Ni concentration is low, the crystallization of the silicon film is insufficient, and the TFT characteristics are not good. However, in this embodiment, even if the crystallinity of the silicon film is insufficient, it can be compensated for by subsequent laser irradiation. Therefore, even if the Ni concentration is low, the TFT characteristics do not deteriorate. For this reason, the nickel concentration in the active layer region of the device can be further reduced, and a highly preferable configuration can be obtained from the viewpoint of electrical stability and reliability of the device.
[0045]
[Embodiment 5] This embodiment relates to a configuration in which a catalytic element that promotes crystallization of amorphous silicon is contained in a solution, and the catalyst element is introduced into the amorphous silicon film by coating the solution on the amorphous silicon film. .
Further, in this embodiment, a method for obtaining a crystalline silicon film having a low concentration of the catalytic element by selectively introducing the catalytic element and performing crystal growth from the introduction region to a region where the catalytic element has not been introduced. About.
[0046]
FIG. 8 shows an outline of a manufacturing process of this example. In FIG. 8, the same reference numerals as those in FIG. 2 indicate the same portions as those in FIG.
First, an underlying silicon oxide film 1B was formed to a thickness of 2000 mm on a glass substrate (Corning 7059, 10 cm square) by sputtering, and an amorphous silicon film 1 was further formed to a thickness of 1000 mm by plasma CVD.
Next, a silicon oxide film 80 serving as a mask was formed to a thickness of 2000 mm. Regarding the thickness of the silicon oxide film 80, it has been confirmed by the inventors' experiments that there is no problem even if it is 500 mm, and it may be thinner if the film quality is dense.
[0047]
Then, the silicon oxide film 80 was panned into a required pattern by a normal photolithography patterning process. Then, a thin silicon oxide film 82 was formed on the surface of the amorphous silicon film 1 exposed by ultraviolet irradiation in an oxygen atmosphere. The silicon oxide film 82 is produced by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 82 is considered to be about 20 to 50 mm. (Fig. 8 (A))
[0048]
This silicon oxide film is for improving the wettability of the solution applied in a later step. In this state, 5 ml of an acetate solution obtained by adding 100 ppm (weight conversion) of nickel to the acetate solution was dropped (in the case of a 10 cm square substrate). At this time, spin coating was performed with a spinner 84 at 50 rpm for 10 seconds to form a uniform water film 83 on the entire substrate surface. Furthermore, after maintaining for 5 minutes in this state, spin drying was performed using a spinner 84 at 2000 rpm for 60 seconds. In addition, you may perform this holding | maintenance, rotating 0-150 rpm on a spinner. (Fig. 8 (A))
[0049]
Through the above process, nickel is introduced into the region indicated by 85. Then, heat treatment was performed at a temperature of 300 to 500 degrees to generate nickel silicide on the surface of the region indicated by 85. Next, the silicon oxide film 80 as a mask was removed, and the amorphous silicon film 80 was crystallized by performing a heat treatment at 550 ° C. (nitrogen atmosphere) for 4 hours. At this time, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 85 where nickel is introduced to the region where nickel is not introduced. Of course, crystallization is also performed in a region where nickel is directly introduced.
[0050]
Here, heat treatment is performed to form a nickel silicide film on the surface of the region indicated by 85, and then the silicon oxide film 80 is removed. However, without removing the silicon oxide film 80, heat treatment is performed at 550 ° C. for 4 hours. In the case of performing crystallization, it is not necessary to perform a step of forming a nickel silicide film. In this case, the silicon oxide film 80 may be removed after the crystallization process.
[0051]
FIG. 8B shows an intermediate state in which crystallization proceeds. This shows a state in which the nickel introduced toward the end proceeds to the central portion as nickel silicide 3A, and the portion 3 through which nickel has passed is crystalline silicon. When the crystallization further proceeds, as shown in FIG. 8C, the crystallization starting from the region 85 in which two nickels are introduced collides with each other, and the nickel silicide 3A remains in the middle to complete the crystallization.
[0052]
Crystalline silicon can be obtained by the above steps, but it is not preferable that nickel is diffused into the semiconductor film from the nickel silicide 3A generated at this time. Therefore, the 3A region was etched with hydrofluoric acid or hydrochloric acid. The state after etching is shown in FIG. The portion where the grain boundary exists is the groove 4A.
[0053]
In FIG. 8C, a region 86 is a region that has been crystallized laterally from the region 85. The nickel concentration in the region indicated by 86 is shown in FIG. FIG. 9 shows the measurement of the nickel concentration distribution in the depth direction in the region indicated by 86 of the crystalline silicon film that has been crystallized by SIMS. Further, it has been confirmed that the nickel concentration in the region 85 into which nickel is directly introduced shows a value higher by one digit or more than the concentration distribution shown in FIG. A TFT was fabricated in the same manner as in Example 1 using the crystalline silicon film thus obtained.
[0054]
It is effective to further improve the crystallinity by irradiating the crystalline silicon film thus obtained with a laser or intense light equivalent to that as in the fourth embodiment. In Example 4, since the nickel concentration in the silicon film was relatively high, nickel in the silicon film was precipitated by laser irradiation, and nickel silicide grains of about 0.1 to 10 μm were formed in the silicon film. Membrane morphology deteriorated. However, in this example, since the nickel concentration can be reduced much more than in Examples 1 and 2, there was no precipitation of nickel silicide, and the film was prevented from being roughened by laser irradiation.
[0055]
The nickel concentration shown in FIG. 9 can be controlled by controlling the nickel concentration in the solution. In this example, the nickel concentration in the solution was set to 100 ppm, but it has been found that crystallization is possible even if this is 10 ppm. In this case, the nickel concentration in the region 86 of FIG. 8 shown in FIG. 9 can be further lowered by one digit. However, when the nickel concentration in the solution is reduced, there is a problem that the crystal growth distance in the lateral direction is shortened.
[0056]
The crystalline silicon film crystallized as described above can be used as it is for the active layer of the TFT. In particular, it is extremely useful to form an active layer of a TFT using a region indicated by 86 because the concentration of the catalytic element is low.
In this embodiment, the acetate solution is used as the solution containing the catalyst element, but an aqueous solution, an organic solvent solution, or the like can be widely used. Here, even if the catalyst element is not contained as a compound, it may be contained simply by dispersing it.
[0057]
As the solvent containing the catalyst element, a solvent selected from polar solvents such as water, alcohol, acid and ammonia can be used.
When nickel is used as a catalyst and this nickel is included in a polar solvent, nickel is introduced as a nickel compound. Typical nickel compounds include nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chloride, nickel iodide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, 4-cyclohexylbutyric acid. A material selected from nickel, nickel oxide and nickel hydroxide is used.
[0058]
As the solvent, a nonpolar solvent selected from benzene, toluene, xylene, carbon tetrachloride, chloroform, and ether can be used.
In this case, nickel is introduced as a nickel compound. As this nickel compound, typically, one selected from nickel acetylacetonate and nickel 2-ethylhexanoate can be used.
[0059]
It is also useful to add a surfactant to the solution containing the catalyst element. This is for increasing the adhesion to the surface to be coated and controlling the adsorptivity. This surfactant may be applied on the surface to be coated in advance. When nickel alone is used as a catalyst element, it needs to be dissolved in an acid to form a solution.
[0060]
The above is an example using a solution in which nickel as a catalyst element is completely dissolved, but even if nickel is not completely dissolved, powder of nickel alone or a compound of nickel is uniformly distributed in the dispersion medium. Materials such as dispersed emulsions may be used. Alternatively, a solution for forming an oxide film may be used. As such a solution, Oka (Ohka Diffusion Source) manufactured by Tokyo Ohka Kogyo Co., Ltd. can be used. If this OCD solution is used, a silicon oxide film can be easily formed by coating on the surface to be formed and baking at about 200 ° C. Further, since impurities can be freely added, they can be utilized.
[0061]
These are the same even when a material other than nickel is used as the catalyst element.
Further, by using a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate as the solution, it can be directly applied to the surface of the amorphous silicon film. In this case, it is effective to apply in advance a material such as an adhesive used in resist application. However, when the coating amount is too large, care must be taken because it interferes with the addition of the catalytic element into the amorphous silicon.
[0062]
The amount of the catalytic element contained in the solution depends on the type of the solution, but as a general tendency, the nickel amount is preferably 200 ppm to 1 ppm, preferably 50 ppm to 1 ppm (weight conversion) as a nickel amount. . This is a value determined in view of the nickel concentration in the film and the hydrofluoric acid resistance after crystallization is completed.
In this embodiment, an example in which a solution containing a catalytic element is applied on the upper surface of the amorphous silicon film is shown. However, a solution containing a catalytic element is applied on the base film before the amorphous silicon film is formed. It's okay.
[0063]
[Embodiment 6] This embodiment relates to a positional relationship between a catalytic element addition region and a crystallization region, an active layer (channel region), and a contact hole when a TFT is manufactured using the present invention. Hereinafter, the pixel portion of the maximum matrix will be described as an example.
FIG. 10 shows a manufacturing process of the TFT of this example. First, as shown in FIG. 10A, a base silicon oxide film 92 was deposited on a substrate 91 to a thickness of 2000 mm by sputtering. Further, an amorphous silicon film 93 having a thickness of 300 to 1500 mm, for example, 800 mm was deposited by plasma CVD. Then, a silicon oxide film 94 having a thickness of 200 to 2000 mm, for example, 300 mm, was formed, and holes 96a and 96b were formed in the silicon oxide film 94, which was used as a mask. Then, an extremely thin nickel film or nickel compound film 95 was formed on the entire surface by sputtering or spin coating as in Example 5.
[0064]
Then, annealing was performed at 550 ° C. for 4 hours in a nitrogen atmosphere. Through this process, the portions 97a and 97b immediately below the holes 96a and 96b of the amorphous silicon film became silicide, and crystallization progressed from there to grow silicon regions 98a and 98b. The tip portions were regions 99a and 99b having a high nickel concentration. (Fig. 10 (B))
In a state where the crystallization has progressed sufficiently, the crystallization proceeding from the holes 96a and 96b collided in the middle, and the crystallization stopped in this state. A region 99a having a high nickel concentration was left in the portion where the crystallization collided. In this state, optical annealing may be further performed by an excimer laser or the like as in the fourth embodiment. (Fig. 10 (C))
Next, the island-like silicon region 100 was formed by patterning the crystalline silicon film thus obtained as shown in FIG. In the silicon region 100, a part of the region 97a having a high nickel concentration and 99c are left. Further, a silicon oxide film 101 having a thickness of 700 to 2000 mm, for example, 1200 mm, was formed by plasma CVD, and this was used as a gate insulating film. (Figure 10 (D))
[0065]
Thereafter, the gate electrode 102 was formed of aluminum using the same means as in Example 1. An anodized film 103 having a thickness of 1000 to 5000 mm was formed around the gate electrode. Then, N-type impurity regions 104 and 105 were formed by diffusing impurities by an ion doping method. At this time, as shown in the figure, the position of the gate electrode must be determined so that the regions 97a and 99c with high nickel concentration are not located in the portion (channel region) immediately below the gate electrode. (Fig. 10 (E)
[0066]
After the doping is completed, the source and drain are activated by laser light irradiation, an interlayer insulator 106 is deposited, and a transparent conductor film having a thickness of 500 to 1500 mm, for example, 800 mm is formed by sputtering, The pixel electrode 107 was formed by patterning and etching. Further, contact holes were formed in the interlayer insulator 106, and metal electrodes 108 and 109 were formed in the source and drain of the TFT to complete the TFT.
When forming the contact hole, it is desirable to form the contact hole avoiding the regions 97a and 99c having high nickel concentration. For this purpose, the contact hole may be designed so as not to overlap with the holes 96a and 96b for adding nickel as much as possible. Such a design is performed because in a region where nickel concentration is high, a hydrogen fluoride-based solution is more easily etched than a silicon film having no nickel, and a silicon film is formed when a contact hole is formed. This is because overetching is likely to cause contact failure. In the drawing, the contact on the left side partially overlaps the region 97a having a high nickel concentration, but it is desirable that at least a part of the electrode is in contact with a region that is not a region to which nickel is added.
[0067]
【The invention's effect】
As described above, the present invention is epoch-making in the sense of promoting the low temperature and short time of crystallization of amorphous silicon, and the equipment, apparatus, and technique for that purpose are very general, And because it is excellent in mass productivity, the benefits to the industry are immense.
[0068]
For example, in the conventional solid phase growth method, since annealing for at least 24 hours is required, if the substrate processing time per one is 2 minutes, 15 annealing furnaces are required. According to the present invention, the number of annealing furnaces can be reduced to 1/6 or less because it can be shortened within 4 hours. The improvement in productivity and the reduction in capital investment due to this result in a decrease in substrate processing cost, and in turn, a decrease in TFT price and arousing new demand. Thus, the present invention is industrially beneficial and is worthy of being patented.
[Brief description of the drawings]
FIG. 1 shows a top view of steps of an embodiment. (Crystallization and TFT arrangement)
FIG. 2 shows a cross-sectional view of the steps of the example. (Selective crystallization process)
FIG. 3 shows a cross-sectional view of the steps of the example. (See Example 1)
FIG. 4 shows a cross-sectional view of the steps of the example. (See Example 1)
FIG. 5 shows a cross-sectional view of the steps of the example. (See Example 2)
FIG. 6 shows a cross-sectional view of the steps of the example. (See Example 3)
FIG. 7 shows a cross-sectional view of the steps of the example. (See Example 4)
FIG. 8 shows a cross-sectional view of the steps of the example. (See Example 5)
FIG. 9 shows the nickel concentration in the crystalline silicon film. (See Example 5)
FIG. 10 shows a cross-sectional view of the steps of the example. (See Example 6)
[Explanation of symbols]
1 ... Amorphous silicon
2 ... Island-like nickel film
3 ... Crystalline silicon
4 ... Grain boundary
5 ... Area where crystallization is not progressing
6 ... Semiconductor region
7 ・ ・ ・ Gate wiring

Claims (2)

An amorphous silicon film is formed on the insulating surface,
By heating the amorphous silicon film, the hydrogen concentration in the amorphous silicon film is set to 5 atomic% or less,
Provided nickel on part of the amorphous silicon film,
After said amorphous silicon film to the crystalline silicon film nickel silicide is formed by heating,
The nickel silicide is removed by hydrofluoric acid or hydrochloric acid,
Patterning the crystalline silicon film from which the nickel silicide has been removed to form island-like silicon regions;
Forming a gate insulating film on the island-like silicon region;
A method for manufacturing a semiconductor device, comprising forming a gate electrode over the gate insulating film. In claim 1 ,
A method for manufacturing a semiconductor device, wherein the amorphous silicon film is made into a crystalline silicon film and then processed in an atmosphere containing chlorine.

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