JPH06232292A - Package for housing semiconductor device - Google Patents

Package for housing semiconductor device

Info

Publication number
JPH06232292A
JPH06232292A JP50A JP1995993A JPH06232292A JP H06232292 A JPH06232292 A JP H06232292A JP 50 A JP50 A JP 50A JP 1995993 A JP1995993 A JP 1995993A JP H06232292 A JPH06232292 A JP H06232292A
Authority
JP
Japan
Prior art keywords
semiconductor element
package
resin
housing
lid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50A
Other languages
Japanese (ja)
Other versions
JP2750254B2 (en
Inventor
Shogo Matsuo
省吾 松尾
Toshiya Tanaka
利弥 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP5019959A priority Critical patent/JP2750254B2/en
Publication of JPH06232292A publication Critical patent/JPH06232292A/en
Application granted granted Critical
Publication of JP2750254B2 publication Critical patent/JP2750254B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To effectively prevent moisture contained in the atmosphere from entering the container consisting of an insulated base body and a lid body so as to make a semiconductor device to be housed inside a container normally and stably act for a long term. CONSTITUTION:This is a package for housing a semiconductor device consisting of an insulated base body 1 consisting of resin and having a recessed part 1a for housing a semiconductor device 3 and a lid body 2 blocking the recessed part 1a of an insulated base body 1 with a moisture-absorbing material buried in the insulated base body 1 consisting of resin.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体素子を内部に収容
するための半導体素子収納用パッケージに関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor element housing package for housing a semiconductor element therein.

【0002】[0002]

【従来の技術】従来、半導体素子を収容するための半導
体素子収納用パッケージ、特に廉価な半導体素子収納用
パッケージは一般に、エポキシ樹脂から成り、上面に半
導体素子を収容するための凹部を有する絶縁基体と、前
記絶縁基体の凹部内側から外側にかけて導出する複数個
の外部リード端子と、前記絶縁基体の上面に封止材を介
して取着され、絶縁基体の凹部を塞ぐ蓋体とから構成さ
れており、絶縁基体の凹部底面に半導体素子を樹脂製接
着材を介して取着するとともに該半導体素子の各電極を
外部リード端子の一端にボンディングワイヤを介して電
気的に接続し、しかる後、前記絶縁基体の上面に蓋体を
樹脂製封止材を介して接合させ、半導体素子を絶縁基体
と蓋体とから成る容器内部に気密に封止することによっ
て最終製品としての半導体装置となる。
2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element, particularly an inexpensive semiconductor element housing package, is generally made of an epoxy resin and has an insulating base having a recess for housing a semiconductor element on its upper surface. And a plurality of external lead terminals extending from the inside to the outside of the recess of the insulating base, and a lid body attached to the upper surface of the insulating base via a sealing material to close the recess of the insulating base. A semiconductor element is attached to the bottom surface of the concave portion of the insulating substrate via a resin adhesive, and each electrode of the semiconductor element is electrically connected to one end of an external lead terminal via a bonding wire. The lid is bonded to the upper surface of the insulating base via a resin sealing material, and the semiconductor element is hermetically sealed inside the container composed of the insulating base and the lid to obtain a final product. A semiconductor device.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージにおいては、絶縁基体
がエポキシ樹脂から成り、該エポキシ樹脂は耐湿性に劣
るため絶縁基体と蓋体とから成る容器内部に半導体素子
を気密に収容した後、大気中に含まれる水分が絶縁基体
を通して半導体素子が収容されている凹部内に入り込み
易く、凹部内に水分が入り込むと半導体素子の電極やボ
ンディングワイヤ等に酸化腐食が発生し、電極やボンデ
ィングワイヤに断線が発生して半導体装置としての機能
が喪失するという欠点を有していた。
However, in this conventional package for accommodating semiconductor elements, the insulating substrate is made of an epoxy resin, and since the epoxy resin is inferior in moisture resistance, it is placed inside the container made of the insulating substrate and the lid. After the semiconductor element is hermetically housed, the water contained in the atmosphere easily enters the recess containing the semiconductor element through the insulating substrate, and when the water enters the recess, the electrodes and bonding wires of the semiconductor element are oxidized and corroded. Occurs, and the electrode or the bonding wire is disconnected, and the function as a semiconductor device is lost.

【0004】また内部に収容する半導体素子が固体撮像
素子で、蓋体がガラス等の透明部材から成る場合には、
容器内部に水分が入り込むと蓋体に結露によるくもりが
発生し、固体撮像素子に良好な光電変換を起こさせるこ
とができないという欠点も有していた。
Further, when the semiconductor element housed inside is a solid-state image pickup element and the lid body is made of a transparent member such as glass,
When water enters the inside of the container, clouding occurs due to dew condensation on the lid, which also has a drawback that good photoelectric conversion cannot be caused in the solid-state imaging device.

【0005】[0005]

【発明の目的】本発明は上記欠点に鑑み案出されたもの
で、その目的は絶縁基体と蓋体とから成る容器内部に大
気中に含まれる水分が入り込むのを有効に防止し、容器
内部に収容される半導体素子を長期間にわたり正常、且
つ安定に作動させることができる半導体素子収納用パッ
ケージを提供することにある。
SUMMARY OF THE INVENTION The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to effectively prevent moisture contained in the atmosphere from entering the inside of a container composed of an insulating base and a lid, and It is an object of the present invention to provide a semiconductor element housing package capable of normally and stably operating the semiconductor element housed in the semiconductor device for a long period of time.

【0006】[0006]

【課題を解決するための手段】本発明は樹脂から成り、
半導体素子を収容するための凹部を有する絶縁基体と、
前記絶縁基体の凹部を塞ぐ蓋体とから成る半導体素子収
納用パッケージであって、前記樹脂から成る絶縁基体中
に吸湿材が埋入されていることを特徴とするものであ
る。
The present invention comprises a resin,
An insulating substrate having a recess for accommodating a semiconductor element;
A package for accommodating a semiconductor element, which comprises a lid that closes a recess of the insulating base, wherein a hygroscopic material is embedded in the insulating base made of the resin.

【0007】[0007]

【作用】本発明の半導体素子収納用パッケージによれ
ば、絶縁基体中に吸湿材を埋入させたことから絶縁基体
を通して絶縁基体と蓋体とから成る容器内部に大気中に
含まれる水分が入り込もうとしてもその入り込みは吸湿
材で阻止され、その結果、容器内部に収容した半導体素
子の電極及び半導体素子の各電極と外部リード端子とを
電気的に接続するボンディングワイヤに酸化腐食が発生
することは殆ど無く、半導体素子を長期間にわたり正
常、且つ安定に作動させることが可能となる。
According to the package for housing a semiconductor element of the present invention, since the hygroscopic material is embedded in the insulating substrate, moisture contained in the atmosphere can be introduced into the container composed of the insulating substrate and the lid through the insulating substrate. Even if it tries, the entry is blocked by the hygroscopic material, and as a result, oxidation corrosion occurs on the electrodes of the semiconductor element housed inside the container and the bonding wires that electrically connect each electrode of the semiconductor element and the external lead terminals. It is possible to operate the semiconductor element normally and stably for a long period of time.

【0008】また内部に収容する半導体素子が固体撮像
素子で、蓋体がガラス等の透明部材から成る場合、蓋体
に結露によるくもりが発生することはなく、固体撮像素
子に正確な光電変換を起こさせることも可能となる。
When the semiconductor element housed inside is a solid-state image pickup element and the lid is made of a transparent member such as glass, clouding due to dew condensation does not occur on the lid, and accurate photoelectric conversion is performed on the solid-state image pickup element. It is possible to wake it up.

【0009】[0009]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1は本発明の半導体素子収納用パッケージの一実
施例を示し、1は絶縁基体、2は蓋体であ。この絶縁基
体1と蓋体2とで半導体素子3を収容するための容器4
が構成される。
The present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of a package for accommodating a semiconductor device of the present invention, 1 is an insulating base, and 2 is a lid. A container 4 for housing the semiconductor element 3 with the insulating base 1 and the lid 2.
Is configured.

【0010】前記絶縁基体1はその上面中央部に半導体
素子3を収容するための凹部1aを有し、該凹部1a底
面には半導体素子3が樹脂製接着剤を介して接着固定さ
れる。
The insulating substrate 1 has a recess 1a for accommodating the semiconductor element 3 in the center of the upper surface thereof, and the semiconductor element 3 is adhered and fixed to the bottom surface of the recess 1a via a resin adhesive.

【0011】前記絶縁基体1はエポキシ樹脂等の樹脂か
ら成り、例えば所定型内にタブレット状に成形された粉
末のエポキシ樹脂をセットして注入するとともにこれを
150〜200 ℃の温度で熱硬化させることによって製作さ
れる。
The insulating substrate 1 is made of a resin such as an epoxy resin. For example, a powdery epoxy resin formed into a tablet shape is set in a predetermined mold and injected.
Manufactured by heat curing at a temperature of 150-200 ° C.

【0012】また前記絶縁基体1 はその内部にシリカゲ
ル、ゼオライト等の無機物、ポリアクリル酸塩系の高吸
水性ポリマー等の有機物等から成る吸湿材が埋入されて
おり、該吸湿材はエポキシ樹脂から成る絶縁基体1 中を
水分が通過するのを有効に阻止する作用を為す。
Further, the insulating substrate 1 has a hygroscopic material embedded therein such as silica gel, an inorganic substance such as zeolite, an organic substance such as a polyacrylate superabsorbent polymer, and the like. It effectively prevents moisture from passing through the insulating substrate 1 made of.

【0013】前記絶縁基体1 はその内部に吸湿材が埋入
されていることから絶縁基体1 と蓋体2 とから成る容器
内部に半導体素子3 を収容した後、大気中に含まれる水
分が絶縁基体1 を通して容器4 内部に入り込もうとして
もその入り込みは吸湿材で有効に阻止され、その結果、
容器4 内部に水分が入り込むことは無く、容器4 内部に
収容する半導体素子3 の電極等に酸化腐食が発生するの
を皆無として半導体素子3を長期間にわたり正常、且つ
安定に作動させることが可能となる。
Since the insulating substrate 1 has a hygroscopic material embedded therein, after the semiconductor element 3 is housed in the container consisting of the insulating substrate 1 and the lid 2, moisture contained in the atmosphere is insulated. Even if an attempt is made to enter the inside of the container 4 through the base 1, the entry is effectively blocked by the hygroscopic material, and as a result,
It is possible to operate the semiconductor element 3 normally and stably for a long period of time by preventing moisture from entering the inside of the container 4 and preventing the electrodes of the semiconductor element 3 housed inside the container 4 from being oxidized and corroded. Becomes

【0014】尚、前記吸湿材はシリカゲル、ゼオライト
等の無機物、ポリアクリル酸塩系の高吸水性ポリマー等
の有機物等の水分を吸収し易くて、且つエポキシ樹脂等
の樹脂と接合性が良い材料の粉末から成り、タブレット
状に成形された粉末のエポキシ樹脂を所定型内にセット
して注入し、絶縁基体1 を製作する際にエポキシ樹脂に
予め添加混合しておくことによって絶縁基体1 内に埋入
される。
The hygroscopic material is a material that easily absorbs moisture such as an inorganic substance such as silica gel and zeolite, an organic substance such as a polyacrylate superabsorbent polymer, and has a good bondability with a resin such as an epoxy resin. The powdered epoxy resin, which is formed into a tablet shape, is set in a predetermined mold and injected, and when the insulating base 1 is manufactured, it is added and mixed in advance with the epoxy resin to make it inside the insulating base 1. Embedded.

【0015】また前記吸湿材は絶縁基体1 に対し0.1 重
量%未満の埋入であれば絶縁基体1における水分の通過
が有効に阻止されず、また50.0重量%を越えると吸湿材
を混合させたタブレット状に成形された粉末のエポキシ
樹脂を所定型内にセットして注入し、絶縁基体1 を製作
する際、エポキシ樹脂の流れ性が悪くなって所望形状の
絶縁基体1 が得られなくなる傾向にある。従って、前記
吸湿材は絶縁基体1 に対し0.1 乃至50.0重量%の範囲で
埋入させておくことが好ましい。
Further, if the moisture absorbent is embedded in the insulating substrate 1 in an amount of less than 0.1% by weight, the passage of water through the insulating substrate 1 is not effectively blocked, and if it exceeds 50.0% by weight, the moisture absorbent is mixed. When an insulating base 1 is manufactured by setting and injecting a powdered epoxy resin into a predetermined mold in a predetermined mold, the flowability of the epoxy resin tends to deteriorate and the insulating base 1 having a desired shape cannot be obtained. is there. Therefore, it is preferable that the hygroscopic material is embedded in the insulating substrate 1 in the range of 0.1 to 50.0% by weight.

【0016】更に前記吸湿材はその粒径が200 μm を越
えると金型のゲートに吸湿材が詰まり、樹脂が所定型内
に流れなくなって未充填の状態で熱硬化されてしまい、
絶縁基体が製作できなくなる傾向にある。従って、前記
吸湿材はその粒径を200 μm未満としておくことが好ま
しい。
Further, when the particle diameter of the hygroscopic material exceeds 200 μm, the hygroscopic material is clogged with the gate of the mold, the resin does not flow into the predetermined mold, and the resin is thermoset in an unfilled state.
There is a tendency that an insulating substrate cannot be manufactured. Therefore, it is preferable that the particle diameter of the moisture absorbent is less than 200 μm.

【0017】前記絶縁基体1はまたその凹部1a内側か
ら外側にかけて複数個の外部リード端子5が取着されて
おり、該外部リード端子5の凹部1a内側に露出する各
々の部位には半導体素子3の各電極がボンディングワイ
ヤ6を介して電気的に接続され、また外側に露出する部
位には外部電気回路が接続される。
A plurality of external lead terminals 5 are attached to the insulating base 1 from the inside to the outside of the recess 1a, and the semiconductor element 3 is attached to each portion of the external lead terminal 5 exposed inside the recess 1a. The electrodes are electrically connected to each other via the bonding wires 6, and an external electric circuit is connected to a portion exposed to the outside.

【0018】前記外部リード端子5はコバール金属(鉄
ーニッケルーコバルト合金)や42アロイ(鉄ーニッケ
ル合金)等の金属材料から成り、コバール金属等のイン
ゴット(塊)を圧延加工法や打ち抜き加工法等、従来周
知の金属加工法を採用することによって所定の板状に形
成される。
The external lead terminal 5 is made of a metal material such as Kovar metal (iron-nickel-cobalt alloy) or 42 alloy (iron-nickel alloy). The ingot (lump) of Kovar metal or the like is rolled or punched. The metal plate is formed into a predetermined plate shape by using a conventionally known metal processing method.

【0019】尚、前記外部リード端子5はタブレット状
に成形された粉末のエポキシ樹脂を所定型内にセットし
注入することによって絶縁基体1を製作する際、所定型
内の所定位置に予めセットしておくことによって絶縁基
体1の凹部1a内側から外側にかけて一体的に取着され
る。
The external lead terminals 5 are set in advance in a predetermined position in a predetermined mold when the insulating substrate 1 is manufactured by setting and injecting a powdered epoxy resin in a tablet shape into a predetermined mold. In this way, the insulating base 1 is integrally attached from the inside to the outside of the recess 1a.

【0020】また前記外部リード端子2はその露出する
表面にニッケル、金等の耐蝕性に優れ、且つロウ材と濡
れ性の良い金属を0.1 乃至20.0μm の厚みに層着させて
おくと外部リード端子5 の酸化腐食を有効に防止するこ
とができるとともに外部リード端子5 とボンディングワ
イヤ6 の接続及び外部リード端子5 と外部電気回路との
接続を強固となすことができる。従って、前記外部リー
ド端子5 はその露出する表面にニッケル、金等を0.1 乃
至20.0μm の厚みに層着させておくことが好ましい。
The external lead terminal 2 is formed by depositing a metal such as nickel or gold, which has excellent corrosion resistance and has good wettability with the brazing material, on the exposed surface to a thickness of 0.1 to 20.0 μm. Oxidation and corrosion of the terminal 5 can be effectively prevented, and the connection between the external lead terminal 5 and the bonding wire 6 and the connection between the external lead terminal 5 and the external electric circuit can be made firm. Therefore, it is preferable that the exposed surface of the external lead terminal 5 is layered with nickel, gold or the like in a thickness of 0.1 to 20.0 μm.

【0021】前記外部リード端子5 が取着された絶縁基
体1 は更にその上面に蓋体2 が樹脂製封止材を介して取
着され、蓋体2 で絶縁基体1 の凹部1aを塞ぎ、絶縁基体
1 と蓋体2 とから成る容器4 の内部を気密に封止するこ
とによって容器4 内部に半導体素子3 が気密に収容され
る。
The insulating base 1 to which the external lead terminals 5 are attached has a lid 2 attached to the upper surface of the insulating base 1 via a resin sealing material, and the lid 2 closes the recess 1a of the insulating base 1. Insulating substrate
The semiconductor element 3 is housed in the container 4 by hermetically sealing the inside of the container 4 composed of 1 and the lid 2.

【0022】前記蓋体2 はガラス、セラミック、金属、
樹脂等の板材から成り、エポキシ樹脂等の樹脂製封止材
によって絶縁基体1 上に接合取着される。
The lid 2 is made of glass, ceramic, metal,
It is made of a plate material such as a resin and is bonded and attached onto the insulating base 1 by a resin sealing material such as an epoxy resin.

【0023】かくして本発明の半導体素子収納用パッケ
ージによれば絶縁基体1 の凹部1a底面に半導体素子3 を
樹脂製接着剤を介して接着固定するとともに半導体素子
3 の各電極を外部リード端子5 にボンディングワイヤ6
を介して電気的に接続し、しかる後、絶縁基体1 の上面
に蓋体2 を樹脂製封止材を介して接合させ、絶縁基体1
と蓋体2 とから成る容器4 内部に半導体素子3 を気密に
収容することによって最終製品としての半導体装置とな
る。
Thus, according to the semiconductor element housing package of the present invention, the semiconductor element 3 is adhered and fixed to the bottom surface of the concave portion 1a of the insulating substrate 1 through the resin adhesive and the semiconductor element
Bond each electrode of 3 to the external lead terminal 5 with a bonding wire 6
Electrically, and then the lid 2 is bonded to the upper surface of the insulating base 1 via a resin sealing material.
A semiconductor device as a final product is obtained by hermetically housing the semiconductor element 3 in a container 4 composed of a cover 2 and a lid 2.

【0024】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば収容する半導体素子が固
体撮像素子であり、蓋体がガラス等の透明部材から成る
半導体素子収納用パッケージにも適用し得る。この場
合、容器内部への水分等の入り込むのが殆どないことか
ら蓋体に結露によるくもりが発生することはなく、固体
撮像素子に正確な光電変換を起こさせることが可能とな
る。
The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention. For example, the semiconductor element to be housed is a solid-state image pickup element. It can also be applied to a package for housing a semiconductor element in which the lid body is made of a transparent member such as glass. In this case, since water or the like hardly enters the inside of the container, clouding due to dew condensation does not occur on the lid body, and it is possible to cause the solid-state imaging device to perform accurate photoelectric conversion.

【0025】[0025]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば絶縁基体中に吸湿材を埋入させたことから絶縁基
体を通して絶縁基体と蓋体とから成る容器内部に大気中
に含まれる水分が入り込もうとしてもその入り込みは吸
湿材で阻止され、その結果、容器内部に収容した半導体
素子の電極及び半導体素子の各電極と外部リード端子と
を電気的に接続するボンディングワイヤに酸化腐食が発
生することは殆ど無く、半導体素子を長期間にわたり正
常、且つ安定に作動させることが可能となる。
According to the package for housing a semiconductor element of the present invention, since the moisture absorbent is embedded in the insulating substrate, the moisture contained in the atmosphere is passed through the insulating substrate into the container formed of the insulating substrate and the lid. Even if it tries to enter, the entry is blocked by the hygroscopic material, and as a result, oxidation corrosion occurs in the electrodes of the semiconductor element housed inside the container and the bonding wires that electrically connect each electrode of the semiconductor element and the external lead terminals. In most cases, the semiconductor element can be operated normally and stably for a long period of time.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体素子収納用パッケージの一実施
例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a semiconductor element housing package of the present invention.

【符号の説明】[Explanation of symbols]

1・・・・絶縁基体 2・・・・蓋体 3・・・・半導体素子 4・・・・容器 5・・・・外部リード端子 1 ... Insulating substrate 2 ... Lid 3 ... Semiconductor element 4 ... Container 5 ... External lead terminal

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】樹脂から成り、半導体素子を収容するため
の凹部を有する絶縁基体と、前記絶縁基体の凹部を塞ぐ
蓋体とから成る半導体素子収納用パッケージであって、
前記樹脂から成る絶縁基体中に吸湿材が埋入されている
ことを特徴とする半導体素子収納用パッケージ。
1. A package for storing a semiconductor element, comprising an insulating base made of resin and having a recess for housing a semiconductor element, and a lid for closing the recess of the insulating base.
A package for housing a semiconductor element, wherein a hygroscopic material is embedded in an insulating base made of the resin.
【請求項2】前記吸湿材が樹脂から成る絶縁基体に0.
1乃至50重量%埋入されていることを特徴とする請求
項1に記載の半導体素子収納用パッケージ。
2. The insulating substrate made of a resin, wherein the moisture absorbing material is 0.
The package for accommodating a semiconductor element according to claim 1, wherein the package is embedded in an amount of 1 to 50% by weight.
【請求項3】前記吸湿材がシリカゲル、ゼオライトもし
くはポリアクリル酸塩系の高吸水性ポリマーから成るこ
とを特徴とする請求項1に記載の半導体素子収納用パッ
ケージ。
3. The package for housing a semiconductor element according to claim 1, wherein the moisture absorbent is made of silica gel, zeolite, or a polyacrylate-based highly water-absorbing polymer.
JP5019959A 1993-02-08 1993-02-08 Package for storing semiconductor elements Expired - Lifetime JP2750254B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5019959A JP2750254B2 (en) 1993-02-08 1993-02-08 Package for storing semiconductor elements

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5019959A JP2750254B2 (en) 1993-02-08 1993-02-08 Package for storing semiconductor elements

Publications (2)

Publication Number Publication Date
JPH06232292A true JPH06232292A (en) 1994-08-19
JP2750254B2 JP2750254B2 (en) 1998-05-13

Family

ID=12013741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5019959A Expired - Lifetime JP2750254B2 (en) 1993-02-08 1993-02-08 Package for storing semiconductor elements

Country Status (1)

Country Link
JP (1) JP2750254B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07126494A (en) * 1993-11-02 1995-05-16 Mitsui Petrochem Ind Ltd Epoxy resin composition, jointing member for airtight sealing coated therewith as adhesive, package for semiconductor device molded therefrom, and semiconductor device using them
JP2004363511A (en) * 2003-06-09 2004-12-24 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2011151412A (en) * 2011-04-04 2011-08-04 Panasonic Corp Semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4614214B2 (en) 1999-12-02 2011-01-19 信越化学工業株式会社 Hollow package for semiconductor device elements

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375860A (en) * 1976-12-17 1978-07-05 Hitachi Ltd Electronic parts having glass sealed package
JPS596842U (en) * 1982-07-06 1984-01-17 日本電気株式会社 Cap for resin sealing
JPH02201960A (en) * 1989-01-31 1990-08-10 Fuji Photo Film Co Ltd Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5375860A (en) * 1976-12-17 1978-07-05 Hitachi Ltd Electronic parts having glass sealed package
JPS596842U (en) * 1982-07-06 1984-01-17 日本電気株式会社 Cap for resin sealing
JPH02201960A (en) * 1989-01-31 1990-08-10 Fuji Photo Film Co Ltd Semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07126494A (en) * 1993-11-02 1995-05-16 Mitsui Petrochem Ind Ltd Epoxy resin composition, jointing member for airtight sealing coated therewith as adhesive, package for semiconductor device molded therefrom, and semiconductor device using them
JP2004363511A (en) * 2003-06-09 2004-12-24 Matsushita Electric Ind Co Ltd Semiconductor device and its manufacturing method
JP2011151412A (en) * 2011-04-04 2011-08-04 Panasonic Corp Semiconductor device

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