JPH06232068A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To create a highly efficient impurity concentration region at a low temperature by maintaining a semiconductor layer formed on a substrate in plasma atmosphere of impurity gas containing group III elements of group V elements and then applying energy beams to the semiconductor layer. CONSTITUTION:A substrate 501 is set to a substrate holder 502 so that the exposed part of an island-shaped silicon film is exposed to plasma atmosphere. Then, an impurity gas containing group III elements or group V elements, for example, a gas containing PH3, is introduced from a chamber 503 by an evacuation system 505, the pressure within the chamber is adjusted to be approximately 100Pa, and an RF power of approximately 200W is applied to an electrode 507, thus generating a glow discharge plasma of PH3 gas. Then, one pulse of KvF excimer laser beam is applied to the substrate surface. Therefore, a silicon layer takes in P ion to become an impurity region and the electrical conductance becomes small.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device. More specifically, the present invention relates to a method of introducing impurities into a semiconductor layer using an energy beam, and is a technique applicable to an image display device, a semiconductor memory, a three-dimensional integrated circuit, and the like.

[0002]

2. Description of the Related Art In recent years, semiconductor devices, particularly thin film transistors (TFTs), have been actively developed for the purpose of application to image display devices such as flat displays. In order to support the increase in the size of the display and the monolithic driver in which the peripheral drive circuit is formed on the same substrate, TF
It is desired to improve the T operation speed. Attempts have been made to reduce the parasitic capacitance between the gate and drain in order to improve the operating speed of the TFT, but the method of forming the source / drain regions in a self-aligned manner with the gate electrode is an extremely effective method.

In order to form the source / drain regions in self-alignment with the gate electrode, an ion implantation method in which impurity ions are implanted into the semiconductor by some method after forming the semiconductor layer is indispensable. To date, various ion implantation methods have been devised and put into practical use, and typical examples thereof include an ion implantation method, a plasma doping method, a laser doping method and the like. Of these, the ion implantation method accelerates impurity ions by a high voltage and implants them into the semiconductor layer, so that the concentration and distribution of impurities can be controlled with high accuracy, and they have already been put to practical use in IC and LSI processes. The plasma doping method is a method of introducing impurities by exposing the substrate to glow discharge plasma of an impurity gas, and can be carried out by an apparatus similar to P-CVD, and is suitable for increasing the area. The laser doping method is a method of irradiating a semiconductor layer placed in an impurity gas with laser light to melt the surface of the semiconductor layer and immersing the impurity element adsorbed on the surface of the semiconductor layer without increasing the substrate temperature. Doping and activation can be done simultaneously.

A conventional method for manufacturing a coplanar structure TFT in which the source / drain regions are formed in a self-aligned manner with a gate electrode by an ion implantation method is shown in FIG. 4A using an n-channel polycrystalline silicon (p-Si) TFT as an example. ),
A description will be given with reference to (b) and (c).

First, as shown in FIG. 4A, a base coat insulating film 402 and an amorphous silicon (a-Si) layer are laminated on an insulating substrate 401, and the a-Si layer is formed into a predetermined shape. After patterning, the a-Si layer is crystallized by solid phase growth annealing, laser light irradiation, or the like.
-Si layer 403 is obtained. Next, as shown in FIG.
A gate insulating film 404 is formed on the p-Si layer 403, and a gate electrode 405 is further formed thereon. Here, the p-Si layer 403 is doped with impurity ions 406 by ion implantation using the gate electrode 405 as a mask, and heat treatment for activating the impurity ions is performed to form source / drain regions 403a and 403b. Further, the interlayer insulating film 4
07, a contact hole is formed on the source / drain regions, a source electrode 408 and a drain electrode 409 are formed thereon, and finally a passivation film 410 is formed so as to cover the entire surface of the substrate. The p-Si TFT shown in FIG. 4 (c) is completed.

As an example of the TFT in which the source / drain regions are formed in a self-aligned manner by the laser doping method, the gate insulating film 404 is etched using the gate electrode 405 as a mask to expose the surface of the semiconductor layer to be the source / drain regions. After that, as shown in FIG. 4 (b '), the semiconductor layer is maintained in the impurity gas atmosphere on the translucent substrate, and the laser beam 4 is applied from the rear surface to the substrate surface on which the semiconductor layer is formed.
11 irradiation method (JP-A-4-186633) and the like. According to this method, the crystallization of the semiconductor layer and the implantation and activation of impurities can be performed at the same time, and the process can be greatly simplified.

In the bottom gate type TFT having the inverted stagger structure, the gate insulating film and the gate electrode are formed under the semiconductor layer, so that the gate insulating film / semiconductor which is an interface more important for the transistor operation than the above-mentioned coplanar structure TFT. Although continuous formation between layers is easy, it is difficult to form source / drain regions in a self-aligned manner due to its structure. As a technique for forming source / drain regions in a self-aligned manner in a reverse staggered TFT, a method of forming a photoresist implantation mask by backside exposure using a gate electrode as a mask and performing ion implantation in a semiconductor layer (Japanese Patent Publication No. 3266
Although 1) and the like are known, the conventional method requires a complicated process such as the formation of the implantation mask by the backside exposure described above.

[0008]

The above-mentioned three examples of ion implantation methods have the following problems. In the ion implantation method, the impurities immediately after the ion implantation are not electrically active and require heat treatment at a high temperature close to 1000 ° C. for activation. However, in the case of using a glass substrate which can be easily made large in size and is inexpensive, it is necessary to set the heat treatment temperature to the substrate strain point temperature or lower throughout the entire process in order to prevent the substrate from being deformed. Therefore, when the TFT is manufactured on the glass substrate by the ion implantation method, the temperature is relatively low (60
Since the activation annealing after ion implantation is performed at about 0 ° C., there is a problem that the heat treatment at that time requires a very long time and the throughput is poor. Further, when performing ion implantation on a large-area substrate, it is necessary to scan the ion beam over a large area, which complicates the apparatus configuration and lowers the throughput.

The plasma doping method is inferior in doping efficiency to other ion implantation methods, and requires at least 30 minutes of treatment to obtain a sufficiently low resistance value. In addition, since activation annealing after doping is indispensable as in the ion implantation method, there are problems such as substrate deformation due to high temperature heat treatment and reduction in throughput due to long-term treatment.

In the laser doping method, since the molecular layer of the impurity gas adsorbed on the surface of the semiconductor layer is thermally decomposed and impurity atoms are taken into the semiconductor layer, it is difficult to control the impurity concentration, and the semiconductor surface in contact with the impurity gas is difficult to control. Efficient doping was possible only when direct irradiation was performed from the side. Therefore, in the method of irradiating the semiconductor layer on the translucent substrate with laser light from the back surface of the substrate as shown in the above-mentioned conventional example, the semiconductor surface in contact with the impurity gas is heated last and the impurities on the surface are As a result, the gas molecules are decomposed, and a short period of time is not required, resulting in an increase in the substrate temperature.

[0011]

The present invention has been made to solve all the above-mentioned problems in the conventional ion implantation method, and it is possible to form an impurity concentration region with high efficiency at low temperature. The present invention provides a method for manufacturing a semiconductor device.

More specifically, according to the present invention, the semiconductor layer formed on the substrate is maintained in a plasma atmosphere of an impurity gas containing a Group 3 element or a Group 5 element, and the semiconductor layer is irradiated with an energy beam. There is provided a method of manufacturing a semiconductor device, which comprises implanting impurity ions contained in the plasma atmosphere.

First, the method of the present invention can be used in general semiconductor devices, but it is particularly preferable to use it in a TFT for application to an image display element such as a flat display. Examples of such a TFT include a coplanar structure and an inverted stagger structure. Next, as a substrate that can be used, a known substrate can be used, but it is preferable to use a transparent substrate for use in the above applications. Further, as the transparent substrate, a substrate which is usually used and is made of glass, quartz or the like can be used.

When forming a coplanar TFT here, in order to prevent contamination from the substrate, an insulating film having a film thickness of 500 to 500 is formed on the transparent substrate by a known chemical vapor deposition method (CVD method), a sputtering method or the like. Stack with 2000Å. For this insulating film, SiO, SiN, SiON or the like can be used.

Next, a semiconductor film made of an amorphous silicon (a-Si) film is laminated on the entire surface of the substrate by a CVD method or the like so as to have a film thickness of 100 to 1500 Å. The raw material gas used at this time is silane (Si
H ₄ ) -based gas can be used, and the substrate is 450 to 600
It is preferred to heat to ° C.

Then, the a-Si film is etched to form an island pattern formed in the source region, the drain region and the active region in the following steps. After that, annealing treatment is performed in an inert atmosphere such as nitrogen or argon to crystallize the a-Si film to form a p-Si film. The annealing conditions are preferably a substrate temperature of 550 to 650 ° C. and 4 to 40 hours. Further, in the case where the energy beam is irradiated from the back surface of the substrate in the following steps, the irradiation can crystallize the a-Si film to form a p-Si film, and thus this step is not always necessary.

Next, CVD is performed so as to cover the island pattern.
Method, sputtering method, thermal oxidation method, etc., a gate insulating film made of SiO, SiN, or the like is laminated to a film thickness of 100 to 1500 Å.
Furthermore, Ta, Al, Cr,
A metal thin film made of Ti or the like is laminated with a film thickness of 1000 to 5000Å. By etching the metal thin film, the gate electrode is formed into a predetermined shape. Next, the gate insulating film is etched using this gate electrode as a mask to expose the insulating film forming the source region and the drain region on both sides of the gate insulating film in the following steps.

Next, the exposed insulating film is doped with impurity ions to form a source region and a drain region. As a doping method used in the present invention, a method of irradiating the substrate with an energy beam in a glow discharge plasma atmosphere of an impurity gas is used. The doping method of the present invention will be described below. The substrate is placed in a plasma generator, and the inside of the device is depressurized to about 10 mPa or less. Next, the impurity gas is introduced into the apparatus, and the introduction amount of the impurity gas is determined so that the pressure in the apparatus becomes 40 to 200 Pa. The impurity gas used here is phosphine (PH
₃ ), a gas containing arsine (AsH ₃ ) and the like,
When forming a p-type TFT, a gas containing diborane (B ₂ H ₆ ) or the like can be used. Next, 50 to 50
A glow discharge plasma of an impurity gas is generated by applying RF power of 0 W, and the front surface or the back surface of the substrate is irradiated with an energy beam. As an energy beam that can be used, an excimer laser, a CW oscillation argon laser, an electron beam, infrared rays, or the like can be used.
It is preferable to use an excimer laser with a wavelength of 24
Most preferably, 8 nm KrF excimer laser light and 308 nm wavelength XeCl excimer laser light are used. For example, when using KrF excimer laser light having a wavelength of 248 nm, the irradiation energy density is 130 to 300.
Irradiation is preferably performed at mJ / cm ² and irradiation time of 50 to 150 nsec. When using XeCl excimer laser light with a wavelength of 308 nm, the irradiation energy density is 150
It is preferable to irradiate with irradiation of ˜300 mJ / cm ² and irradiation time of 50 to 150 nsec.

In the above operation, when the energy beam is irradiated from the surface of the substrate, the p-Si film in the region not covered by the gate electrode is in a molten or semi-molten state and the impurity ions contained in the plasma Are taken into the film to form a source region or a drain region. However, the p-Si film covered with the gate electrode is not heated by the gate electrode due to the shielding effect, and is not doped with plasma so that it remains as an active region without being doped.

When the energy beam is irradiated from the back surface of the substrate, the a-Si film is melted or semi-molten and crystallized to be a p-Si film. At this time, the impurity ions contained in plasma are removed from the film. A source region or a drain region is formed by taking it in. However, since the p-Si film covered with the gate electrode is not in contact with plasma, it is not doped and remains as an active region.

Next, an interlayer insulating film made of SiO 2 or the like having a film thickness of 2000 to 7,000 Å is CV so as to cover the entire surface of the substrate.
The layers are laminated by the D method or the like. Further, in order to connect the source region and the drain region to the electrode, a part of the interlayer insulating film is removed to form a contact hole. Ta, A on top of this
A source electrode and a drain electrode are formed by laminating a metal thin film made of 1, Cr, ITO, Mo, Ti or the like with a film thickness of 1000 to 5000 Å by a sputtering method or the like and etching. Here, in the pixel switching element portion of the thin film transistor, it is preferable that the drain electrode be a pixel electrode by laminating a transparent conductive film made of ITO or the like.

Then, an insulating film made of SiN or the like is deposited on the substrate by the CVD method or the like, and is etched and patterned into a predetermined shape to complete the coplanar structure TFT of the present invention. Here, the insulating film acts as a passivation film for preventing contamination from the external environment.

When forming an inverted stagger structure TFT,
A film thickness of 1000 to 40 is formed on a transparent substrate by a sputtering method or the like.
A metal thin film having a thickness of 00Å is laminated and etched to be patterned into a predetermined shape to form a gate electrode. Next, an insulating film made of SiN or the like is laminated so as to cover the gate electrode, and a semiconductor film made of a-Si is further laminated thereon with a film thickness of 100 to 1500 Å. Next, a-Si
By etching the film, an island-shaped pattern to be a source region, a drain region, and an active region later is formed. In order to crystallize this a-Si film into a p-Si film, annealing treatment, laser treatment, etc. are performed. Irradiation with an excimer laser, which is a pulse laser,
This is preferable because the heating time can be shortened and the influence on the base is small. Known excimer lasers can be used, but the KrF excimer laser is most preferably used.

Next, as in the case of the coplanar structure TFT, by irradiating the energy beam from the back surface of the substrate under glow discharge plasma, the region irradiated with the energy beam is melted or semi-molten, and the region is exposed to the plasma atmosphere. The impurity ions contained in the p-Si film are taken into the p-Si film, and the source region and the drain region are formed in self-alignment with the gate electrode. At this time, the p-Si film on the gate electrode is not irradiated with the energy beam due to the shielding effect of the gate electrode, and thus is not heated and is not doped with the impurity ions. Further, as the irradiation conditions, the same conditions as in the above coplanar TET can be applied. Next, a metal thin film having a thickness of 1000 to 5000 is sputtered thereon.
The metal thin film is laminated by Å, and the metal thin film is patterned into a desired shape by etching to form a source electrode and a drain electrode. As a material that can be used for the electrode, the same material as the above coplanar TET can be used.

An insulating film made of SiN or the like having a film thickness of 1000 to 3000 Å is laminated on this substrate by the CVD method,
By forming a passivation film by patterning into a predetermined shape, the inverted stagger structure TET of the present invention can be manufactured.

In some cases, the coplanar structure TF is used.
In both the T and inverted staggered structure TFTs, tongues existing in the crystal grain boundaries in the p-Si film are treated with hydrogen plasma in order to improve the field effect mobility of the TFTs and reduce the threshold voltage. It is also possible to terminate the ring bond.

In addition to the active matrix type substrate for the liquid crystal display element, such a semiconductor device of the present invention includes a contact type image sensor, a driver built-in thermal head,
It is also possible to use it in a driver-incorporated optical writing element, a display element, a three-dimensional IC, or the like, which uses an organic EL element or the like as a light emitting element. When used in such an element, high performance can be realized by increasing the speed and resolution of the element.

[0028]

Next, the function of the present invention will be described. When the substrate is exposed to glow discharge plasma of a gas that contains impurities that are to be introduced into the semiconductor layer as constituent elements and is irradiated with an energy beam of such intensity that the semiconductor layer is in a molten or semi-molten state, it is adsorbed on the surface of the semiconductor layer. Not only the impurity element that has been used, but also the impurity ions in the gas phase excited by the plasma discharge are taken into the semiconductor layer and simultaneously activated to form a low resistance region. Further, by using a laser beam having a wavelength in the transmission region for a glass or quartz substrate as an energy beam, irradiation through the substrate becomes possible, and only the semiconductor layer can be selectively heated and melted. Also, because the laser irradiation is performed in the plasma atmosphere,
Compared with the conventional laser doping method, a sufficiently low resistance region can be formed by laser irradiation for a short time, and the thermal influence on the underlayer does not pose a problem.

Inverted stagger structure T formed on a transparent substrate
In the FT structure, the semiconductor layer other than the gate electrode is heated only by keeping it in the plasma atmosphere of the impurity gas and irradiating the back surface of the substrate with the energy beam.
The source / drain regions can be formed in a self-aligned manner with the gate electrode by melting and immersing impurity ions from the surface of the semiconductor layer and from the vapor phase. The processing time at this time is extremely short, and the implantation of impurity ions into the channel region by plasma doping causes almost no problem. According to the present invention, the complicated steps such as the implantation mask formation and the back surface exposure, which are required for the conventional self-aligned TFT having the inverted stagger structure, are completely eliminated.

In manufacturing a coplanar structure TFT formed on a translucent substrate, after forming the gate electrode, the gate insulating film is etched using the gate electrode as a mask, and the semiconductor layer is held in a plasma atmosphere of an impurity gas. By irradiating the surface of the substrate on which the semiconductor layer is formed with an energy beam from the back surface, the entire semiconductor layer is melted / solidified and crystallized, and at the same time, the semiconductor layer exposed to the impurity gas plasma is the semiconductor layer. The source / drain regions can be formed in self-alignment with the gate electrode by immersing impurity ions from the surface and the gas phase. According to the present invention, a low resistance region can be formed at a lower temperature and a process temperature can be lowered by using a conventional ion implantation method, while crystallization and source / drain region formation can be performed simultaneously, and a manufacturing process can be simplified. Moreover, compared with the conventional manufacturing method using the laser doping method, a relatively weak laser power such that the semiconductor layer surface is in a semi-molten state is sufficient because impurity ions are taken in not only from the semiconductor surface but also from the plasma vapor phase. An impurity region having a high concentration can be formed, and as a result, thermal damage to the substrate can be prevented and the surface of the semiconductor layer can be planarized.

[0031]

【Example】

Example 1 Hereinafter, the present invention will be described based on examples. Figure 1
1A to 1C show an embodiment of a method of manufacturing an n-channel type polycrystalline (p-Si) thin film transistor according to the present invention in the order of steps, and FIGS.
It is formed according to the order of (c). FIG. 1C shows the completed state.

FIG. 5 is an example of a block diagram showing a main configuration of an apparatus for performing laser irradiation in an impurity gas plasma atmosphere used in this embodiment. This apparatus comprises a chamber 503 having a quartz window 504, a vacuum exhaust system 505 for the chamber, a gas supply system 506 for supplying an impurity gas to the chamber, an electrode 507 for generating glow discharge plasma in the impurity gas, and RF power source 508 and laser system 509 for projecting laser light into the chamber
Comprises and. An xy stage and a substrate holder 502 installed therein are built in the chamber 503. The laser system 509 includes a laser oscillator 509a that generates an excimer laser beam and a mirror 509b.
And a beam homogenizing mechanism 509c.

In this embodiment, as shown in FIG. 1 (a), plasma-enhanced chemical vapor deposition (PECVD) is first performed on a transparent glass substrate 101 which has been cleaned in advance.
Method) at a substrate temperature of about 300 ° C and a film thickness of 1000Å
An insulating film 102 of silicon oxide SiO ₂ is formed. The oxide film 102 can prevent contamination from the glass substrate 101.

Next, low pressure chemical vapor deposition (LPCVD)
Method) using a silane (SiH ₄ ) gas as a material gas so as to cover the insulating film 102 over the entire surface, and the substrate temperature is 55
An amorphous silicon (a-Si) film having a film thickness of about 1000 Å is deposited at about 0 ° C., and an island pattern 103 to be a source region, a drain region and an active region of a thin film transistor described later is formed by etching. To do. Then, in a nitrogen atmosphere, the substrate temperature is 600 ° C.
After performing solid phase growth annealing for about an hour, the island-shaped aS
The i film 103 is crystallized.

Next, as shown in FIG. 1B, SiO _{2 is formed} at a substrate temperature of about 350 ° C. so as to cover the island-shaped silicon film 103 by atmospheric pressure chemical vapor deposition (APCVD).
The gate insulating film 104 is formed by 1000Å. Next, a metal thin film made of Al is formed on the insulating film 1 by a sputtering method.
About 2000Å is formed so as to cover 04. Subsequently, the metal thin film is patterned into a predetermined shape by etching to form a gate electrode 105, and then the gate electrode 1 is formed.
The gate insulating film 104 is etched using 05 as a mask to form a shape similar to that of the gate electrode. Here, only the portions to be the source / drain regions are exposed after the silicon film 103.

Next, the substrate holder 50 of the apparatus shown in FIG.
2, the substrate is set so that the exposed portion of the island-shaped silicon film is exposed to the plasma atmosphere, and the vacuum exhaust system 505
Then, a gas containing at least PH ₃ is introduced from the chamber 503, the pressure inside the chamber is adjusted to about 100 Pa, and RF power of about 200 W is applied to the electrode 507 to generate glow discharge plasma of PH ₃ gas. Thereafter, KrF excimer laser light 106 having a wavelength of 248 nm is applied to the surface of the substrate at an energy density of 180 mJ / cm.
Irradiate 1 pulse with ² . The state at this time is shown in FIG.

By the above operation, the silicon layer in the region exposed to the plasma atmosphere is melted or semi-molten, and the P ions contained in the plasma are taken into the film to be the impurity-doped region, that is, the source / drain region 1.
03a and 103b. The active region 103c below the gate insulating film 104 is not heated due to the shielding effect of the gate electrode 105 and is not doped because it is not in contact with PH ₃ plasma. Source formed by the above method
The conductivity of the drain region has a small value of about 1 × 10 ³ S / cm.

Next, as shown in FIG. 1C, a SiO ₂ film 107 is formed as an interlayer insulating film so as to cover the gate electrode 105 by an APCVD method, for example, at a substrate temperature of 300 ° C.
About 4000 Å is formed. Then, after removing a predetermined portion of the interlayer insulating film 107 and forming contact holes so as to reach the source region 103a and the drain region 103b, Al is deposited on the interlayer insulating film by a sputtering method, and this aluminum film is formed. Is etched and patterned into a predetermined shape, and the source electrode 10 is connected to the source region.
8 and the drain electrode 109 communicating with the drain region are formed. In the thin film transistor which serves as the pixel portion switching element, the drain electrode 109 is formed of a transparent conductive film such as I
It is formed of a TO film to serve as a pixel electrode.

Next, the silicon nitride film 11 is formed by the PECVD method.
0 is deposited and the nitride film is etched and patterned into a predetermined shape. The insulating film 110 is a passivation film that prevents contamination from the external environment. Through the above steps, the target p-Si TFT is completed. In some cases, hydrogen plasma treatment or the like is performed for the purpose of terminating dangling bonds existing at grain boundaries in p-Si in order to improve the field effect mobility of the TFT and reduce the threshold voltage. May be.

Embodiment 2 FIGS. 2 (a) to 2 (d) show one embodiment of a method of manufacturing an n-channel p-Si thin film transistor using the present invention in the order of steps. Figure 2 (d) from a)
It is formed according to the order of. Further, FIG. 2D shows the completed state.

FIG. 6 is an example of a block diagram showing a main configuration of an apparatus for performing laser irradiation in an impurity gas plasma atmosphere according to the present invention used in this embodiment. This apparatus comprises a chamber 603 having a window 604 made of quartz, a vacuum exhaust system 605 therefor, a gas supply system 606 for supplying an impurity gas to the chamber, an electrode 607 for generating glow discharge plasma in the impurity gas, and It comprises an RF power supply 608 and a laser system 609 for projecting laser light into the chamber. The surface of the electrode 607 is a shower plate, and the impurity gas is supplied from the gas supply system 606 through the shower plate. An xy stage and a substrate holder 602 installed therein are built in the chamber 603. Laser system 6
Reference numeral 09 denotes a laser oscillator 609a that generates an excimer laser beam, a mirror 609b, and a beam uniformizing mechanism 609c. Laser irradiation from the backside of the substrate surface exposed to the impurity gas plasma atmosphere is performed. The structure is possible.

As shown in FIG. 2A, first, a metal thin film made of Ta is formed on the transparent glass substrate 201 which has been cleaned in advance to a thickness of about 2000 Å by a sputtering method. Next, the metal thin film is patterned into a predetermined shape by etching to form a gate electrode 202.

Next, as shown in FIG. 2B, PECVD is performed.
A silicon nitride (SiNx) film 203 with a substrate temperature of 350 ° C. and a film thickness of about 3000 Å so as to cover the gate electrode 202 by the PECVD method, and the substrate temperature is continuously increased by the PECVD method without breaking the vacuum. At 300 ° C., an a-Si film having a film thickness of about 300 Å is continuously formed. Next, by etching, an island-shaped pattern 204 to be a source region, a drain region, and an active region of a thin film transistor described later is formed. Then, a KrF excimer laser beam 2 having a wavelength of 248 nm is applied to the island-shaped a-Si film 204 from the surface of the substrate.
05 is irradiated in multiple steps with a maximum laser energy of 200 mJ / cm ² to crystallize it to form a p-Si film. still,
The excimer laser is a pulse laser, and has a short heating time, so that it has almost no thermal influence on the base.

Next, the substrate holder 60 is added to the apparatus shown in FIG.
2, the substrate is set with the surface of the p-Si film facing the electrode 607 so that the surface of the island-shaped p-Si film is exposed to the impurity gas plasma atmosphere, and the chamber 603 is evacuated by the vacuum exhaust system 605. Until the pressure reaches about 1 mPa. After that, the gas is introduced from the impurity gas supply system 606 through a shower plate on the surface of the gas electrode 607 containing at least PH _3, and the pressure inside the chamber is adjusted to about 100 Pa, and an RF of about 200 W is applied to the electrode 607.
Power is applied to generate glow discharge plasma of PH ₃ gas. After that, Xe with a wavelength of 308 nm from the back surface of the substrate
Cl excimer laser light 205 with energy density 200
Irradiate 1 pulse at mJ / cm ² . The state at this time is shown in FIG.

By the above scanning, only the portions to be the source / drain regions are melted or semi-molten, the P ions contained in the plasma atmosphere are taken into the p-Si film, and the impurity-doped regions, that is, the source / drain regions 204a. And 204b are formed in self-alignment with the gate electrode 202 and have a conductivity of 2 × 10 ³ S / cm.
It will be about. At this time, the active region 204c of the thin film transistor is not heated due to the shielding effect of the gate electrode 202. At this time, it is sufficient that the plasma generation time is about several seconds in consideration of stabilization, and introduction of impurity ions into the active region 204c by plasma doping does not pose any problem.

Next, as shown in FIG. 2D, a metal thin film made of Al is formed by sputtering so as to cover the island-shaped p-Si film, and the metal thin film is etched to a predetermined thickness. The source electrode 206 and the drain electrode 207 are formed by patterning into a shape. When the present TFT is used as a pixel part switching element of an active matrix substrate for liquid crystal display or the like, the drain electrode 207 is formed of a transparent conductive film, for example, an ITO film to serve as a pixel electrode.

Next, the silicon nitride film 20 is formed by the PECVD method.
8 is deposited and the nitride film is etched and patterned into a predetermined shape. The insulating film 208 is a passivation film that prevents contamination from the external environment. Through the above steps, the target thin film transistor is completed. In some cases, as in the first embodiment, p−− is used to improve the field effect mobility of the TFT and to reduce the threshold voltage.
For example, hydrogen plasma treatment may be performed for the purpose of terminating dangling bonds where crystal grain boundaries in Si exist.

Example 3 FIGS. 3 (a) to 3 (c) show one example of a method of manufacturing an n-channel p-Si thin film transistor using the present invention in the order of steps. ) To FIG. 3C in this order. FIG. 3C shows the completed state.

In this embodiment, as shown in FIG. 3A, a transparent glass substrate 30 which has been previously washed is first prepared.
1 and the insulating film 3 of silicon oxide SiO ₂ having a film thickness of 1000 Å at a substrate temperature of about 300 ° C. by PECVD method.
02 is formed. The oxide film 302 can prevent contamination from the glass substrate 301.

Next, low pressure chemical vapor deposition (LPCVD)
Method) so as to cover the insulating film 302 on the entire surface,
An island to be a source region and an active region of a thin film transistor described later is formed by depositing an a-Si film with a substrate temperature of about 500 ° C. and a film thickness of about 1000 Å using disilane (Si ₂ H ₆ ) gas as a material gas. Pattern 303
To form.

Next, as shown in FIG. 3B, PECV
So as to cover the island-shaped a-Si film 303 by the D method,
Gate insulating film 3 made of SiO ₂ at a substrate temperature of about 350 ° C.
Form 04 of 1000Å. Next, by sputtering, Al
The metal thin film made of the above-mentioned insulating film 304 with a film thickness of 2000Å
Is formed so as to cover. Subsequently, the metal thin film is patterned into a predetermined shape by etching to form the gate electrode 30.
After forming 5, the gate insulating film 304 is etched using the gate electrode 305 as a mask to form the same shape as the gate electrode.

Next, using an apparatus as shown in FIG.
In the same manner as in the above, the island-shaped a-Si film is held in a glow discharge plasma atmosphere of a gas containing PH _3, and XeCl excimer laser light 306 having a wavelength of 308 nm is applied to the back surface of the substrate at an energy density of 200 mJ / Irradiate 1 pulse at cm ² . As a result, the entire a-Si film 303 becomes in a molten or semi-molten state and crystallizes in the solidification process to become a p-Si film. At this time, the silicon layer in the region exposed to the plasma atmosphere takes in P ions contained in the plasma into the film and becomes impurity-doped regions, that is, source / drain regions 303a and 303b.
The active region 303c under the gate insulating film 304 is not doped because it is not in contact with PH ₃ plasma.

Next, as shown in FIG. 3C, an SiO ₂ film 307 is formed as an interlayer insulating film so as to cover the gate electrode 305 by a PECVD method at a substrate temperature of about 300 ° C. for 4000 Å. Then, the interlayer insulating film 30
After removing a predetermined portion of 7 to form a contact hole reaching the source region 303a and the drain region 303b, Al is deposited on the interlayer insulating film by a sputtering method, and the aluminum film is etched to a predetermined shape. Source electrode 308 which is patterned into
And a drain electrode 309 communicating with the drain region is formed. In the thin film transistor serving as the pixel switching element, the drain electrode 309 is formed of the transparent conductive film ITO film to serve as the pixel electrode.

Next, a silicon nitride film 310 is formed by plasma CVD, and the nitride film is etched and patterned into a predetermined shape. The insulating film 310 is a passivation film that prevents contamination from the external environment.
Through the above steps, the target p-Si TFT is completed.

In some cases, the TF may be the same as in the first embodiment.
In order to improve the field-effect mobility of T and reduce the threshold voltage, hydrogen plasma treatment or the like may be performed for the purpose of terminating dangling bonds existing in crystal grain boundaries in p-Si.

Although the third embodiment according to the present invention has been specifically described above, the present invention is not limited to the above-mentioned embodiments, and various modifications based on the technical idea of the present invention are possible. is there.

[0057]

As described above, according to the present invention, the low resistance region of the semiconductor layer can be efficiently formed at a lower temperature as compared with the conventional ion implantation method, and the activation annealing is unnecessary. Processing time can be greatly reduced.
Further, in the TFT having the inverted stagger structure, the source / drain regions can be formed in a self-aligned manner without going through a complicated process such as formation of an implantation mask, and in the TFT having the coplanar structure, crystallization can be performed at the same time when the source / drain regions are formed. As a result, an inexpensive self-aligned T-type glass substrate with a high operating speed is formed.
Since FT can be manufactured by a simple manufacturing process, for example, cost reduction in an active matrix substrate for liquid crystal display,
Larger area and driver monolithic are possible.

Further, the present invention can be widely applied not only to the thin film transistor but also to all semiconductor processes using the ion implantation method, and its effect is extremely large.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

FIG. 2 is a schematic cross-sectional view for explaining the method of manufacturing the semiconductor device according to the embodiment of the present invention in the order of steps.

FIG. 3 is a schematic cross-sectional view for explaining the method of manufacturing the semiconductor device according to the embodiment of the present invention in the order of steps.

FIG. 4 is a schematic cross-sectional view for explaining a manufacturing process of a conventional semiconductor device corresponding to the present invention.

FIG. 5 is an example of a block diagram showing a main configuration of a semiconductor manufacturing apparatus.

FIG. 6 is an example of a block diagram showing a main configuration of a semiconductor manufacturing apparatus.

[Explanation of symbols]

101, 201, 301, 401 Glass substrate 103a, 204a, 303a, 403a Source region 103b, 204b, 303b, 403b Drain region 103c, 204c, 303c, 403c Active region 104, 203, 304, 404 Gate insulating film 105, 202, 305 405 Gate electrode 106, 205, 306, 411 Laser light 108, 206 308, 408 Source electrode 109, 207, 309, 409 Drain electrode

Front page continuation (72) Inventor Hirohisa Tanaka 22-22 Nagaikecho, Abeno-ku, Osaka-shi, Osaka

Claims (7)

[Claims] 1. A semiconductor layer formed on a substrate is maintained in a plasma atmosphere of an impurity gas containing a Group 3 element or a Group 5 element, and the semiconductor layer is irradiated with an energy beam to be included in the plasma atmosphere. A method for manufacturing a semiconductor device, which comprises implanting impurity ions. 2. A first step of forming an electrode on a transparent substrate, a second step of depositing an insulating film on the transparent substrate and the electrode, and a step of depositing an insulating film on the insulating film. A third step of forming a semiconductor layer on the substrate, the substrate on which the semiconductor layer is formed is maintained in a plasma atmosphere of an impurity gas containing a Group 3 element or a Group 5 element, and a back surface is formed on the substrate surface on which the semiconductor layer is formed. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising a fourth step of irradiating an energy beam with the electrode as a mask and implanting impurity ions contained in the plasma atmosphere into the semiconductor layer. 3. A first step of forming a semiconductor layer on a transparent substrate, a second step of forming an insulating film on the semiconductor layer, and a third step of partially removing the insulating film. Process of
The substrate on which the semiconductor layer is formed is maintained in a plasma atmosphere of an impurity gas containing a Group 3 element or a Group 5 element, and the surface of the substrate on which the semiconductor layer is formed is irradiated with an energy beam from the back surface to expose the impurity gas to the surface. The method of manufacturing a semiconductor device according to claim 1, further comprising a fourth step of implanting impurity ions contained in the plasma atmosphere into the semiconductor layer. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor layer is a semiconductor layer containing silicon. 5. The method for manufacturing a semiconductor device according to claim 1, wherein a plasma atmosphere of an impurity gas containing boron, which is a Group 3 element, as a constituent element is used during the energy beam irradiation. 6. The method of manufacturing a semiconductor device according to claim 1, wherein a plasma atmosphere of an impurity gas containing phosphorus or arsenic, which is a Group 5 element, as a constituent element is used during the energy beam irradiation. 7. The method of manufacturing a semiconductor device according to claim 1, wherein a laser beam is used as the energy beam.