JP3344072B2 - Method for manufacturing thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor manufacturing of
It relates to a manufacturing method .

[0002]

2. Description of the Related Art In recent years, polycrystalline silicon (hereinafter referred to as poly-
A thin film transistor using the film, so-called p
Poly-Si TFTs (Thin Film Transistors) are used as active circuit elements in LCDs, SRAMs, and the like.
In particular, there are various reports on a method of forming a TFT using a poly-Si film subjected to a laser crystallization process as an active layer.

[0003] In a method using a laser crystallization process, a TFT can be formed on a low-cost glass substrate by a low-temperature process. In the method of crystallizing an amorphous silicon layer using excimer laser light, crystal grains grow only to about 10 nm, and thus the number of crystal grain boundaries increases. Therefore, the dangling bond, which is a major defect existing in the crystal grain boundary, is replaced with hydrogen by hydrogenation to remove the dangling bond.

A conventional example will be described with reference to a manufacturing process diagram of FIG. As shown in (1) of FIG.
A gate 112 is provided on 1. Further, an anodic oxide layer 113, a protective film 114, and a gate insulating film 115 are sequentially formed on the glass substrate 111 so as to cover the gate 112.

First, chemical vapor deposition (hereinafter referred to as CVD)
An amorphous silicon film (116) containing an n-type impurity is formed on the gate insulating film 115 by a method. Next, the amorphous silicon film (116) is crystallized by a laser crystallization method using excimer laser light to generate a poly-Si film 117. Next, the above po
A silicon oxide film 118 is formed over the ly-Si film 117.

[0006] Thereafter, as shown in (2) of Figure 6, lithography and by etching, the silicon oxide film (118) is patterned, the upper silicon oxide film on the poly-Si film 117 of the gate 112 ( 1
18) An etching stop pattern 119 composed of 18) is formed.

[0007] Next, as shown in FIG.
The silicon film 120 containing the n-type impurity and the metal film 12 are covered with the etching stop pattern 119 by a method.
And 1.

Then, as shown in FIG. 6D, the metal film 12 is formed by lithography and etching.
1 and the silicon film 120, source / drain 122 and 123 are formed on both sides above the gate 112.

Next, the gate 11 is etched through the etching stop pattern 119 by plasma hydrogenation.
Hydrogen (not shown) is introduced into the interface of the poly-Si film 117 above the layer 2. Then, the dangling bonds are replaced with hydrogen and removed. As described above, the TFT
(Thin Film Transistor) 101 is formed.

[0010]

However, in the TFT formed by the above manufacturing method, hydrogen is supplied to the poly-Si film only through the etching stop pattern. Therefore, it is difficult to supply hydrogen to the entire poly-Si film, so that the resistance is increased. Further, it is necessary to perform the activation annealing for the source / drain regions at a high temperature. Further, since the electric field tends to concentrate near the drain, there is a large leak current.

An object of the present invention is to provide a thin film transistor having excellent carrier transfer characteristics and leakage current characteristics, and a method for manufacturing the same.

[0012]

According to the present invention, there is provided a method of manufacturing a thin film transistor for achieving the above object.

The thin film transistor has the following configuration. That is, a gate and an insulating film including a gate insulating film covering the gate are formed on a substrate having at least a surface having an insulating property. A polycrystalline silicon film that has been hydrogenated is formed on the base including the gate via an insulating film. Further, a silicon oxide film pattern is formed on the polycrystalline silicon film above the gate. And on the polycrystalline silicon film of two outer of the pattern, the amorphous silicon film containing hydrogen, conductivity type silicon film and the metal film is lower
From the source, the source /
A drain is formed. A liquid crystal display device includes the above-described thin film transistor.

In a method of manufacturing a thin film transistor, in a first step, an insulating film including at least a gate insulating film is formed so as to cover a gate on a substrate having an insulating surface.
A polycrystalline silicon film is formed on the upper surface side. In the second step, a silicon oxide film is formed on the polycrystalline silicon film and then patterned to form a silicon oxide film pattern above the gate. In a third step, an amorphous silicon film containing hydrogen, a conductive silicon film and a metal film are sequentially formed on the polycrystalline silicon film so as to cover the silicon oxide film pattern. In a fourth step, hydrogen in the amorphous silicon film is introduced into the polycrystalline silicon film by heat treatment to activate conductive impurities in the conductive silicon film. Then, in a fifth step, the metal film, the conductive silicon film and the amorphous silicon film are patterned to form a source / drain.

In a third step, after an amorphous silicon film is formed on the polycrystalline silicon film so as to cover the silicon oxide film pattern, hydrogen ions are implanted into the amorphous silicon film by ion doping. Then, after implanting conductive impurity ions into the surface layer, a metal film is formed. Also, instead of ion doping, plasma doping
Hydrogen ions may be introduced into the amorphous silicon film, and conductivity-type impurity ions may be introduced, and then a metal film may be formed.

[0016]

In the thin film transistor having the above structure, since the source / drain is formed of the amorphous silicon film, the conductive silicon film and the metal film, the amorphous silicon film is offset. Therefore, since the thin film transistor has an offset structure, the leakage current is reduced by the relaxation of the electric field near the drain. Further, since the hydrogenated polycrystalline silicon film is formed on the gate via the insulating film, the dangling bonds of the polycrystalline silicon film are replaced with hydrogen and removed. Therefore, carrier mobility in a channel region formed by the polycrystalline silicon film is increased. Also, the thin film transistor of the present invention is a conventional thin film transistor.
Since it solves the problem of transistor, the conventional thin
Like a film transistor, it can be used for a liquid crystal display.
Kill at.

In the method of manufacturing a thin film transistor, the amorphous silicon film containing hydrogen, the conductive silicon film, and the metal film are sequentially formed on the polycrystalline silicon film so as to cover the silicon oxide film pattern formed on the polycrystalline silicon film. Film,
Thereafter, hydrogen in the amorphous silicon film is diffused into the polycrystalline silicon film, so that the polycrystalline silicon film is hydrogenated over the entire region. Therefore, the source / drain resistance is reduced.

In the third step, after an amorphous silicon film is formed on the polycrystalline silicon film so as to cover the silicon oxide film pattern, hydrogen ions are introduced into the amorphous silicon film by ion doping. In the implantation method, a large amount of hydrogen ions can be contained in the amorphous silicon film. On the other hand, in a method of introducing conductive impurity ions into an amorphous silicon film by plasma doping,
It becomes easy to introduce conductive impurity ions into the surface layer of the amorphous silicon film. In the above method, since the conductive impurity ions are introduced into the amorphous silicon film together with the hydrogen ions, the conductive impurity ions are activated by low-temperature annealing at 400 ° C. or lower. Therefore, a low temperature process is realized. Further, since it is not necessary to form a conductive silicon film, a film forming step can be omitted.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the thin film transistor according to the present invention will be described with reference to the schematic sectional view of FIG.

As shown in the figure, a gate 12 is formed at least on a part of a substrate 11 having an insulating surface. The base 11 is made of, for example, a glass substrate.
The gate 12 is made of, for example, one metal of molybdenum (Mo), tantalum (Ta), chromium (Cr), copper (Cu), titanium (Ti), and aluminum (Al), or a plurality of these metals. It consists of the alloy formed by. For example, it is made of molybdenum tantalum (MoTa).

A plurality of insulating films 13 are formed on the base 11 so as to cover the gate 12. The plurality of insulating films 13 include an oxide film 14 formed by anodizing the surface layer of the gate 12, a silicon nitride film 15 that protects the substrate 11 and is formed to cover the same, and a film formed on the upper surface thereof. And a gate insulating film 16 made of silicon oxide. The oxide film 14 may be plasma-oxidized.

Further, a polycrystalline silicon film 17 is formed on the upper surface of the gate insulating film 16. The polycrystalline silicon film 17 is formed by, for example, polycrystallizing an amorphous silicon film by a laser crystallization method.

On the polycrystalline silicon film 17 above the gate 12, a silicon oxide film pattern 18 is formed. The silicon oxide film pattern 18 serves as an etching stop layer when forming a source / drain, which will be described later, and is formed of a material through which hydrogen ions pass.

An amorphous silicon (hereinafter referred to as a-Si: H) film 19 containing hydrogen and a conductive silicon film are formed on the polycrystalline silicon film 17 on both outer sides of the silicon oxide film pattern 18. Source / drain 22 and 23 are formed by laminating 20 and a metal film 21 in order from the bottom . Further, a passivation film 24 made of silicon nitride is formed so as to cover the source / drain 22 and 23 and the space therebetween.

As described above, the thin film transistor 1 is configured.

In the thin film transistor 1 having the above structure, the hydrogenated polycrystalline silicon film 17 is formed on the gate 12 via the insulating film 13, so that the dangling bonds existing at the interface of the polycrystalline silicon film 17 are It is replaced by hydrogen and removed. Therefore, the carrier mobility in the channel region increases. Source / drain 22,
23 is formed of the a-Si: H film 19, the conductivity type silicon film 20, and the metal film 21;
i: The H film 19 is offset. Therefore, since the thin film transistor 1 has an offset structure, the electric field in the vicinity of the source / drain 22 (or 23) acting as the drain is reduced, and the leak current is reduced. Ma
The thin film transistor 1 is a conventional thin film transistor.
This solves the problem of
Similarly to the case of a transistor, it can be used for a liquid crystal display device.

Next, a method of manufacturing the thin film transistor 1 will be described with reference to FIGS. 2 and 3 (1) and (2). In the figure, the same components as those described in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 2A, a gate 12 made of molybdenum tantalum (MoTa) is formed on, for example, a glass substrate as a substrate 11 having at least a surface having an insulating property. The gate 12 is formed of one kind of metal such as molybdenum (Mo), tantalum (Ta), chromium (Cr), copper (Cu), titanium (Ti), aluminum (Al) or an alloy of these metals. Is also possible. A plurality of insulating films 13 are formed so as to cover the gate 12. This plurality of insulating films 1
3 is formed of, for example, an oxide film 14 formed by anodizing the surface layer of the gate 12, a silicon nitride protective film 15 formed so as to cover it, and a silicon oxide gate insulating film 16 formed on the upper surface thereof. Have been.

Then, in the first step, an amorphous silicon film (31) is formed by a film forming technique represented by, for example, a chemical vapor deposition (hereinafter, referred to as CVD) method. Then, the amorphous silicon film (31) is formed by a laser crystallization method.
A laser crystallization process is performed by irradiating the amorphous silicon film (31) with the polycrystalline silicon film 17.
To be reformed.

Next, a second step shown in FIG. 2 (2) is performed. In this step, a silicon oxide film 32 is formed on the polycrystalline silicon film 17 by a film forming technique such as a CVD method, a vapor deposition method, and a sputtering method. Thereafter, the portion of the silicon oxide film 32 indicated by the two-dot chain line is removed by lithography and etching, and the silicon oxide film (32) remaining on the polycrystalline silicon film 17 above the gate 12 is used to form a silicon oxide film pattern 18 To form Here, the silicon oxide film pattern 18 is formed, but other materials may be used as long as the material allows the passage of hydrogen, for example.

Subsequently, a third step shown in FIG. 2C is performed. In this step, for example, a CVD method, here, 250 ° C.
The polycrystalline silicon film 1 is made to cover the silicon oxide film pattern 18 by the PECVD method at the following film forming temperature.
An amorphous silicon (hereinafter a-Si: H) film 19 containing hydrogen is formed on the substrate 7. Next, a conductive silicon film 20 is formed on the a-Si: H film 19 by a film forming technique such as a CVD method, an evaporation method, and a sputtering method. The conductive silicon film 20 is made of a silicon film containing an n-type or p-type impurity. Thereafter, the metal film 21 is formed on the conductive silicon film 20 by a film forming technique such as a CVD method, a vapor deposition method, and a sputtering method.
To form

Thereafter, a fourth step shown in FIG. 3D is performed. In this step, an a-Si: H film 1 is formed by heat treatment.
Hydrogen in 9 is diffused into polycrystalline silicon film 17 and the polycrystalline silicon film 17 is hydrogenated. At the same time, the conductive impurities in the conductive silicon film 20 are activated. The heat treatment is performed at a temperature of 400 ° C. or less. For example, 375 ° C
Heat treatment.

Then, a fifth step shown in FIG. In this step, the metal film 21, the conductive silicon film 20, and the a-S
The i / H film 19 is patterned to form a source / drain 2 comprising an a-Si: H film 19, a conductive silicon film 20 and a metal film 21 on both sides of the silicon oxide film pattern 18.
2 and 23 are formed. Further, the silicon oxide film pattern 18 and the source / drain 22 and 2 are formed by CVD.
A passivation film 24 is formed of silicon nitride so as to cover 3. As described above, the thin film transistor 1 is manufactured.

In the method of manufacturing the thin film transistor, the silicon oxide film pattern 18 is formed on the polycrystalline silicon film 17, and the a-Si: H film 19 is formed on the polycrystalline silicon film 17 so as to cover the silicon oxide film pattern 18. , A conductive silicon film 20 and a metal film 21 in this order,
Since hydrogen in the a-Si: H film 19 is diffused into the polycrystalline silicon film 17, the polycrystalline silicon film 17 is hydrogenated over the entire region. In general, it is known that hydrogen passes well through silicon oxide. Therefore, a-Si: H
The hydrogen in the film 19 passes through the silicon oxide film pattern 18. Therefore, hydrogen is also introduced into the portion of the polycrystalline silicon film 17 which is covered with the silicon oxide film pattern 18, so that the crystal grain boundaries in that portion are eliminated and the resistance is reduced.

The method of diffusing hydrogen into the polycrystalline silicon film 17 using an a-Si: H film is the same as the conventional method of diffusing hydrogen into a polycrystalline silicon film using a silicon nitride film containing hydrogen. Can be applied. That is, an a-Si: H film is used instead of a silicon nitride film containing hydrogen to diffuse hydrogen, and then the a-Si: H film is removed. Then, a silicon nitride film as a passivation film may be crystallized.

Next, the third step in the above manufacturing method can be performed as follows. This will be described with reference to the manufacturing process diagram of FIG. The same components as those described in FIGS. 1 to 3 are denoted by the same reference numerals and described.

As shown in FIG. 4A, the polycrystalline silicon film 17 is set so as to cover the silicon oxide film pattern 18.
An amorphous silicon film 41 is formed thereon.

Thereafter, as shown in FIG. 4B, hydrogen ions 42 are implanted into the amorphous silicon film 41 by an ion doping technique, for example, an ion implantation method. At the same time, conductivity type impurity ions 43 are implanted into the surface layer of the amorphous silicon film 41. This conductivity type impurity ion 4
3 is a typical example of an n-type impurity such as a phosphorus ion (P ⁺ ), an arsenic ion (As ⁺ ) or an antimony ion (Sb ⁺ ). For example, a boron ion (B
⁺ ) Is representative. And conductive impurity ions 43
Is implanted with a low energy of about 1 keV to 5 keV.

Then, as shown in FIG.
The metal film 21 is formed on the upper surface of the amorphous silicon film 41 by a film forming technique such as a deposition method, an evaporation method, and a sputtering method.

In the manufacturing method of the third step, hydrogen ions 42 are implanted into the amorphous silicon film 41 by ion doping technology.
1 can contain at least hydrogen ions 42 at the same level as the silicon nitride film. In the amorphous silicon film 41, hydrogen ions 42 and conductive impurity ions 4
3 is implanted, the activation annealing
This can be performed at a temperature of 00 ° C. or less. Therefore, a low temperature process is realized. Further, since it is not necessary to form a conductive silicon film, the film forming step can be omitted.

Next, the third step of the manufacturing method described with reference to FIGS. 2 and 3 can also be performed as follows. This will be described with reference to the manufacturing process diagram of FIG. The same components as those described with reference to FIG. 4 are described with the same reference numerals.

As shown in FIG. 5A, the polycrystalline silicon film 17 is set so as to cover the silicon oxide film pattern 18.
An amorphous silicon film 41 is formed thereon.

Thereafter, as shown in FIG. 5B, hydrogen ions 42 are implanted into the amorphous silicon film 41 by plasma doping, and conductive impurity ions are formed on the surface of the amorphous silicon film 41. Inject 43.

Then, as shown in FIG.
The metal film 21 is formed on the upper surface of the amorphous silicon film 41 by a film forming technique such as a deposition method, an evaporation method, and a sputtering method.

In the manufacturing method of the third step described with reference to FIG. 5, the hydrogen ions 42 and the conductive impurity ions 43 are introduced into the amorphous silicon film 41 by plasma doping. It becomes easy to introduce the conductive impurity ions 43 into the surface layer of the silicon film 41. Further, similarly to the above, the amorphous silicon film 41 is formed.
Since hydrogen ions 42 and conductive impurity ions 43 are implanted therein, the activation annealing can be performed at a temperature of 400 ° C. or less. Therefore, a low temperature process is realized. Further, since it is not necessary to form a conductive silicon film, the film forming step can be omitted.

[0046]

As described above, according to the present invention ,
Since the source / drain is formed of the amorphous silicon film, the conductive silicon film, and the metal film, the amorphous silicon film is offset. Therefore, since the thin film transistor has an offset structure, off current can be reduced, and leakage current can be reduced by relaxation of an electric field near the drain. Further, since the hydrogenated polycrystalline silicon film is formed on the gate via the insulating film, the dangling bonds of the polycrystalline silicon film can be replaced with hydrogen and removed. Therefore, the carrier mobility in the channel region can be improved.

According to the first aspect of the present invention, an amorphous silicon film containing hydrogen is formed on a polycrystalline silicon film, and then hydrogen in the amorphous silicon film is injected into the polycrystalline silicon film. The polycrystalline silicon film is hydrogenated over the entire area. Therefore, the source / drain resistance is reduced.

According to the second aspect of the present invention, since hydrogen ions are implanted into the amorphous silicon film by ion doping, a large amount of hydrogen ions can be contained in the amorphous silicon film. Therefore, hydrogenation of the polycrystalline silicon film can be easily and sufficiently performed. Therefore, dangling bonds in the polycrystalline silicon film can be removed, so that the mobility of carriers in the channel region can be improved.

According to the third aspect of the present invention, conductive impurity ions are introduced into the amorphous silicon film by plasma doping, so that the conductive impurity ions can be easily introduced into the surface layer of the amorphous silicon film. Therefore, since the conductive impurity ions are not diffused in the lower layer of the amorphous silicon film, the region functions as an offset.

According to the second and third aspects of the present invention,
Since hydrogen ions and conductive impurity ions are introduced into the amorphous silicon film, the conductive impurity ions can be activated by low-temperature annealing at 400 ° C. or lower. Therefore, a low-temperature process can be realized.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view of an embodiment of the present invention.

FIG. 2 is a manufacturing process diagram (part 1) of the embodiment of the present invention.

FIG. 3 is a manufacturing process diagram (part 2) of the embodiment of the present invention.

FIG. 4 is a manufacturing process diagram of a third process.

FIG. 5 is a manufacturing process diagram of a third process.

FIG. 6 is a manufacturing process diagram of a conventional example.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 thin film transistor 11 base 12 gate 13 insulating film 17 polycrystalline silicon film 18 silicon oxide film 19 amorphous silicon (a-Si: H) film containing hydrogen 20 conductive silicon film 21 metal film 22 source / drain 23 source / drain 31 Amorphous silicon film 32 Silicon oxide film 41 Amorphous silicon film 42 Hydrogen ion 43 Conductive impurity ion

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-206532 (JP, A) JP-A-4-321219 (JP, A) JP-A-3-222370 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336

Claims (3)

(57) [Claims] 1. A first step of forming an insulating film including at least a gate insulating film so as to cover a gate provided on a substrate having at least a surface having an insulating property, and then forming a polycrystalline silicon film on an upper surface thereof A second step of forming a silicon oxide film on the polycrystalline silicon film and then patterning to form a silicon oxide film pattern on the polycrystalline silicon film above the gate; A third step of sequentially forming an amorphous silicon film containing hydrogen, a conductive silicon film, and a metal film on the polycrystalline silicon film in a covering state; A fourth step of introducing into the polycrystalline silicon film and activating conductive impurities in the conductive type silicon film; Manufacturing method of a thin film transistor which is characterized in that by patterning and quality silicon film made of a fifth step of forming a source / drain. 2. A first step of forming an insulating film including at least a gate insulating film so as to cover a gate provided on a substrate having at least a surface having an insulating property, and then forming a polycrystalline silicon film on an upper surface side thereof. A second step of forming a silicon oxide film on the polycrystalline silicon film and then patterning to form a silicon oxide film pattern on the polycrystalline silicon film above the gate; After forming an amorphous silicon film on the polycrystalline silicon film in a covering state, hydrogen ions are implanted into the amorphous silicon film by ion doping, and a conductive impurity is added to the surface of the amorphous silicon film. A third step of implanting ions and then forming the metal film; and introducing heat in the amorphous silicon film into the polycrystalline silicon film by heat treatment. And a fourth step of activating a conductive impurity in the conductive type silicon film, and forming a source / drain by patterning the metal film, the conductive type silicon film, and the amorphous silicon film. A method for manufacturing a thin film transistor, comprising five steps. 3. A first step of forming an insulating film including at least a gate insulating film so as to cover a gate provided on a substrate having at least a surface having an insulating property, and then forming a polycrystalline silicon film on an upper surface thereof. A second step of forming a silicon oxide film on the polycrystalline silicon film and then patterning to form a silicon oxide film pattern on the polycrystalline silicon film above the gate; After forming an amorphous silicon film on the polycrystalline silicon film in a covering state, hydrogen ions and conductive impurity ions are introduced into the amorphous silicon film by plasma doping. A third step of forming, and introducing a hydrogen in the amorphous silicon film into the polycrystalline silicon film by a heat treatment, A fourth step of activating conductive impurities; and a fifth step of patterning the metal film, the conductive silicon film, and the amorphous silicon film to form a source / drain. A method for manufacturing a thin film transistor.