JPH06224640A - Analog waveform output device - Google Patents

Abstract

PURPOSE:To provide the analog waveform output device able to output an analog waveform with less waveform distortion without increasing the capacity of a memory. CONSTITUTION:Even when plural analog waves whose frequencies differ are outputted by using a D/A converter circuit 9, a sampling division number to a degree of disregarding waveform distortion of the analog waveform of a longest period able to be outputted is set and digital data corresponding to a level of each division point have only to be stored in a ROM 1 by one period only, and waveform distortion of the analog waveform and increase in the memory capacity having been caused in a conventional device are prevented and then a very excellent analog waveform is outputted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog waveform output device suitable for outputting a good analog waveform using a DA converter circuit incorporated in a microcomputer or the like.

[0002]

2. Description of the Related Art Recent microcomputers have built-in, for example, DA conversion circuits as peripheral circuits in accordance with the multi-functionalization. This DA conversion circuit is used for, for example, a device that generates a buzzer sound having different frequencies according to a key operation, and is realized by supplying the analog output waveform of the DA conversion circuit to the buzzer generation circuit. Specifically, the audible frequency is in the range of several hundreds to several KHz, and within this range, when it is desired to output a plurality of analog waveforms with different frequencies for the buzzer sound from the DA conversion circuit, Divide one cycle of multiple analog waveforms at regular intervals,
All digital data corresponding to the waveform level at each division point is stored in advance in each address of a memory such as ROM or RAM. Then, at a fixed sampling cycle, the digital data stored in the memory is sequentially read and DA conversion is performed to output an analog waveform.

[0003]

However, since the sampling period is fixed, there is no problem in generating an analog waveform having a low frequency, but when an analog waveform having a high frequency is generated, waveform distortion occurs. There was a problem. If the number of divisions of one cycle of the analog waveform is increased in order to overcome this waveform distortion and the sampling cycle is shortened accordingly, there is a problem that the memory capacity for generating the analog waveform increases. In particular, conventionally, in order to output, for example, 10 kinds of analog waveforms having different frequencies, digital data for the 10 kinds of analog waveforms must be individually stored in a memory, and the shorter the sampling cycle is, the shorter the sampling cycle is. There has been a problem that the increase in memory capacity is remarkable.

Therefore, an object of the present invention is to provide an analog waveform output device capable of outputting an analog waveform with less waveform distortion without increasing the memory capacity.

[0005]

The present invention has been made to solve the above problems, and is characterized in that one cycle of an analog waveform is divided into a predetermined number and the division is performed. A memory in which digital data corresponding to the waveform level at a point is stored, and an address circuit for accessing each address in which the digital data for each division point is stored,
The sampling cycle setting data is set, the counter that is reset when the count result reaches the content of the register, and the fact that the count value of the counter matches the content of the register are detected, and the sampling cycle setting data is set. A coincidence detection circuit that generates a coincidence detection signal for changing the addressing content of the address circuit in synchronization with the sampling cycle indicated by the data, and digital data at each division point of the analog signal read from the memory. Is sequentially converted into an analog value and outputs a desired analog waveform, and the sampling cycle setting data set in the register is varied according to the cycle of the analog waveform.

[0006]

According to the present invention, since the sampling period can be changed according to the period of the analog waveform to be output, when analog waveforms having the same shape but different periods are output, 1
All that is required is to store the analog waveform data for only the period in the memory.

[0007]

The details of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram for explaining the present invention.
FIG. 2 is a timing chart for explaining the operation of FIG.
FIG. 3 is a flow chart for explaining the operation of FIG. The configuration shown in FIG. 1 is incorporated in the microcomputer.

In FIG. 1, (1) is a ROM in which program data for operating the microcomputer is stored, and the specified address of the ROM (1) is an analog waveform for one cycle described later. The digital data at each sampling point is written. still,
The means for storing digital data for analog waveforms is not limited to the ROM (1) described above, but may be a memory such as a RAM capable of writing the data at the initial stage of the microcomputer. (2) is an n-bit counter that performs a counting operation in synchronization with the rising edge of the clock CK1,
The cycle of the clock CK1 is set shorter than the cycle between each sampling. (3) is an n-bit register in which data corresponding to the sampling period of the analog waveform is set. Here, when outputting an analog waveform after DA conversion, which will be described later, as audio information, the audible audio frequency is in the range of several hundred Hz to several KHz. Therefore,
It is assumed that the sampling division number of the analog waveform for one cycle is set to a division number that can ignore the waveform distortion of the analog waveform having the lowest audio frequency. Even if the frequency of the analog waveform having this division point is the highest, the cycle of the clock CK1 is compared with this minimum sampling cycle so that the coincidence detection circuit described later can detect the minimum sampling cycle. Is set short. In this state, if the cycle of the analog waveform to be output (the cycle is long in the case of low-pitched sound, the cycle is short in the case of high-pitched sound) is lengthened or shortened, the sampling cycle changes in proportion to this. The digital data corresponding to is set in the register (3). Reference numeral (4) is a coincidence detection circuit which detects that the count content of the counter (2) coincides with the value of the register (3) and generates a high-level coincidence detection signal MD at that time. (5) is a D flip-flop, a D terminal for fetching data is connected to an output terminal of the coincidence detection circuit (5), and a C terminal for fetching a clock has a clock C having a frequency higher than that of the clock CK1.
K2 is applied, and the Q terminal for output is connected to the reset terminal of the counter (2). That is, the high-level coincidence detection signal MD is synchronized with the clock CK2 and D
When taken into the flip-flop (5), a high-level reset signal RST is output, and the content of the counter (2) that has counted up to the value of the register (3) is reset by the reset signal RST. Since the frequency of the clock CK2 is set higher than that of the clock CK1, the counting operation of the counter (2) by the clock CK1 is not disturbed by the clock CK2.
(6) is an address circuit for accessing the address of the ROM (1) in which digital data for the analog waveform is stored, which increments the address contents by +1 each time the match detection signal MD is input. Reference numeral (7) is a register in which digital data for an analog waveform read from the ROM (1) is set via the data bus (8). (9) is a DA conversion circuit for converting the contents set in the register (7) into an analog value.

An example in which the circuit of FIG. 1 is used in a system for generating a buzzer sound of high, middle and low frequencies corresponding to the keys by selectively pressing three keys will be described. In this case, the analog waveform only changes in frequency according to the height of the buzzer sound, and other conditions such as amplitude do not change. Therefore, the digital data corresponding to the analog waveform stored in the ROM (1) need only be the number of divisions of the analog waveform for one period. For example, as shown in FIG. 4, one cycle of an analog waveform (for example, a sine wave) is divided into 16 from S0 to S15 at equal intervals. With this division number, the waveform distortion of the analog waveform with the longest period that can be output after DA conversion can be ignored. Therefore, in the ROM (1), in the range of the amplitude L of the analog waveform, S
Fifteen pieces of digital data corresponding to the levels at the positions of 0 to S15 are stored. The sampling data at these division points S0 to S15 are fixed when the cycle of the analog waveform changes.

First, when the microcomputer is initialized and then some key (not shown) is pressed, this key operation is detected, and the program for operating according to the flow shown in FIG. 3 is executed. That is, first, it is determined what frequency the frequency associated with the key indicates (Hz). If it is determined that the above key indicates a low frequency, the sampling period between the divided points of the analog waveform becomes long, so data indicating this sampling period is set in the register (3) (step). Then, the counter (2) starts counting in synchronization with the rising edge of the clock CK1, and at time t0 in FIG. 2, the content of the counter (2) matches the value of the register (3), that is, the time equal to the sampling period. After a lapse of time, the coincidence detection signal MD becomes high level, and the address of the ROM (1) storing the digital data corresponding to the level of the first division point S0 of the analog waveform of one cycle is changed to the address circuit (6). Accessed by. And ROM
This digital data read from (1) is once held in the register (7) via the data bus (8), and then DA data is synchronized with the operation clock of the microcomputer.
It is converted into an analog value by the conversion circuit (9). On the other hand, the counter (2) is reset by the reset signal RST generated at the time t1, and the counting operation is restarted to detect the next sampling cycle. Then, the same operation is repeated, and the second to final division point S1 of the analog waveform is repeated.
The digital data corresponding to S15 are sequentially converted into analog values by the DA conversion circuit (9), and the analog waveform for one cycle is output. The waveform output ends by outputting the analog waveform for several cycles (step). This analog waveform output is applied to a buzzer sound generating circuit (not shown) in the subsequent stage and is generated as a low frequency sound. After that, the frequency of the key input is determined again. Even if the buzzer sound frequency corresponding to the key is the intermediate frequency or the high frequency shown in step, the operation is performed in the same manner as in the case of the low frequency of the step. Although the present embodiment has been described with respect to three types of keys, it goes without saying that it is also possible to support frequencies higher than that.

As described above, according to the present invention, even when a plurality of analog waveforms having different frequencies are output by using the DA conversion circuit (9), the waveform distortion of the longest outputable analog waveform can be ignored. It suffices to set the number of sampling divisions to some extent and store the digital data corresponding to the levels of the respective division points S0 to S15 for one cycle in the ROM (1). An increase in memory capacity can be prevented, and an extremely good analog waveform can be output. Therefore, a clear sound can be obtained even when the buzzer output corresponding to the key operation is performed.

[0013]

According to the present invention, even when a plurality of analog waveforms having different frequencies are output by using a DA converter circuit, sampling division to such an extent that waveform distortion of the analog waveform having the longest cycle that can be output can be ignored. It is only necessary to set the number and store the digital data corresponding to the level of each of these division points in the memory for one cycle, and it is possible to prevent the waveform distortion of the analog waveform and the increase in the memory capacity that have occurred conventionally, which is extremely good. The advantage of being able to output various analog waveforms is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram for explaining the present invention.

FIG. 2 is a timing chart for explaining the operation of FIG.

FIG. 3 is a flow chart for explaining the operation of FIG.

FIG. 4 is a diagram showing an analog waveform.

[Explanation of symbols]

 (1) ROM (2) Counter (3) Register (4) Match detection circuit (6) Address circuit (9) DA conversion circuit

Claims (2)

[Claims] 1. A memory in which one cycle of an analog waveform is divided by a predetermined number and digital data corresponding to a waveform level at the division point is stored, and digital data for each division point is stored. An address circuit that accesses each address, a register in which sampling period setting data is set, a counter that is reset when the count result reaches the content of the register, and the count value of the counter matches the content of the register And a coincidence detection circuit that generates a coincidence detection signal for changing the addressing content of the address circuit in synchronization with the sampling period indicated by the sampling period setting data; Convert the digital data at each division point of the analog signal to an analog value sequentially,
A DA conversion circuit that outputs a desired analog waveform, wherein the sampling cycle setting data set in the register is variable according to the cycle of the analog waveform. 2. The number of divisions of the analog waveform is the DA
The number is set to a number that allows the distortion of the analog waveform of the longest period output from the conversion circuit to be ignored.
The described analog waveform output device.