JPH06216774A - Following-up type electronic a-d converter - Google Patents

Abstract

PURPOSE: To provide a followup electronic analog/digital(A/D) converter with which the quick tracking of any small input voltage change is processed. CONSTITUTION: Concerning this converter, an adding point SP is basically linked through an inverted amplifier IM 1 to a converter output (i), connected through a serially coupled inverted amplifier IM 2 and a discriminator D to the input of N-bit up/down counter C and connected through a digital/analog converter DAC to an output O of converter. The output of counter C is linked to the output O and the input of converter DAC. The width of intervals for the response and input voltage V1 of converter is set by the amplifier IM 1 and further, the opening ratio of comparators C+1 and C-1 suitable in the discriminator D is set by the amplifier IM 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tracking type electronic analog-digital converter.

[0002]

2. Description of the Prior Art In the SU 1172013A patent, a tracking electronic analog-to-digital converter is disclosed, the input of which is connected to the first input of a comparator,
On the other hand, the second input of the comparator is connected to the output of the analog addition circuit. The output of the comparator is connected to the input of the up / down counter via the control element, and its output is connected to the output side of the converter. An integrator is connected to the input of the additional circuit, its output is connected to the input of the up-down counter and the output of the integrator, and the output of the integrator is connected to the converter output via the digital-analog converter. There is. The up / down counter is capable of starting from 0 and sweeping all values up to the new input voltage value where it is stopped by the comparator, so any change in voltage value can be accommodated.

[0003]

SUMMARY OF THE INVENTION To solve the above background problem, it is an object of the present invention to provide a tracking electronic analog-to-digital converter that handles the rapid tracking of any small input voltage changes. However, the bit resolution step is configurable and the digital representation of the input voltage can output any information without loss.

To this end, the tracking electronic analog-to-digital converter according to the invention is characterized by the features of claims 1 to 4.

Advantageously, the tracking electronic analog-to-digital converter of the present invention is a 16-bit that operates a fast-changing, smooth analog signal, eg, a known digital display converter, without loss of information. That is, the conversion speed to convert to high bits is fast.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-bit, for example N = 16, tracking analog-to-digital converter according to the invention (see figure) has two inverting amplifiers IM1, IM2, discriminator D, N-bit up / down counter C and It is composed of an N-bit digital-analog converter DAC. Up / down counter C outputs O ₁ , O ₂ , ...
, O _n are connected to the conversion output side of the present invention and the input side of the digital-analog converter DAC by a known method.

In the following electronic analog-digital converter of the present invention, the converter input i is connected to the addition point SP through the resistor Ri, the inverting amplifier IM1 and the resistor R '.
Everything is connected in series with each other. The output of the converter of the present invention and the output O _{1 of} the up / down counter C,
O _2, ......, O _n digital was connected in series with each other - summing point via analog converter DAC resistor R '' SP
It is connected to the. The addition point SP is connected to the front side input i ₊ and the rear side input i ₋ of the up-down counter C through an inverting amplifier IM2 and a discriminator D which are connected in series.

The inverting amplifiers IM1 and IM2 are designed as follows. The inputs of the inverting amplifiers IM1 and IM2 are simultaneously the inverting inputs of the operational amplifiers OA1 and OA2, and the non-inverting inputs are grounded through the resistors R ₁₁ and R ₂₁ . At the same time, the inputs of the inverting amplifiers IM1 and IM2 are potentiometers P.
It is connected to the slide contacts of ₁₁ and P ₂₁ . The fixed potentiometer contacts are connected to the voltage terminals + U _ref and -U _ref , and the deviations of the operational amplifiers OA1 and OA2 are adjusted by potentiometers P ₁₁ and P ₂₁ . Inverting amplifier I
The outputs of M1 and IM2 are similar to the operational amplifiers OA1 and OA2, each of which has a resistor R ₁₂ connected in series with each other.
Through potentiometer P ₁₂ and potentiometer P ₂₂ to the inputs of inverting amplifiers IM1 and IM2, respectively.

[0009] discriminator input simultaneously resistor R ₊₁ and D, sent to the common terminal of R _-1, the resistor R _+1, respectively other terminal of R _-1 comparators C ₊ and C _- the input of the inverting Side and the non-inverting side. Each other input is grounded. The outputs of the comparators C ₊ and C ₋ are zener diodes Z ₊ and Z ₋ through resistors R ₊₂ and R _−2.
Is connected to the first terminal of the
It is connected to the first inputs of NAND gates G ₊ and G ₋ .
The second inputs of the NAND gates G ₊ and G ₋ are connected to the output side of the rectangular pulse generator SPG, and the outputs of the NAND gates G ₊ and G ₋ are the front side input i ₊ and the rear side input of the up / down counter C, respectively. i _- to have led. Advantageously, the N-bit up / down counter C consists of nm bit up / down counters C _1, C _2, ..., C _n cascaded together.

The tracking electronic analog-to-digital converter of the present invention operates as follows. Interval −U _o , + U _o
The input voltage values V _{i of} are superimposed and applied as voltage V ₁ to the summing point with the inverse signal. Therefore, it is digital - the analog output O _a-analog converter DAC, is subtracted from the actual voltage V _3. The voltage V ₃ corresponding to the digitized voltage at the output O of the digital-analog converter of the present invention is the digital-analog converter DAC.
Is converted into an analog quantity formed by. The gain of the operational amplifier OA1 is set by the resistor R ₁₂ and the potentiometer P ₁₂ . In fact, the spacing of the input voltage V ₁ is set by the gain of the operational amplifier OA1 and results from the bit resolution step of the digital-to-analog converter DAC. Then, the response of the analog-to-digital converter of the present invention is set. The gain is 1 and the interval is -10 at the output voltage V ₃ of the digital-analog converter DAC.
V, + 10V, and the input voltage V ₁ has an interval of -10V, + 10V at a resolution corresponding to 16-bit conversion.
Within The smallest and discernible change in input voltage V ₁ is equal to ± 300 μV. Further, the gain is 16 and the output voltage V ₃ is again within the interval −10 V, +10 V, the input voltage V ₁ is within the interval −0.625 V, and the input voltage V ₁ is minimum and discernible. A significant change equals ± 18.75 μV. As a result, depending on the gain of the operational amplifier OA1, the width of the input voltage V ₁ and the interval −
V _o, + V _o and analogs of the invention - the response of the digital converter, for example, bit resolution steps are configured.

The factor set by the difference between the absolute values of the voltages V ₃ and V ₁ appearing at the addition point SP is the inverting amplifier IM.
Polymerized by 2. Advantageously, the gain is set equal to 2. In this way, the inverting amplifier I
The rate of change of the voltage V _{2 at} the output of M2 and thereby the rate of opening of the appropriate comparator in the discriminator is set. When the voltage V ₂ is positive, the comparator C ₊ in the discriminator D is switched to ground,
A logic one at the output of NAND gate G ₊ develops when the output voltage of the generator drops to zero. A pulse appears on the front input i ₊ of the up / down counter C. However up-down counter C rear input i _- Digital The upper - voltage at the output of the analog converter DAC V
_A pulse develops when 3 exceeds the voltage V ₁ at the input of the analog-to-digital converter of the invention, which causes the voltage V ₂ to become negative. As a result, on the front side input i ₊ and the rear side input i ₋ of the up-down counter C, whenever the total voltage at the addition point SP exceeds the voltage corresponding to the resolution step of the analog-digital conversion, the pulse V ₂₊ , V _2- is expressed. The code of the digital representation of the input voltage at the output of the analog-to-digital converter of the present invention depends on the input code of the digital-to-analog converter DAC. Since the switching standard of the analog-digital converter of the present invention is set to just one point, the bit-analog conversion can be performed extremely quickly. The analog-digital converter of the present invention has a voltage range of -10V to +10.
It takes 10 m / s to sweep to V. Therefore, preferably it should not expect interaction with the sample and hold circuit.

Accordingly, the analog-to-digital converter of the present invention is suitable for a high bit analog-to-digital converter that changes the voltage at the output of various sensors quickly and smoothly. The analog-to-digital converter of the present invention is distinguished by the fact that a complete 16-bit digital representation of the input analog voltage is permanently provided at its output. 1 with a conversion time of 1 μs for a sinusoidal voltage in the range of −10 V and +10 V at 30 Hz intervals.
6-bit digital - analog converter DAC, an operational amplifier OA1, OA2 as TL082, comparator - M319, NAND gate G ₊ as data, G _- a 74LS
00, 4-bit counters C ₁ , C ₂ , C ₃ , C ₄ according to an embodiment of the present invention analog-to-digital converter with four 74LS193, 16-bit resolution is 3.9 × 10 ⁹ per second. (3.9.10 ⁹ ) samples have been achieved. For comparison, Burr Brown's very fast-running cascade flash analog-to-digital converter without sample-and-hold circuit-
Effective 16 for sinusoidal signals with amplitudes in the 10V, + 10V range
It has been quoted that bit converters can only achieve frequencies up to 0.8 Hz.

[Brief description of drawings]

FIG. 1 shows a tracking electronic analog-to-digital converter of the present invention.

[Explanation of symbols] C up / down counter D discriminator SP summing point R'resistor R resistance R ₁ resistance IM1 inverting amplifier IM2 inverting amplifier DAC N-bit digital-analog converter

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Andrei Zatler, Republic of Slovenia. 62000 Maribor. Asker Sevua. twenty four

Claims (4)

[Claims] 1. A summing point (SP) resistant (R'), resistors and the inverting amplifier (IM1) transducer input via (R _{i) (i)}
, And they are all connected in series with each other, and also connected to the input of the up / down counter (C) through the inverting amplifier (IM2) and the discriminator (D),
And they are connected in series with each other and further include a resistor (R ″) and an N-bit digital-analog converter (D
AC) to the output (O) of the converter, and they are all connected in series with each other N
-Bit up / down counter- (C) is an input and output (O) of the N-bit digital-analog converter DAC.
Follow-up electronic analog-to-digital converter connected to. 2. The input of the inverting amplifier (IM1; IM2) is similar to the input of the operational amplifier (OA1; OA2),
Its inverting amplifier; non-inverting input of the (IM1 IM2) resistor; grounded through (R ₁₁ R _21), potentiometer; connected to the slide contact of the (P ₁₁ P _21), the potentiometer contacts fixed voltage terminal (+ U _ref , -U _ref) in connection, further inverting amplifier (IM1; output IM2), the resistance and the potentiometer (P ₁₂₎ which is connected in series with each other (R _12), and a resistor (respectively inverting amplifier through R ₂₂₎ (IM1 A tracking electronic analog-to-digital converter according to claim 1, characterized in that it is similar to an operational amplifier (OA1; OA2) connected to the input of IM2). 3. The input of the discriminator (D) is similar to the common terminal of the resistors (R ₊₁ , R _-1 ), the other terminal being the inverting input of the comparator (C ₊ , C) and the non-input terminal. is connected to the inverting input, the other input is grounded, its output resistance (R _+2, R _-2) Zener diode is grounded through (Z _+, Z _-) first terminal and NAND gate (G ₊ , G _-) to have led to the first input, the second
The input of is connected to a square pulse generator (SPG) and NA
ND gate (G _+, G _-) of the output-following electronic analogue according to claim 2, characterized in that it is connected to the front input and rear-side input of the up-down counter (C) -
Digital converter. 4. The follow-up electron according to claim 3, wherein the up / down counter (C) is composed of nm bit up / down counters (C _1, C _2, ..., C _n ) cascaded with each other. Analog-to-digital converter.