JPH0621604A - Circuit board device having chip electronic components mounted thereon - Google Patents
Circuit board device having chip electronic components mounted thereonInfo
- Publication number
- JPH0621604A JPH0621604A JP17800592A JP17800592A JPH0621604A JP H0621604 A JPH0621604 A JP H0621604A JP 17800592 A JP17800592 A JP 17800592A JP 17800592 A JP17800592 A JP 17800592A JP H0621604 A JPH0621604 A JP H0621604A
- Authority
- JP
- Japan
- Prior art keywords
- chip electronic
- circuit board
- electronic component
- resist
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、電子機器のマザーボー
ドなどに利用し、半田ブリッジ(短絡)、未半田部及び
半田ボールの発生を阻止するチップ電子部品表面実装回
路基板装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mount circuit board device for a chip electronic component which is used for a mother board of electronic equipment and prevents the generation of solder bridges (short circuits), unsoldered parts and solder balls.
【0002】[0002]
【従来の技術】従来、この種のチップ電子部品表面実装
回路基板装置では、表面処理としてレジスト膜の印刷を
行っている。このレジスト膜により、クリーム半田印刷
及びリフローによるチップ電子部品をランド間に接続す
る際の半田ブリッジ(短絡)、未半田部及び半田ボール
の発生を阻止している。2. Description of the Related Art Conventionally, in this type of chip electronic component surface mount circuit board device, a resist film is printed as a surface treatment. This resist film prevents the generation of solder bridges (short circuits), unsoldered parts and solder balls when connecting chip electronic components between lands by cream solder printing and reflow.
【0003】[0003]
【発明が解決しようとする課題】しかしながら、上記従
来のチップ電子部品表面実装回路基板装置では、表面実
装時の表面処理として、一回のレジスト印刷により比較
的薄いレジスト膜が形成されている。このため、チップ
電子部品をランドに接続する際に印刷したクリーム半田
が押し潰され、また、リフロー時の広がりにより半田ブ
リッジ(短絡)、未半田部及び半田ボールが発生し易
い。したがって、次工程で人手による選別や修正を行う
必要があり、その作業に手間がかかるという問題があっ
た。However, in the above-mentioned conventional chip electronic component surface mounting circuit board device, a relatively thin resist film is formed by one-time resist printing as the surface treatment during surface mounting. Therefore, the cream solder printed when the chip electronic component is connected to the land is crushed, and a solder bridge (short circuit), an unsoldered portion, and a solder ball are likely to be generated due to spread during reflow. Therefore, it is necessary to manually select and correct in the next process, and there is a problem that the work takes time.
【0004】本発明は、このような従来の技術における
問題を解決するものであり、チップ電子部品を浮かして
配置する100μm程度のレジスト印刷部位を設けて、
半田ブリッジ(短絡)、未半田部及び半田ボールの発生
を阻止し、次工程での手間を省き、その生産性が向上す
る優れたチップ電子部品表面実装回路基板装置の提供を
目的とする。The present invention solves the problems in the prior art as described above, and provides a resist printing portion of about 100 μm in which the chip electronic parts are floated and arranged,
An object of the present invention is to provide an excellent surface mounting circuit board device for a chip electronic component that prevents generation of solder bridges (short circuits), unsoldered parts and solder balls, saves time and effort in the next step, and improves productivity.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するため
に、本発明のチップ電子部品表面実装回路基板装置は、
チップ電子部品と、チップ電子部品を接続する複数のラ
ンドが設けられた回路基板とを有し、チップ電子部品を
配置するランド間にチップ電子部品が当接し、回路基板
表面から浮かして配置するための少なくとも100μm
厚さのレジスト印刷部位を設けた構成である。In order to achieve the above object, a chip electronic component surface mount circuit board device of the present invention comprises:
To have a chip electronic component and a circuit board provided with a plurality of lands for connecting the chip electronic component, and the chip electronic component abuts between the lands for arranging the chip electronic component, and is arranged so as to float from the surface of the circuit board. At least 100 μm
This is a configuration in which a resist printing portion having a thickness is provided.
【0006】[0006]
【作用】このような構成により、本発明のチップ電子部
品表面実装回路基板装置は、例えば、二回のレジスト印
刷により少なくとも100μm厚さのレジスト印刷部位
をランド間に設けて、チップ電子部品を回路基板表面か
ら浮かすようにしているので、チップ電子部品をランド
に接続する際に、印刷したクリーム半田が押し潰され、
またリフロー時の広がりによる半田ブリッジ(短絡)、
未半田部及び半田ボールの発生が阻止され、次工程の手
間が低減して生産性が向上する。With such a configuration, the chip electronic component surface-mounting circuit board device of the present invention provides a chip electronic component circuit by providing a resist printed portion having a thickness of at least 100 μm between lands by, for example, two times of resist printing. Since it is made to float from the board surface, when connecting the chip electronic component to the land, the printed cream solder is crushed,
Also, solder bridge (short circuit) due to spread during reflow,
The generation of unsoldered parts and solder balls is prevented, and the labor of the next process is reduced, thus improving the productivity.
【0007】[0007]
【実施例】以下、本発明のチップ電子部品表面実装回路
基板装置の実施例を図面に基づいて詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of a surface mounting circuit board device for a chip electronic component of the present invention will be described below in detail with reference to the drawings.
【0008】図1は実施例の外観構成を示している。図
1において、1は回路基板、2a、2bは表面実装した
チップ電子部品である。FIG. 1 shows the external structure of the embodiment. In FIG. 1, reference numeral 1 is a circuit board, 2a and 2b are surface-mounted chip electronic components.
【0009】図2は回路基板1にチップ電子部品2を表
面実装した側面構成を示している。図2において、1は
回路基板、2aは表面実装したチップ電子部品、3a、
3bは二回のレジスト印刷により配置された2層のレジ
スト膜である。4a、4bは回路基板1に配置され、チ
ップ電子部品2の両電極が半田付けされるランドであ
る。5a、5bはクリーム半田が溶融して固化し、チッ
プ電子部品2の両電極をランド4a、4bに接続した半
田付け部である。FIG. 2 shows a side structure in which the chip electronic component 2 is surface-mounted on the circuit board 1. In FIG. 2, 1 is a circuit board, 2a is a surface-mounted chip electronic component, 3a,
3b is a two-layer resist film arranged by two times of resist printing. Numerals 4a and 4b are lands arranged on the circuit board 1 and to which both electrodes of the chip electronic component 2 are soldered. Denoted at 5a and 5b are soldering portions where the cream solder is melted and solidified and both electrodes of the chip electronic component 2 are connected to the lands 4a and 4b.
【0010】次に、この実施例の構成における機能につ
いて説明する。図2において、回路基板1にチップ電子
部品2を実装する場合、先ずレジスト印刷によりランド
4a、4bの部分を除いてレジスト膜3aが形成され
る。Next, the function of the configuration of this embodiment will be described. In FIG. 2, when the chip electronic component 2 is mounted on the circuit board 1, first, the resist film 3a is formed by resist printing except the lands 4a and 4b.
【0011】図3において、一回目のレジスト印刷によ
るレジスト膜3aの厚さは、例えば、50μmである。
そして、チップ電子部品2を配置するランド4a、4b
に二回目のレジスト印刷によるレジスト膜3bを形成す
る。すなわち、2層の厚さは100μm程度となる。In FIG. 3, the thickness of the resist film 3a formed by the first resist printing is, for example, 50 μm.
Then, lands 4a and 4b on which the chip electronic component 2 is arranged
Then, a resist film 3b is formed by second resist printing. That is, the thickness of the two layers is about 100 μm.
【0012】このレジスト膜3a、3bの形成の後、ラ
ンド4a、4bへの慣用的なクリーム半田印刷工程を処
理し、この後、チップ電子部品2の配置工程、リフロー
工程を経てチップ電子部品表面実装回路基板を完成させ
る。After forming the resist films 3a and 3b, a conventional cream solder printing process on the lands 4a and 4b is processed, and thereafter, a chip electronic component 2 placement process and a reflow process are performed, followed by a chip electronic component surface. Complete the mounted circuit board.
【0013】この場合、チップ電子部品2はレジスト膜
3a、3bに当接して配置される。すなわち、チップ電
子部品2が回路基板1の表面より高さ100μm分だけ
浮いて配置されることになる。In this case, the chip electronic component 2 is placed in contact with the resist films 3a and 3b. That is, the chip electronic component 2 is arranged so as to float above the surface of the circuit board 1 by a height of 100 μm.
【0014】この高さ100μmにより、チップ電子部
品2をランド4a、4bに接続する際に印刷したクリー
ム半田が押し潰される量が少なく、さらにリフロー時の
広がり、例えば、毛管現象による広がりが少なくなり半
田ブリッジ(短絡)、未半田部及び半田ボールが発生し
難くなる。With this height of 100 μm, the amount of the cream solder printed when the chip electronic component 2 is connected to the lands 4a and 4b is crushed less, and the spread during reflow, for example, the spread due to the capillary phenomenon is reduced. Solder bridges (short circuits), unsoldered parts and solder balls are less likely to occur.
【0015】[0015]
【発明の効果】以上の説明から明らかなように、本発明
のチップ電子部品表面実装回路基板装置は、例えば、二
回のレジスト印刷により少なくとも100μm厚さのレ
ジスト印刷部位をランド間に設けて、チップ電子部品を
回路基板表面から浮かすようにしているので、チップ電
子部品をランドに接続する際に、印刷したクリーム半田
が押し潰され、また、リフロー時の広がりによる半田ブ
リッジ(短絡)、未半田部及び半田ボールの発生が阻止
され、次工程の手間が低減して生産性が向上するという
効果を有する。As is apparent from the above description, the chip electronic component surface mounting circuit board device of the present invention has, for example, a resist printed portion having a thickness of at least 100 μm provided between the lands by two times of resist printing, Since the chip electronic components are floated from the surface of the circuit board, the printed cream solder is crushed when connecting the chip electronic components to the land, and the solder bridge (short circuit) due to the spread during reflow, unsoldered This has the effect of preventing the generation of parts and solder balls, reducing the labor of the next process, and improving the productivity.
【図1】本発明のチップ電子部品表面実装回路基板装置
の実施例における外観構成を示す斜視図FIG. 1 is a perspective view showing an external configuration of an embodiment of a chip electronic component surface-mounting circuit board device of the present invention.
【図2】図1に示す回路基板にチップ電子部品を表面実
装した側面構成を示す断面図FIG. 2 is a cross-sectional view showing a side structure in which a chip electronic component is surface-mounted on the circuit board shown in FIG.
【図3】実施例におけるレジスト膜の説明のための断面
図FIG. 3 is a sectional view for explaining a resist film in an example.
1 回路基板 2 チップ電子部品 3a、3b レジスト膜 4a、4b ランド 5a、5b 半田付け部 1 Circuit Board 2 Chip Electronic Components 3a, 3b Resist Films 4a, 4b Lands 5a, 5b Soldering Section
Claims (1)
を接続する複数のランドが設けられた回路基板とを有
し、上記チップ電子部品を配置するランド間に上記チッ
プ電子部品が当接し、回路基板表面から浮かして配置す
るための少なくとも100μm厚さのレジスト印刷部位
を設けたことを特徴とするチップ電子部品表面実装回路
基板装置。1. A chip electronic component, and a circuit board provided with a plurality of lands for connecting the chip electronic component, wherein the chip electronic component abuts between the lands where the chip electronic component is arranged, A surface mount circuit board device for a chip electronic component, which is provided with a resist printed portion having a thickness of at least 100 μm so as to be floated from the surface of the board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17800592A JPH0621604A (en) | 1992-07-06 | 1992-07-06 | Circuit board device having chip electronic components mounted thereon |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17800592A JPH0621604A (en) | 1992-07-06 | 1992-07-06 | Circuit board device having chip electronic components mounted thereon |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0621604A true JPH0621604A (en) | 1994-01-28 |
Family
ID=16040893
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17800592A Pending JPH0621604A (en) | 1992-07-06 | 1992-07-06 | Circuit board device having chip electronic components mounted thereon |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0621604A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6303872B1 (en) * | 1997-06-25 | 2001-10-16 | Visteon Global Tech. | Anti-tombstoning solder joints |
US8176726B2 (en) | 2004-05-05 | 2012-05-15 | Robert Bosch Gmbh | Method for introducing a reagent medium into an exhaust gas conduit of an internal combustion engine, and apparatus for carrying out the method |
-
1992
- 1992-07-06 JP JP17800592A patent/JPH0621604A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6303872B1 (en) * | 1997-06-25 | 2001-10-16 | Visteon Global Tech. | Anti-tombstoning solder joints |
US8176726B2 (en) | 2004-05-05 | 2012-05-15 | Robert Bosch Gmbh | Method for introducing a reagent medium into an exhaust gas conduit of an internal combustion engine, and apparatus for carrying out the method |
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