JPH08111578A - Manufacture of board for mounting ball grid array package - Google Patents
Manufacture of board for mounting ball grid array packageInfo
- Publication number
- JPH08111578A JPH08111578A JP6267999A JP26799994A JPH08111578A JP H08111578 A JPH08111578 A JP H08111578A JP 6267999 A JP6267999 A JP 6267999A JP 26799994 A JP26799994 A JP 26799994A JP H08111578 A JPH08111578 A JP H08111578A
- Authority
- JP
- Japan
- Prior art keywords
- pads
- solder resist
- mother board
- board
- motherboard
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、ICなどのパッケージ
として用いられるボールグリッドアレイパッケージ(以
下、BGAパッケージという)を実装する基板であるマ
ザーボードの製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a mother board which is a substrate for mounting a ball grid array package (hereinafter referred to as a BGA package) used as a package for ICs and the like.
【0002】[0002]
【従来の技術】BGAパッケージは、電子部品の小型・
軽量・多機能化を担うもので、リードを用いずボールバ
ンプによる接続方式をもつパッケージである。従来、B
GAパッケージを実装するマザーボードの構造は、図2
に示すようにマザーボード1上のパッド4を除く部分に
ソルダーレジスト5が印刷されている。このマザーボー
ドへのBGAパッケージの実装・半田付けは図3に示す
ように次の工程でなされている。 (1)図3(A)のように、マザーボード1のパッド4
の上にフラックス7を塗布する。 (2)アレイ状に並んでいるBGAパッケージのボール
バンプ10とそれに対応したマザーボード上のパッド4
とを、画像処理により、図3(B)に示す位置関係とな
るように位置合わせする。 (3)位置合わせ後、マウンタの吸着ノズルを用いて、
図3(C)に示すように、BGAパッケージ8をマザー
ボード1上に載せる。 (4)BGAパッケージ8をマザーボード1に載せた状
態で、リフロー炉で加熱し、BGAパッケージ8とマザ
ーボード1とを半田付けし、図3(D)のごとく実装が
完了する。BGA packages are small electronic components.
This package is lightweight and multi-functional, and has a connection method using ball bumps without using leads. Conventionally, B
Figure 2 shows the structure of the motherboard on which the GA package is mounted.
As shown in FIG. 3, a solder resist 5 is printed on a portion of the motherboard 1 excluding the pads 4. Mounting and soldering of the BGA package on this mother board are performed in the following steps as shown in FIG. (1) As shown in FIG. 3 (A), the pads 4 on the motherboard 1
Apply flux 7 on top. (2) BGA package ball bumps 10 arranged in an array and corresponding pads 4 on the motherboard
And are aligned by image processing so that the positional relationship shown in FIG. (3) After positioning, use the suction nozzle of the mounter to
As shown in FIG. 3C, the BGA package 8 is placed on the motherboard 1. (4) The BGA package 8 placed on the motherboard 1 is heated in a reflow furnace to solder the BGA package 8 and the motherboard 1 to complete the mounting as shown in FIG.
【0003】[0003]
【発明が解決しようとする課題】従来の製造方法におい
て、BGAパッケージのボールバンプとそれに対応する
マザーボードのパッドとの位置合わせには、高い精度が
必要であり、通常、画像処理機能を有するマウンタが使
用されている。この画像処理機能を有するマウンタは高
価であり、そのため、生産コストが増大することにな
る。In the conventional manufacturing method, high accuracy is required for the alignment between the ball bumps of the BGA package and the corresponding pads of the motherboard, and a mounter having an image processing function is usually required. in use. The mounter having this image processing function is expensive, which increases the production cost.
【0004】[0004]
【課題を解決するための手段】本発明では、BGAパッ
ケージのボールバンプとマザーボードのパッドとの位置
合わせにおいて、高価な画像処理機能を有するマウンタ
を使用せず、マニュアル等で簡易に行うため、次の工程
によりマザーボードを製造する。 (1)プリント配線板の銅箔に銅メッキを施す工程。 (2)不要な銅メッキおよび銅箔をエッチングしてパッ
ドを形成する工程。 (3)1回目のソルダーレジストを塗布する工程。 (4)1回目と同じ位置に重ねて、2回目のソルダーレ
ジストを塗布する工程。According to the present invention, the positioning of the ball bumps of the BGA package and the pads of the motherboard can be easily performed manually without using an expensive mounter having an image processing function. The motherboard is manufactured by the process. (1) A step of plating copper on a copper foil of a printed wiring board. (2) A step of etching unnecessary copper plating and copper foil to form pads. (3) A step of applying the first solder resist. (4) A step of applying the solder resist on the same position as the first time and applying the solder resist on the second time.
【0005】[0005]
【実施例】図1は本発明によるマザーボードの製造工程
を示す図である。図1(A)に示すように、プリント配
線基板1の銅箔2の上に銅メッキ3を施す。続いて、図
1(B)のように、銅メッキおよび銅箔をエッチングし
て、パッド4を形成する。次に、図1(C)に示すよう
に、ドライフィルムレジストにより、パッド4と同じ高
さ(約15μm)になるように、1回目のソルダーレジ
スト5を塗布する。続いて、1回目のソルダーレジスト
5の上に重ねて、2回目のソルダーレジスト6を塗布す
る。2回目のソルダーレジスト6の厚さは、50μm程
度が適当である。以上で、マザーボードの製造は完了す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a diagram showing a manufacturing process of a motherboard according to the present invention. As shown in FIG. 1A, copper plating 3 is applied on the copper foil 2 of the printed wiring board 1. Subsequently, as shown in FIG. 1B, the copper plating and the copper foil are etched to form the pads 4. Next, as shown in FIG. 1C, the first solder resist 5 is applied by a dry film resist so as to have the same height (about 15 μm) as the pad 4. Subsequently, the solder resist 6 for the second time is applied so as to be overlaid on the solder resist 5 for the first time. A suitable thickness of the second solder resist 6 is about 50 μm. This completes the manufacture of the motherboard.
【0006】以上のように製造されたマザーボードで
は、パッド4の部分が凹になり、ソルダーレジスト6の
部分が凸になっている。従って、図1(E)に示すよう
にパッド4の上にフラックス7を塗布した後、図1
(F)に示すようにBGAパッケージ8のボールバンプ
10を、マザーボード1のパッド4の上に容易に重ねる
ことができる。この後、従来通りの方法で、リフロー炉
により半田付けする。In the mother board manufactured as described above, the pad 4 is concave and the solder resist 6 is convex. Therefore, after applying the flux 7 on the pad 4 as shown in FIG.
As shown in (F), the ball bump 10 of the BGA package 8 can be easily overlaid on the pad 4 of the motherboard 1. After that, soldering is performed by a reflow furnace in a conventional method.
【0007】[0007]
【発明の効果】本発明によれば、図1(F)に示すよう
に、マザーボード1のパッド4の部分が、対応するBG
Aパッケージ8のボールバンプ10を容易に載せられる
ような穴状に形成されている。従って、目視により容易
に位置合わせができ、高価な画像処理機能付きのマウン
タを使用する必要がなく、製造コストを低減できる。ま
た、パッド4の部分が穴状になっていることは、リフロ
ー時の位置ズレを防止する効果もある。According to the present invention, as shown in FIG. 1 (F), the portion of the pad 4 of the mother board 1 corresponds to the BG.
It is formed in a hole shape so that the ball bumps 10 of the A package 8 can be easily placed. Therefore, it is possible to easily perform visual alignment, and it is not necessary to use an expensive mounter having an image processing function, and the manufacturing cost can be reduced. In addition, the hole-like portion of the pad 4 also has the effect of preventing positional displacement during reflow.
【図1】本発明になるマザーボードの製造工程を示す
図。FIG. 1 is a diagram showing a manufacturing process of a motherboard according to the present invention.
【図2】従来のマザーボードを示す図。FIG. 2 is a diagram showing a conventional motherboard.
【図3】従来のマザーボードによるBGAパッケージの
実装を示す工程図。FIG. 3 is a process diagram showing mounting of a BGA package on a conventional motherboard.
1 プリント配線基板(マザーボード) 2 銅箔 3 銅メッキ 4 マザーボード上のパッド 5 1回目のソルダーレジスト 6 2回目のソルダーレジスト 7 フラックス 8 BGAパッケージ 9 BGAパッケージ上のパッド 10 ボールバンプ 11 ソルダーレジスト 1 printed wiring board (mother board) 2 copper foil 3 copper plating 4 pad on motherboard 5 first solder resist 6 second solder resist 7 flux 8 BGA package 9 BGA package pad 10 ball bump 11 solder resist
Claims (1)
る基板であるマザーボードの製造方法において、マザー
ボード用のプリント配線基板の銅箔に銅メッキを施す工
程と、マザーボード上の不要な銅メッキ及び銅箔をエッ
チングして、パッドを形成する工程と、マザーボードの
パッドを除く部分に1回目のソルダーレジストを塗布す
る工程と、1回目のソルダーレジストの上に、2回目の
ソルダーレジストを重ねて塗布する工程とを有すること
を特徴とするボールグリッドアレイパッケージ実装用基
板の製造方法。1. A method of manufacturing a mother board, which is a substrate for mounting a ball grid array package, in which a copper foil of a printed wiring board for the mother board is plated with copper, and unnecessary copper plating and copper foil on the mother board are etched. Then, the step of forming the pad, the step of applying the first solder resist to the portion of the motherboard other than the pad, and the step of applying the second solder resist over the first solder resist are applied. A method for manufacturing a substrate for mounting a ball grid array package, which comprises:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6267999A JPH08111578A (en) | 1994-10-07 | 1994-10-07 | Manufacture of board for mounting ball grid array package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6267999A JPH08111578A (en) | 1994-10-07 | 1994-10-07 | Manufacture of board for mounting ball grid array package |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH08111578A true JPH08111578A (en) | 1996-04-30 |
Family
ID=17452511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6267999A Pending JPH08111578A (en) | 1994-10-07 | 1994-10-07 | Manufacture of board for mounting ball grid array package |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH08111578A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998036455A1 (en) * | 1997-02-12 | 1998-08-20 | Peter Anthony Fry Herbert | A diode array |
KR100328834B1 (en) * | 1999-09-11 | 2002-03-14 | 박종섭 | Manufacturing method of wafer level chip size package |
KR100773288B1 (en) * | 1999-10-01 | 2007-11-05 | 소니 케미카루 앤드 인포메이션 디바이스 가부시키가이샤 | Multilayer flexible wiring boards |
KR100905568B1 (en) * | 2007-04-13 | 2009-07-02 | 삼성전기주식회사 | Printed circuit board and method of manufacturing the same |
JP2013138181A (en) * | 2011-12-27 | 2013-07-11 | Samsung Electro-Mechanics Co Ltd | Printed circuit board and manufacturing method of the same |
CN110913601A (en) * | 2019-11-18 | 2020-03-24 | 大连崇达电路有限公司 | Method for manufacturing solder mask translation film |
CN115802601A (en) * | 2023-02-07 | 2023-03-14 | 四川英创力电子科技股份有限公司 | Flush printed circuit board and production method thereof |
-
1994
- 1994-10-07 JP JP6267999A patent/JPH08111578A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998036455A1 (en) * | 1997-02-12 | 1998-08-20 | Peter Anthony Fry Herbert | A diode array |
KR100328834B1 (en) * | 1999-09-11 | 2002-03-14 | 박종섭 | Manufacturing method of wafer level chip size package |
KR100773288B1 (en) * | 1999-10-01 | 2007-11-05 | 소니 케미카루 앤드 인포메이션 디바이스 가부시키가이샤 | Multilayer flexible wiring boards |
KR100905568B1 (en) * | 2007-04-13 | 2009-07-02 | 삼성전기주식회사 | Printed circuit board and method of manufacturing the same |
JP2013138181A (en) * | 2011-12-27 | 2013-07-11 | Samsung Electro-Mechanics Co Ltd | Printed circuit board and manufacturing method of the same |
CN110913601A (en) * | 2019-11-18 | 2020-03-24 | 大连崇达电路有限公司 | Method for manufacturing solder mask translation film |
CN115802601A (en) * | 2023-02-07 | 2023-03-14 | 四川英创力电子科技股份有限公司 | Flush printed circuit board and production method thereof |
CN115802601B (en) * | 2023-02-07 | 2023-06-27 | 四川英创力电子科技股份有限公司 | Flush printed circuit board and production method thereof |
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Legal Events
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