JPH0621239Y2 - ホトタイオ−ドのチツプキヤリア構造 - Google Patents

ホトタイオ−ドのチツプキヤリア構造

Info

Publication number
JPH0621239Y2
JPH0621239Y2 JP3136187U JP3136187U JPH0621239Y2 JP H0621239 Y2 JPH0621239 Y2 JP H0621239Y2 JP 3136187 U JP3136187 U JP 3136187U JP 3136187 U JP3136187 U JP 3136187U JP H0621239 Y2 JPH0621239 Y2 JP H0621239Y2
Authority
JP
Japan
Prior art keywords
chip carrier
photodiode chip
bonding
photodiode
terminal portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3136187U
Other languages
English (en)
Japanese (ja)
Other versions
JPS63137935U (enrdf_load_stackoverflow
Inventor
富治 志賀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3136187U priority Critical patent/JPH0621239Y2/ja
Publication of JPS63137935U publication Critical patent/JPS63137935U/ja
Application granted granted Critical
Publication of JPH0621239Y2 publication Critical patent/JPH0621239Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
JP3136187U 1987-03-03 1987-03-03 ホトタイオ−ドのチツプキヤリア構造 Expired - Lifetime JPH0621239Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3136187U JPH0621239Y2 (ja) 1987-03-03 1987-03-03 ホトタイオ−ドのチツプキヤリア構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3136187U JPH0621239Y2 (ja) 1987-03-03 1987-03-03 ホトタイオ−ドのチツプキヤリア構造

Publications (2)

Publication Number Publication Date
JPS63137935U JPS63137935U (enrdf_load_stackoverflow) 1988-09-12
JPH0621239Y2 true JPH0621239Y2 (ja) 1994-06-01

Family

ID=30837022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3136187U Expired - Lifetime JPH0621239Y2 (ja) 1987-03-03 1987-03-03 ホトタイオ−ドのチツプキヤリア構造

Country Status (1)

Country Link
JP (1) JPH0621239Y2 (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS63137935U (enrdf_load_stackoverflow) 1988-09-12

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