JPH0621094A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To protect a gate insulation film from contamination produced during a cleaning process by a method wherein the manufacture consists of a gate oxide film formation process, a first polysilicon film formation process, an ion implantation process, a second polysilicon film formation process and a gate electrode formation process. CONSTITUTION:(a) A gate oxide film 102 is formed on a semiconductor board 100. (b) A first polysilicon film 103, which serves as a gate electrode, is formed thereon. (c) Ions are implanted through a gate electrode film so as to control a threshold voltage of a MOS type transistor. (d) A second polysilicon film (or silicide film) is formed. (e) The gate electrode film is processed by photo-lithography etching, thereby forming the gate electrode. This construction makes it possible to prevent the widening of an impurity profile of a channel doped layer 104, and what is more, protect the gate oxide film 102 from contamination produced in a cleaning process after the channel doped ion implantation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a semiconductor device, particularly MIS.
Manufacturing method of the semiconductor device.

[0002]

2. Description of the Related Art At present, MIS type semiconductor devices, particularly MOS type semiconductor devices using silicon as a semiconductor material, have been used for various purposes such as a single semiconductor element and a semiconductor integrated circuit by taking advantage of low power consumption. There is. Among them, especially for semiconductor integrated circuits, higher integration, higher speed,
Miniaturization is required.

Further, in order to form elements in a semiconductor integrated circuit with high uniformity, the threshold voltage is controlled by a method of introducing a conductive impurity using an ion implantation method called channel doping.

As a method of channel doping of a MOS type semiconductor device, conventionally, after forming a gate oxide film, an ion implantation method is used to introduce conductive impurities to adjust the surface impurity concentration and form a polysilicon electrode. It was manufactured by the procedure.

[0005]

However, in order to cope with high integration, high speed, and miniaturization required for semiconductor integrated circuits, the gate oxide film is required to be thin. . As the gate oxide film becomes thinner, the electric field stress applied to the gate oxide film increases, and the characteristics of the gate oxide film become more sensitive to the contamination of the gate oxide film. When channel doping is performed by the conventional procedure, if the photoresist used to separate the ion implantation after the ion implantation is removed with sulfuric acid or the like, the amount of heavy metal contained in the cleaning solution in a trace amount causes the formation of the gate oxide film. Contamination occurs and the breakdown voltage of the gate film decreases.
In order to prevent this, a method of forming a gate oxide film after channel doping can be considered. However, if oxidation is performed after channel doping, the impurity profile of the channel doping layer is widened and it cannot be applied to a fine element.

Accordingly, the present invention provides a method for manufacturing a semiconductor device which does not broaden the impurity profile of the channel dope layer and further protects the gate oxide film from contamination in the cleaning step after the channel dope ion implantation. To aim.

[0007]

In order to solve the problems, a method of manufacturing a semiconductor device according to the present invention comprises: a) a step of forming a gate insulating film; and b) a first polysilicon film for forming a gate electrode. And c) a step of ion-implanting ions for adjusting the threshold voltage of the MOS transistor through the gate electrode film, and d) a second polysilicon film or a silicide film. It is characterized in that it comprises a step of forming on the first polysilicon film, and e) a step of processing the gate electrode film by photolithography etching to form a gate electrode.

[0008]

EXAMPLE A first example of the present invention will be described below. In this embodiment, N using LOCOS isolation for element isolation is used.
A method of manufacturing the channel MOS transistor will be described with reference to FIG.

First, as shown in FIG. 1A, after a LOCOS element isolation film 101 is formed on a P-type substrate 100 having an impurity concentration of 5 × 10 ¹⁶ cm ⁻³ , a gate oxide film 102 having a thickness of 15 nm is formed.
Form. Then, the first polysilicon film 103 is CV
It is formed to 100 nm by the D method. If this film thickness is made too thick, the impurity profile of the channel-doping ion implantation to be performed next will become broad, so care must be taken.

Next, as shown in FIG. 1B, the channel dope layer 10 is formed by ion implantation under the conditions of an acceleration energy of 120 KeV and a dose amount of 3.5 × 10 ¹² cm ^−2.
4 is formed.

Further, as shown in FIG. 1C, a second polysilicon film 1 is formed on the polysilicon film by a CVD method.
No. 05 was deposited 400 nm and phosphorus was diffused by predeposition with phosphorus glass, and sheet resistance was 15Ω.
/ □

Finally, as shown in FIG. 1D, the gate electrode is etched to a channel length of 1 μm to form source / drain diffusion regions 106, an insulating film 107 is formed, and then aluminum wiring 108 is formed. An N-channel MOS transistor having a threshold voltage of 0.8 V can be obtained.

Next, a second embodiment of the present invention will be described below. Also in this embodiment, the LOCO is used for element isolation.
A method of manufacturing an N-channel MOS transistor using S isolation will be described with reference to FIG.

First, as shown in FIG. 2A, after a LOCOS element isolation film 201 is formed on a P-type substrate 200 having an impurity concentration of 5 × 10 ¹⁶ cm ⁻³ , a gate oxide film 202 is formed to a thickness of 15 nm.
Form. Then, a polysilicon film 203 is formed to a thickness of 300 nm by the CVD method, and phosphorus is diffused by predeposition with phosphorus glass to have a sheet resistance of 50Ω / □. As with the embodiment according to claim 1, attention must be paid to the film thickness of this polysilicon film.

Next, as shown in FIG. 2B, the channel dope layer 20 is formed by ion implantation under the conditions of an acceleration energy of 120 KeV and a dose amount of 3.5 × 10 ¹² cm ^−2.
4 is formed.

Further, as shown in FIG. 2C, a molybdenum silicide film 205 is deposited on the polysilicon film by a sputtering method to a thickness of 150 nm. The silicide layer does not have to be molybdenum silicide, and the same effect can be obtained by using any low-resistance silicide such as tungsten silicide.

Finally, as shown in FIG. 2D, the gate electrode is etched to a channel length of 1 μm to form source / drain diffusion regions 206, and after forming an insulating film 207,
By providing the aluminum wiring 208, an N-channel MOS transistor having a threshold voltage of 0.8 V can be obtained.
According to this method, the number of manufacturing steps does not increase as compared with the conventional method of manufacturing a semiconductor device using a polycide gate.

Finally, a third embodiment of the present invention will be described below. In this embodiment, a method of manufacturing an N-channel MOS transistor using LOCOS isolation for element isolation will be described with reference to FIG.

First, as shown in FIG. 3A, after a LOCOS element isolation film 301 is formed on a P-type substrate 300 having an impurity concentration of 5 × 10 ¹⁶ cm ⁻³ , a gate oxide film 302 is formed to a thickness of 15 nm.
Form. Then, the N-type first polysilicon film 303 having a sheet resistance of 100Ω / □ is formed to a thickness of 100 nm by the CVD method.
Form. As with the above two examples, attention must be paid to the first polysilicon film thickness.

Next, as shown in FIG. 3B, the channel dope layer 30 is formed by ion implantation under the conditions of an acceleration energy of 120 KeV and a dose amount of 3.5 × 10 ¹² cm ^−2.
4 is formed.

After the ion implantation, the wafer is washed with sulfuric acid to form a 5 nm natural oxide film 305 on the first polysilicon film as shown in FIG. 3 (C).

Further, as shown in FIG. 3D, a polysilicon film 306 is formed on the natural oxide film by a CVD method.
Deposition is performed to 0 nm, and phosphorus is diffused by predeposition with phosphorus glass to obtain a sheet resistance of 15 Ω / □. At this time, since the diffusion of phosphorus is stopped by the natural oxide film, phosphorus is not diffused in the first polysilicon.

Finally, as shown in FIG. 3E, the gate electrode is etched to a channel length of 1 μm to form source / drain diffusion regions 307, and after forming an insulating film 308,
By providing the aluminum wiring 309, an N-channel MOS transistor having a threshold voltage of 0.8 V can be obtained.

The above three examples have been shown. In all of these three examples, the damage due to the ion implantation can be recovered by annealing using the rapid thermal annealing method such as the lamp annealing before the etching process of the gate electrode. Further improvement of the film quality can be expected.

In this embodiment, an N channel MOS is used.
Although only the transistor has been described, it goes without saying that the same effect can be obtained with a P-channel MOS transistor.

[0026]

According to the method of manufacturing a semiconductor device as described above, since the cleaning liquid does not come into direct contact with the gate oxide film at the time of cleaning after the channel dope ion implantation, high integration can be achieved if it is used at the time of manufacturing an integrated circuit. -As the gate oxide film becomes thinner in accordance with the demand for higher speed and miniaturization, the quality of the gate oxide film does not deteriorate, so a device that is strong against breakdown of the gate oxide film by an electric field can be obtained. Further, since the permeable film for ion implantation can be made thin, the impurity distribution of channel doping does not become broad.

According to the method for manufacturing a semiconductor device according to the third embodiment of the present invention, even if impurities are introduced into polysilicon by the predeposition method, the first polysilicon layer and the second polysilicon layer Since the diffusion of impurities is suppressed by the oxide film between the polysilicon layers, the deterioration of the film quality of the gate oxide film is further suppressed.

[Brief description of drawings]

FIG. 1 is a diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing a second embodiment of the present invention.

FIG. 3 is a diagram showing a third embodiment of the present invention.

[Explanation of symbols]

 100. ． ． P-type substrate 101. ． ． LOCOS element isolation film 102. ． ． Gate oxide film 103. ． ． First polysilicon film 104. ． ． Channel dope layer 105. ． ． Second polysilicon film 106. ． ． Source / drain diffusion region 107. ． ． Insulating film 108. ． ． Aluminum wiring layer 200. ． ． P-type substrate 201. ． ． LOCOS element isolation film 202. ． ． Gate oxide film 203. ． ． Polysilicon film 204. ． ． Channel dope layer 205. ． ． Molybdenum silicide film 206. ． ． Source / drain diffusion region 207. ． ． Insulating film 208. ． ． Aluminum wiring layer 300. ． ． P-type substrate 301. ． ． LOCOS element isolation film 302. ． ． Gate oxide film 303. ． ． First polysilicon film 304. ． ． Channel dope layer 305. ． ． Natural oxide film 306. ． ． Second polysilicon layer 307. ． ． Source / drain diffusion region 308. ． ． Insulating film 309. ． ． Aluminum wiring layer

Claims (6)

[Claims] 1. A method of manufacturing a MOS type semiconductor device, comprising: a) a step of forming a gate insulating film; b) a step of forming a first polysilicon film to serve as a gate electrode; and c) a MOS type transistor. Ion implantation for adjusting the threshold voltage of the second electrode is performed by passing through the gate electrode film, and d) forming a second polysilicon film on the first polysilicon film, e) A step of processing a gate electrode film by photolithography etching to form a gate electrode, the method comprising: 2. A method of manufacturing a MOS type semiconductor device, comprising: a) a step of forming a gate insulating film; b) a step of forming a polysilicon film to serve as a gate electrode; and c) a threshold value of a MOS type transistor. Ion implantation for adjusting the value voltage is performed through the gate electrode film to perform ion implantation, d) a silicide film is formed on the polysilicon film, and e) the gate electrode film is formed by photolithography etching. And a step of forming a gate electrode by processing the above. A method of manufacturing a semiconductor device, comprising: 3. A method of manufacturing a MOS type semiconductor device, comprising: a) a step of forming a gate insulating film; b) a step of forming a first polysilicon gate electrode film; and c) a threshold value of a MOS type transistor. Ion implantation for adjusting the voltage is performed by transmitting ions through the first polysilicon gate electrode film, d) forming an oxide film on the surface of the first polysilicon gate electrode film, and e) 2. A method of manufacturing a semiconductor device, comprising the steps of: forming a polysilicon gate electrode film of 2; and f) introducing a conductive type impurity into the polysilicon gate electrode film by predeposition. 4. The method for manufacturing a semiconductor device according to claim 1, wherein the film thickness of the first polysilicon gate electrode film is 400 nm or less. 5. The method of manufacturing a semiconductor device according to claim 3, wherein the thickness of the oxide film formed on the surface of the first polysilicon gate electrode film is 10 nm or less. 6. A natural oxide film is formed on the surface of the first polysilicon gate electrode film by cleaning with sulfuric acid after the ion implantation for adjusting the threshold voltage. Manufacturing method of semiconductor device.