JPH06204870A - Digital/analog converter with automatic correcting function - Google Patents

Abstract

PURPOSE:To provide a D/A converter with an automatic correcting function capable of automatically correcting an output of a D/A converting circuit. CONSTITUTION:In the D/A converter provided with the automatic correcting function and including a CPU 1, a timing generating circuit 2, a D/A converting circuit 3, and an A/D converting circuit 4, the circuit 3 inputs data corresponding to zero and a span applied from the CPU 1 and converts the inputted data into an analog signal 52 based upon a signal WR generated from the circuit 2, the circuit 4 inputs the D/A converted analog signal 52 and converts the signal 52 into a digital signal based upon a signal RD generated from the circuit 2 and data from the converter 4 are applied as the data of the CPU 1 to automatically correct an error of a circuit output.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a D / A converter for converting digital data into an analog signal, which is provided with an automatic correction function for automatically correcting the D / A conversion output. It is about vessels.

[0002]

2. Description of the Related Art Next, the structure of a conventional D / A converter is shown in FIG. In FIG. 5, 11 is a CPU, 12 is a timing generation circuit, and 13 is a D / A conversion circuit. The data sent from the CPU 11 is converted into an analog signal 15 by the D / A conversion circuit 13 by the signal WR generated by the timing generation circuit 12.

Generally, the D / A conversion circuit 13 has a conversion error. In order to minimize this conversion error, D / A
It is necessary to correct the output of the conversion circuit 13. The operation of correcting the output of the D / A conversion circuit 13 will be described with reference to FIG. FIG. 6 is a flowchart of the correction procedure.

When the D / A conversion circuit 13 is corrected, in FIG. 6, digital data "0" is first sent and the analog signal output 15 at that time is adjusted to a level corresponding to the data. This stage is called offset adjustment.
Then, data corresponding to the full scale of the output is sent, and the analog signal output 15 at that time is adjusted to the full scale level. This stage is called gain adjustment.

Next, digital data "0" is sent, and it is confirmed that the analog signal output 15 at that time is at a level corresponding to the data. This stage is called confirmation.
Here, if the levels are deviated, the steps from the offset adjustment stage are performed again, and the process is repeated until the error is within the predetermined tolerance.

In order to make such a correction, a normal D / A
The conversion circuit 13 includes a variable resistor for offset adjustment and gain adjustment. Alternatively, an amplifier that receives an analog signal has the function.

[0007]

However, generally, the correction of the D / A conversion circuit as shown in FIG. 5 needs to be repeated several times until the error is within the predetermined tolerance, which is very troublesome. Therefore, when there are a plurality of D / A conversion circuits and the outputs thereof are a plurality of channels, there is a drawback that a lot of work time is required.

It is an object of the present invention to provide a D / A converter with an automatic correction function that can automatically correct the output of the D / A conversion circuit.

[0009]

To achieve this object, in the present invention, in a D / A converter with an automatic correction function for converting a digital signal into an analog signal, a first digital signal for offset adjustment is provided. An automatic correction means 1 for outputting a second digital signal for gain adjustment; a D / A conversion circuit 3 for inputting the digital signal from the automatic correction means 1 and converting the digital signal into an analog signal;
The automatic correction means 1 has an A / D conversion circuit 4 for inputting an analog signal converted by the D / A conversion circuit 3 and converting the analog signal into a digital signal. The offset adjustment and the gain adjustment are performed by inputting the first digital signal and the second digital signal which are D / A converted and A / D converted by the conversion circuit 4.

According to the present invention, in a D / A converter with an automatic correction function for converting a digital signal into an analog signal, a first digital signal for offset adjustment and a second digital signal for gain adjustment are provided. The automatic correction means 1 for outputting and a plurality of D / A conversion circuits 3A, 3B, 3C ,. ． ． , 3x
And D / A conversion circuits 3A, 3B, 3C ,. ． ． , An analog signal converted by 3x is input and an A / D conversion circuit 4 for converting this analog signal into a digital signal, and a plurality of D
/ A conversion circuits 3A, 3B, 3C ,. ． ． , 3x output terminals and any one of these output terminals is A / D
A switch 6 connected to the input terminal of the conversion circuit 4,
The automatic correction means 1 includes D / A conversion circuits 3A, 3B, 3C ,. ． ． , 3x and A / D conversion circuit 4
By inputting the first digital signal and the second digital signal which are D / A converted and A / D converted by and, the D / A conversion circuits 3A, 3B, 3C ,. ． ． , 3x
Adjust the offset and gain of.

[0011]

According to the present invention, the automatic correction means 1 converts the first digital signal for offset adjustment into the D / A conversion circuit 3
Output to. The first digital signal is the D / A conversion circuit 3
When converted into an analog signal, it is converted into an analog signal and output. This analog signal is further input to the A / D conversion circuit 4, converted into a digital signal, and input to the automatic correction means 1. When the digital signal converted by the A / D conversion circuit 4 is input, the automatic correction means 1 performs offset adjustment by comparing this digital signal with the previously output first digital signal. Further, the automatic correction means 1 outputs the second digital signal for gain adjustment to the D / A.
Output to the conversion circuit 3. The second digital signal is D / A
When input to the conversion circuit 3, it is converted into an analog signal and output. The analog signal for this gain adjustment is
Further, it is input to the A / D conversion circuit 4, converted into a digital signal, and input to the automatic correction means 1. When this digital signal converted by the A / D conversion circuit 4 is input, the automatic correction means 1 performs gain adjustment by comparing this digital signal with the previously output second digital signal.

According to the present invention, a plurality of D / A conversion circuits D / A conversion circuits 3A, 3B, 3C ,. ． ． , 3x, the D / A conversion circuit 3 and the A / D conversion circuit 4 for performing the offset adjustment and the gain adjustment with the switch 6 are sequentially connected, and the offset adjustment and the gain adjustment are performed by repeating the above process. I do.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the D / A converter with an automatic correction function according to the present invention will be described with reference to FIG.

FIG. 1 shows a D / with automatic correction function according to the present invention.
FIG. 3 is a functional block diagram showing an embodiment of an A converter, and shows a D / A converter 5 with an automatic correction function, which is the most basic configuration of the present invention. D / A converter with automatic correction function 5
Is composed of a CPU 1, a timing generation circuit 2, a D / A conversion circuit 3, and an A / D conversion circuit 4.

The CPU 1 is an automatic correction circuit for automatically correcting the output error of the D / A converter 5 shown in FIG. 1 by performing offset adjustment and gain adjustment. That is, the CPU 1 corrects the output error of the D / A converter 5 by converting the output data x by D = A + B × x by the offset adjustment value (A) and the gain adjustment value (B) obtained by the automatic correction. I do. The CPU 1 is bus-connected to the timing generation circuit 2, the D / A conversion circuit 3, and the A / D conversion circuit 4 by a bus 50.

The timing generation circuit 2 is connected to the D / A conversion circuit 3 by a signal line WR and outputs the signal WR to the D / A conversion circuit 3 via this signal line WR at a predetermined timing. The timing generation circuit 2 is also connected to the A / D conversion circuit 4 by the signal line RD and outputs the signal RD to the D / A conversion circuit 3 via the signal line RD at a predetermined timing.

When the signal WR is input, the D / A conversion circuit 3 converts the digital data input from the CPU 1 via the bus 50 into an analog signal. The analog signal converted by the D / A conversion circuit 3 is output as an output of the D / A converter 5 with an automatic correction function via the signal line 52, and is also input to the A / D conversion circuit 4. The D / A conversion circuit 3 is a D / A conversion circuit whose output signal range is larger than the required output signal range.

When the signal RD is input from the timing generation circuit 2, the A / D conversion circuit 4 receives D / s via the signal line 52.
The A-converted analog signal is input and converted into a digital signal. Then, this digital signal is sent to the CPU 1 via the bus 50.

Next, the operation of the D / A converter 5 with the automatic correction function will be described with reference to the flowcharts of FIGS. 3 and 4. Here, it is assumed that the output value of the A / D conversion circuit 4 has been corrected in advance.

First, the CPU 1 outputs the data x to be output.
According to D = A + B × x, and the D / A conversion circuit 3
Output to. Here, the initial values are A = 0 and B = 1, respectively. Further, the flag FA indicating whether the output error of the D / A conversion circuit is within the predetermined range is set to "0" at this time.

Data x (0) corresponding to the lower limit value S (0) of the output signal range of the analog signal 52 is converted into data d (0) by the CPU 1 and sent to the D / A conversion circuit 3 by the bus 50. . The D / A conversion circuit 3 converts the data d (0) corresponding to the lower limit value S (0) of the output signal range of the analog signal 52 sent from the CPU 1 by the signal WR input from the timing generation circuit 2. Signal line 52
Output to.

The data d (0) output to the signal line 52 is read by the A / D converter 4 and converted again into a digital signal at the timing of the signal RD of the timing generation circuit 2. Then, this data d (0) is output to the bus 50 and input to the CPU 1. When the read data d (0) is different from the data D (0) corresponding to the lower limit value, the CPU 1 subtracts the difference from A as in the following equation and substitutes it in A. A ← A- {d (0) -D (0)} In this way, the offset adjustment value A is calculated.
At this time, the D / A conversion output error | d (0) -D
It is a necessary condition that (0) | becomes less than or equal to a predetermined range Δ. Δ is the resolution of the D / A conversion circuit. Therefore, if this condition is not satisfied, the CPU1
Sets the flag FA = 1 and repeats the above processing.

Next, the data x (FS) corresponding to the upper limit value S (FS) of the output signal range of the analog signal 5 is D = A +.
After being converted by B × x, it is output from the D / A converter 3, and the output is read from the A / D converter 4. Read data d (F
The gain adjustment value B is calculated by substituting the value obtained by dividing the output signal range by the difference between S) and D (0) into B as in the following equation. The value of B before being substituted here is B1. B ← {S (FS) -S (0)} / {d (FS) -D (0)} In the case of gain adjustment, the D / A conversion resolution is | d.
It is a necessary condition that (FS) -D (FS) | be less than or equal to a predetermined range, Δ. Therefore, the flag FB =
If the D / A conversion resolution Δ does not satisfy this condition, the CPU 1 sets the flag FB = 1 and repeats the above processing.

When the gain adjustment value B is calculated, a correction as follows is added to A so that the point where the offset adjustment is performed does not move. A ← A + (B1−B) × x (FS) Offset adjustment and gain adjustment are performed successively. In either case, if new substitution is not necessary, the adjustment ends. The coefficients A and B are stored, and thereafter, the corrected value D is output.

FIG. 2 shows a D / with automatic correction function according to the present invention.
As another embodiment of the A converter, a plurality of D / A conversion circuits 3
It shows a D / A converter 7 with an automatic correction function that includes A to 3X. As shown in Fig. 2, D / A with automatic correction function
The converter 7 includes a switch 6 that is switched and controlled by the timing generation circuit 2, and the switch 6 connects the D / A conversion circuit 3 and the A / D conversion circuit 4 that perform offset adjustment and gain adjustment. Then, each D / A conversion circuit 3A to
By sequentially selecting 3X and performing the processing described above, offset adjustment and gain adjustment are performed for each D / A conversion circuit 3.

[0026]

According to the present invention, the output correction of the D / A conversion circuit can be automatically performed without human intervention. Therefore, even when the D / A conversion circuit has a plurality of channels, the correction work can be performed. The required time is shortened and the work efficiency can be improved.

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an embodiment of a D / A converter with an automatic correction function according to the present invention.

FIG. 2 is a functional block diagram showing another embodiment of the D / A converter with the automatic correction function according to the present invention.

3 is a flowchart illustrating the operation of FIG.

FIG. 4 is a flowchart illustrating the operation of FIG.

FIG. 5 is a configuration diagram of a D / A converter according to a conventional technique.

FIG. 5 is a flowchart illustrating a calibration operation of a D / A converter according to a conventional technique.

[Explanation of symbols]

 1 CPU 2 Timing generation circuit 3 D / A conversion circuit 4 A / D conversion circuit 5.7 D / A converter with automatic correction function 6 Analog switch

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[Procedure amendment]

[Submission date] December 17, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an embodiment of a D / A converter with an automatic correction function according to the present invention.

FIG. 2 is a functional block diagram showing another embodiment of the D / A converter with the automatic correction function according to the present invention.

3 is a flowchart illustrating the operation of FIG.

FIG. 4 is a flowchart illustrating the operation of FIG.

FIG. 5 is a configuration diagram of a D / A converter according to a conventional technique.

FIG. 6 is a flowchart illustrating a calibration operation of a D / A converter according to a conventional technique.

[Explanation of reference symbols] 1 CPU 2 Timing generation circuit 3 D / A conversion circuit 4 A / D conversion circuit 5, 7 D / A converter with automatic correction function 6 Analog switch

Claims (2)

[Claims] 1. A D / A converter with an automatic correction function for converting a digital signal into an analog signal, the automatic correction means outputting a first digital signal for performing offset adjustment and a second digital signal for performing gain adjustment.
(1) and a digital signal from the automatic correction means (1), and a D / A conversion circuit for converting this digital signal into an analog signal
(3) and the analog signal converted by the D / A converter circuit (3) are input,
The A / D conversion circuit (4) for converting this analog signal into a digital signal is provided, and the automatic correction means (1) is a D / A conversion circuit (3) and an A / D conversion circuit (4). First converted and A / D converted
The D / A converter with an automatic correction function, wherein the offset adjustment and the gain adjustment are performed by inputting the digital signal and the second digital signal. 2. A D / A converter with an automatic correction function for converting a digital signal into an analog signal, an automatic correction means for outputting a first digital signal for performing offset adjustment and a second digital signal for performing gain adjustment.
(1) and a plurality of D / A conversion circuits (3A, 3B, 3C, ..., 3x) for inputting a digital signal from the automatic correction means (1) and converting the digital signal into an analog signal, and D A / D conversion circuit (4) that inputs the analog signal converted by the A / A conversion circuit (3A, 3B, 3C, ..., 3x) and converts this analog signal to a digital signal, and multiple D / A A switch (6) that is connected to the output terminals of the conversion circuit (3A, 3B, 3C, ..., 3x) and connects any one of these output terminals to the input terminal of the A / D conversion circuit (4). The automatic correction means (1) is provided with the D / A conversion circuit (3A, 3B, 3C, ..., 3x) and the A / D conversion circuit (4) selected by the switch (6). Offset adjustment and gain adjustment of the D / A conversion circuit (3A, 3B, 3C, ..., 3x) are performed by inputting the converted and A / D converted first and second digital signals. Automatic correction characterized by With the ability D /
A converter.