JPH07162311A - D/a converter circuit - Google Patents

Abstract

PURPOSE:To provide a D/A converter circuit obtained by simply extending the number of bits without expanding its size. CONSTITUTION:Upper ten bits out of digital data consisting of eleven bits are inputted to a 1st D/A converter 1 and the least significant bit(LSB) is inputted to a 2nd D/A converter 2. An adder circuit 3 to be used also as a voltage follower for an output from the 1st D/A converter 1 is constituted of an operational amplifier OP for supplying the output of the 1st D/A converter 1 to its non-inverted input terminal and supplying the output of the 2nd D/A converter 2 to its inverted input terminal through an input resistor R1 and a feedback resistor R2 connected between the inverted input terminal and an output terminal. The output of the 2nd D/A converter 2 is reduced by a voltage dividing ratio determined by the resistors R1, R2 and the reduced voltage is added to the output of the 1st D/A converter 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DA converter circuit.

[0002]

2. Description of the Related Art Conventionally, as a high bit number DA converter circuit, a combination of resistor strings and a CMOS switch has been known. Since this resistor string type DA converter has a high output impedance, it must be received by a high input impedance circuit. For this reason, the output stage is usually provided with a voltage follower circuit using an operational amplifier.

[0003]

The resistance string type DA converter circuit provides high conversion accuracy, but
When the number of bits is increased, the number of resistors is increased, and a large area is required for the resistance when integrated into an IC, so that there is a problem that the IC becomes large. The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a DA converter circuit that easily expands the number of bits without increasing the size.

[0004]

A DA converter circuit according to the present invention comprises a first DA converter to which upper m bits of (m + n) bits of digital data are input, and a lower n bits of the digital data. The second DA converter that is input and the output of the first DA converter are supplied to the non-inverting input terminal, and the second DA converter is input.
An output of the converter is supplied to an inverting input terminal via an input resistance, and an operational amplifier and a feedback resistance connected between the inverting input terminal and the output terminal of the operational amplifier are provided, and the output of the second DA converter is connected to the input resistance. And adding means for dividing the voltage by the ratio of the feedback resistors and adding it to the output of the first DA converter.

[0005]

In the present invention, the operational amplifier constituting the adding means and the feedback resistance portion thereof are the voltage followers themselves used in the ordinary resistance string type DA converter. That is, the present invention expands the number of bits by adding the data signal of the lower n bits to the output of the first DA converter to which m-bit data is input, in the voltage follower receiving the output. (M +
n) It can be said that a bit DA converter circuit is realized.

[0006]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the configuration of an 11-bit DA converter circuit according to an embodiment of the present invention. This converter circuit is used for the upper 10 bits of 11-bit digital data.
It comprises a first DA converter 1 for receiving bit data, a second DA converter 2 for receiving the least significant bit (LSB) data, and an adder circuit 3 for adding outputs of these converters 1, 2 at a predetermined ratio. ing.

The first DA converter 1 is a resistor string type DA converter using CMOS. The second DA converter 2 is composed of one inverter, and outputs a L level output (= 0V) or an H level output (= + 5V) according to LSB "1" or "0". Is.

The adder circuit 3 is composed of an operational amplifier OP. The output of the first DA converter 1 is supplied to the non-inverting input terminal of the operational amplifier OP, and the output of the second DA converter 2 is supplied to the inverting input terminal thereof via the input resistor R1. A feedback resistor R2 is connected between the output terminal and the inverting input terminal of the operational amplifier OP. This adder circuit 3 has the first resistance when the input resistance R1 is assumed to be infinite.
A non-inverting amplifier with a feedback gain of 1, that is, a voltage follower that receives the voltage of the output of the DA converter 1 with a high input impedance and directly guides it to the output terminal.

Input resistance R1 and feedback resistance R2 of the adder circuit 3
Shows the output voltage V2 of the second DA converter 2 at 1
It is a voltage dividing circuit for stepping down the analog voltage corresponding to the LSB of 1-bit data and adding it to the output voltage V1 of the first DA converter 1. Although the addition circuit 3 strictly performs subtraction, since the second DA converter 2 is a 1-bit DA converter using an inverter and data is inverted here, addition is performed as a whole. .

Input resistor R1 and feedback resistor R2 of the adder circuit 3
The relationship will be specifically described as follows. First,
The relationship between the output voltages V1 and V2 of the second DA converters 1 and 2 and the final output voltage V3 is as shown in Equation 1.

[0011]

[Formula 1] V3 = V1 · (R1 + R2) / R1-V2 · R2 / R1

When the minimum step of the output voltage V1 of the first DA converter 1 is ΔV1, the minimum step ΔV3 obtained at the final output terminal by dividing the output voltage V2 of the second DA converter 2 by the resistors R1 and R2. Is the minimum step ΔV1 · (R1 + R2) at the final output end due to ΔV1
Since it has to be 1/2 of / R1, the following relationship of the following equation 2 is obtained.

[0013]

[Expression 2] ΔV3 = V2 · R2 / R1 = ΔV1 · (R1 + R2) / 2R1

Substituting the minimum step ΔV1 of the output voltage V1 of the first DA converter 1 into 2 [mV] and the H level of the output voltage V2 of the second DA converter 2 into 5 [V], and substituting them into Equation 2, The following equation 3 is obtained.

[0015]

[Equation 3] R1 = 4999 × R2

By configuring the adder circuit 3 so as to satisfy the relationship of Expression 3, the output of the second DA converter 2 is added to the output of the first DA converter 1 as an analog voltage corresponding to the LSB of 11 bits of input data. As a result, the 11-bit DA converter is realized.

Also in the normal resistor string type DA converter, the operational amplifier O constituting the adder circuit 3 of FIG.
Since the portion of P and the feedback resistor R2 is necessary as a voltage follower, this embodiment provides an 11-bit DA converter by adding a few elements to the conventional 10-bit DA converter. Compared with the case where the 11-bit DA converter of the normal resistor strings type is configured as an IC, it is not necessary to add a resistor having a large area, and the IC is prevented from becoming large.

FIG. 2 shows a first embodiment of the present invention.
It is a configuration of a 3-bit DA converter circuit. The parts corresponding to those in the embodiment of FIG. 1 are designated by the same reference numerals as those in FIG. The first DA converter 1 is a DA converter that receives upper 10-bit data as in the previous embodiment. The second DA converter 2 is a 3-bit DA converter that receives lower 3-bit data, and includes inverters I1 to I3 to which each bit data is input and R-2R.
It consists of a ladder-type resistor circuit. The ladder resistance circuit is for taking out the output with a constant output impedance R while stepping down the output voltages of the inverters I2 and I3 by 1/2 with respect to the output voltage of the inverter I1.

In the case of this embodiment as well as the previous embodiment,
By the adder circuit 3 using the operational amplifier OP, the first DA
The output voltage V2 of the second DA converter 2 is added to the output voltage V1 of the converter 1 at a predetermined ratio. In this case, the equation corresponding to the equation 2 in the above embodiment becomes the following equation 4 when the output impedance R of the second DA converter 2 is taken into consideration.

[0020]

## EQU00004 ## .DELTA.V3 = V2.R2 / (R1 + R) =. DELTA.V1. (R1 + R2 + R) / 2 (R1 + R)

Similar to the previous embodiment, ΔV1 = 2 [mV]
And The H level of the most significant bit output voltage of the second DA converter 2 is 2.5 due to the existence of the ladder resistance circuit.
Since it is [V], V2 = 2.5 [V] and ΔV1 = 2
Substituting [mV] into Equation 4, the following Equation 5 is obtained. By setting each resistance value so as to satisfy the relationship of the equation 5, a 10-bit DA converter and a 3-bit DA converter are set.
A 13-bit DA converter circuit in which converters are combined can be obtained.

[0022]

[Equation 5] R1 + R = 2499 × R2

[0023]

As described above, according to the present invention, the voltage follower unit of one DA converter is used as an adder circuit to add the outputs of the other DA converters to thereby easily expand the number of bits. The circuit can be obtained.

[Brief description of drawings]

FIG. 1 shows a DA converter circuit according to an embodiment of the present invention.

FIG. 2 shows a DA converter circuit according to another embodiment of the present invention.

[Explanation of symbols]

1 ... 1st DA converter, 2 ... 2nd DA converter, 3 ... addition circuit (voltage follower). OP ... Operational amplifier, R1 ... Input resistance, R2 ... Feedback resistance.

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[Procedure amendment]

[Submission date] January 14, 1994

[Procedure Amendment 1]

[Document name to be corrected] Drawing

[Correction target item name] All drawings

[Correction method] Change

[Correction content]

[Figure 1]

[Fig. 2]

Claims (1)

[Claims] 1. A first DA converter to which upper m bits of the (m + n) -bit digital data are input, a second DA converter to which lower n bits of the digital data are input, and the first DA converter. The output of the DA converter is connected to the non-inverting input terminal, and the output of the second DA converter is connected to the inverting input terminal via the input resistor, and the operational amplifier is connected between the inverting input terminal and the output terminal. Has a feedback resistor,
A DA converter circuit comprising: an addition unit that divides an output of the second DA converter by a ratio of the input resistance and a feedback resistance and adds the divided output to the output of the first DA converter.