JP3107699B2 - Analog / digital converter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a so-called analog / digital converter (hereinafter referred to as A / D converter).
In particular, the present invention relates to a technique for improving an error of a parallel comparison type analog / digital converter.

[0002]

2. Description of the Related Art FIG. 3 shows a comparison part of a conventional parallel conversion type analog / digital converter. The comparison part of the conventional parallel comparison type A / D converter shown in FIG. 3A is a 2-bit A / D converter to simplify the description. FIG. 3 (A)
As shown in (1), the reference voltages V _{RT to} V _RB are resistors whose resistance values and errors are adjusted with high precision (hereinafter, referred to as reference resistors).
And a plurality of reference voltages are generated by the comparator 3
To 5 are input. On the other hand, the analog voltage V _IN which is the signal of the conversion source is compared with these reference voltages by the respective comparators, and a corresponding digital value ('1' or '0') is output. A set of these generated digital values (digital output D) is converted into a digital code (for example, PCM code) by an encoder (not shown) and output from a buffer.

[0003]

However, the above-mentioned conventional A / D converter has a disadvantage that a conversion error becomes large.

[0004] That is, in FIG.
Reference voltage V input to₁, V _Two, V_ThreeThe relationship of V
₁Equation (1) is obtained based on the following equation. Where
Eventually V_RBThe current flowing into_RAnd each of the comparators 3 to 5
Is an input current.

[0005] _{V 1 = V RT V 2 =} V 1 -R (I R + 2I) V 3 = V 1 -R (I R + 2I) -R (I R + I) = V 1 -R (2I R + 3I) = V _RB (1) As can be seen from Expression (1), the input current value I of each comparator affects each reference current. Therefore, even when the reference voltage is constant and there is no error in the reference resistance, each reference voltage fluctuates, and the conversion accuracy of the A / D converter is greatly degraded.

FIG. 3B shows input / output characteristics of a conventional A / D converter. In FIG. 3B, the horizontal axis corresponds to a change in the input analog voltage, and the vertical axis corresponds to a change in the encoded digital code.

Originally, it is ideal that the digital code changes linearly with the conversion of the input analog voltage (broken line in FIG. 3B). However, as shown by the solid line in FIG. 3B, an error occurs in the actual output, which greatly deviates from the ideal characteristic.

In order to reduce the influence, conventionally, a method of correcting the resistance value R of the reference resistors (1, 2) to make the conversion accuracy of the A / D converter close to the ideal characteristic has been adopted.
Relatively reduce the influence of the input current to the reference current I _R is sufficiently large, techniques etc. have been taken.

However, even if the reference resistance is corrected, variations in the current amplification factor _{hFE and the} like of the transistor occur in the manufacture of the IC wafer, and when the reference current is increased, the power consumption of the entire IC increases. In some cases, the correction could not be completed (see the corrected curve in FIG. 3B).

An object of the present invention is to provide an A / D converter with high A / D conversion accuracy while consuming low power.

[0011]

To achieve the above object of the Invention The invention of Claim 1 wherein the plurality of comparing means for referring to the reference voltage obtained from a plurality of voltage dividing point V ₁ ~V ₃ 3 to 5 In the parallel comparison type analog / digital converter which converts an analog voltage into digital data by using the voltage dividing points V _{1 to} V
₃ and the reference voltage input terminal V ₁ of the corresponding comparison means' ~
V ₃ ′ and correction resistance means 6 to 8 for correcting analog / digital conversion characteristics.

According to a second aspect of the present invention, in the analog-to-digital converter of the first aspect, the correction resistance means 6 to 8 comprises:
When viewed from the high potential side, the resistance value is set so as to increase in an arithmetic progression.

Further, in order to facilitate understanding, FIG. 1 shows a principle diagram of a comparison part of the A / D converter of the present invention when the conversion bits are two bits. As shown in FIG. 1, the comparison section 20 of the A / D converter of the present invention has voltage terminals V _RT and V _RB for providing a reference voltage, high-precision resistance characteristics, and a voltage terminal V _RT −V _RB. Reference resistors 1 and 2 for dividing the voltage between them, correction resistors 6 to 8 inserted in series with reference voltage input terminals of comparators 3 to 5, analog voltage V _IN and reference voltage V ₁ ′ to
V ₃ ′.

[0014]

In the configuration of the present invention, assuming that the resistance value of each reference resistor is sufficiently lower than the input resistance of each of the comparators 3 to 5, regardless of the resistance value of each of the correction resistors 6 to 8, The input currents flowing through the correction resistors 6 to 8 can be regarded as substantially equal. This input current is defined as I.

In this case, when the reference voltages V ₂ ′ and V ₃ ′ of the comparators 4 and 5 are represented by the reference voltage V ₁ ′ and the current I of the comparator 3, the following expressions (2) and (3) are obtained. become. here,
The reference current flowing into the reference voltage terminal V _RB is defined as I _R.

[0016] _{V 1 '= V 1 -RI =} V RT -RI V 2' = V 1 -R (I R + 2I) -RI = V 1 -R (I R + 3I) ... (2) V 3 '= V _{1 -R (I R + 2I)} -R (I R + I) -3RI = V 1 -2R (I R + 3I) ... (3) equation (2), as can be seen from (3), the reference of the second term The current relating to the resistance shows the same value at I _R + 3I. This indicates that the reference voltage values V ₁ ′ to V ₃ ′ have a linear relationship. That is, the potential difference between the reference voltages is constant regardless of the magnitude of the input current of the comparator. The same relationship holds even when the number of stages of the comparator (the number of conversion bits) is increased. Note that the correction resistor 6 does not affect the entire voltage regardless of the presence or absence of the resistance value, and thus can be omitted.

FIG. 1B shows the input / output characteristics of the A / D converter in the principle diagram. As shown in FIG.
It is possible to realize an ideal linear conversion characteristic in which the influence of the input current is completely eliminated.

Accordingly, if the resistance values of the reference resistors inserted in series are set by adjusting the arithmetic progression so that the relations of the above equations (2) and (3) hold, the input current of the comparator can be obtained. It can be seen that the reference voltage changes linearly regardless of the magnitude of A / D conversion, and therefore the A / D conversion accuracy also improves.

[0019]

Next, a preferred embodiment of the A / D converter according to the present invention will be described with reference to the drawings. In this embodiment, the present invention is applied to an m-bit A / D converter.

FIG. 2A shows the configuration of the A / D converter 30 according to the embodiment of the present invention. As shown in FIG. 2A, the A / D converter 30 according to the present invention includes a voltage terminal V for applying a reference voltage.
_It has high-precision resistance characteristics of _RT and V _RB, and has a voltage terminal V _RT −
Reference resistors R _O1 , ..., R _{O (M-1)} that divide the voltage between V _RB
When comparator C _1, ..., C _M of the reference voltage correction is inserted in series with the input terminal resistor R _C1, ..., compares the R _CM, and a reference voltage V ₁ ~V _M analog voltage V _IN Comparator C ₁ ,
.., C _M , an encoder circuit 9 for converting the compared and output digital data into a digital code DC which is a PCM code, and a buffer circuit 10 for outputting the encoded digital data.

Next, the operation will be described. Normally, an m-bit parallel comparison type A / D converter requires 2 ^m -1 comparison outputs. For example, the 2-bit A / D converter shown in FIG. 1 has 2 ² -1 = 3 comparison outputs, and the 3-bit A / D converter has 2 ³ -1 = 7 comparison outputs. Requires output. In this embodiment, since the number of conversion bits is m (natural number), the number of stages M of the comparator is 2 ^m -1.

Here, in order to consider how the resistance value should change each time the correction reference resistance increases, a set value of the correction resistance is generally obtained. FIG. 2B shows the nth and _{(n− 1)} th reference resistors R _{O (n− 1)} counted from the high potential side and a correction resistor R _{C (n−1 )} which is a resistor on the input side of the comparator. ₎ And the flow of current near R _Cn . Here, the reference resistors R _{01 to} R 01
_{O (M-1)} has a resistance value of R.

In FIG. 2B, in order to realize the present invention, a correction resistor is set so that the difference between V _{n - 1} ′ and V _n ′, which are input to the comparator, always becomes a constant value. It is only necessary that the value of can be set. For convenience, an m-bit A / D converter is considered here.

R in FIG. 2B_{C (n-1)}And R_CnIn charge of
R_n-1And R_nThen V_n-1’And V
_n’Is V_n-1’= V_n-1-R_n-1・ IV_n’= V_n-R_n・ I = V_n-1-R (I_R+ (2^m-N) I) -R_n・ I From this, the difference between the two comparison inputs is V_n-1'-V_n′ = R (I_R+ (2^m-N) I) + (R_n-R_n-1) I (4) On the other hand, the potential difference between the reference voltages of the comparators is constant.
Then, for example, the correction resistor R _C1= 0, R_C2= R, V₁'-V_Two′ = R (I_R+ (2^m-2) I) -RI = R (I_R+ (2^m-1) I) (5) This potential difference is V_n-1’And V_n’And the potential difference
Is the condition, the equations (4) and (5) show that the correction resistance
The difference in the resistance of the vessel is (R_n-R_n-1) I = R ｛I_R+ (2^m-1) I- (I_R+ (2^m−n) I)｝ = (n−1) R · IR_n-R_n-1= (N-1) R (6)

According to this, for example, a 2-bit A / D
In the converter, the required number of comparator stages is M = 2 ² -1 =
Assuming that the correction resistance value of the first stage is R _C1 = 0, R _C2 = 0 + (2-1) R = R R _C3 = R + (3-1) R = 3R, and the circuit described with reference to FIG. Is the same as the set resistance value.

Accordingly, for example, when the resistance of the first stage is R _O , the n-th set value is an arithmetic series of the initial value R _O , so that R _Cn = (R _O + R) + (R _O ) + ( _R0 + (n-1) R) = (n-1) _R0 + Rn (n-1) / 2 (7) The relationship of Expression (7) is a general expression that can be applied regardless of the number of stages (the number of bits) of the A / D converter.

As described above, according to the present embodiment, if the resistance values of the correction resistors R _{C1 to} R _CM are sequentially obtained in an arithmetic series and set, the linearity of the A / D conversion is obtained and the error is reduced. A / D converter can be provided.

[0028]

As described above, according to the present invention, the correction resistance means for correcting the analog / digital conversion characteristic is provided between the division point of the reference voltage and the corresponding reference voltage input terminal of the comparison means. Therefore, by adjusting the correction resistance value, a highly accurate A / D converter can be provided without increasing the reference current, and the power consumption can be reduced.

Further, if the resistance of the correction resistance means is increased in an arithmetic progression, the linearity of the A / D conversion characteristics can be secured.
In particular, even if the current amplification factor of the transistor or the like constituting the comparator is not constant in manufacturing, the linearity of the A / D conversion characteristic can be easily maintained only by increasing or decreasing the resistance value of the correction resistance means.
High conversion accuracy can be obtained without strictly controlling the variation of the current amplification factor, and it is also possible to contribute to the implementation of an A / D converter as an IC.

[Brief description of the drawings]

FIG. 1 is a principle diagram of an analog / digital converter of the present invention. (A) is a basic circuit diagram of the analog / digital converter of the present invention, and (B) is an input / output characteristic diagram of the analog / digital converter of the present invention.

FIG. 2A is a circuit diagram showing an embodiment of the analog / digital converter of the present invention, and FIG. 2B is a diagram showing a state of a current at an n-th stage.

FIG. 3 is an explanatory diagram showing a conventional analog / digital converter. (A) is a basic circuit diagram of a conventional analog / digital converter, and (B) is an input / output characteristic diagram of the conventional analog / digital converter.

[Explanation of symbols]

1, 2, R _{O1 to} R _{O (M-1)} , R _On , R _{O (n-1)} ... Reference resistors 6 to 8, R _{C1 to} R _CM , R _Cn , R _{C (n-1)} ... Correction resistors 3 to 5, C _{1 to} C _M ... Comparator 9... Encoder circuit 10... Buffer circuit 20... 2 bit A / D converter comparison part 30... M bit A / D converter V _IN . … Digital output DC… Digital code output

────────────────────────────────────────────────── (5) References JP-A-58-138122 (JP, A) JP-A-62-204616 (JP, A) JP-A-4-329713 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H03M 1/00-1/88

Claims (2)

(57) [Claims] 1. A parallel comparison type analog / digital converter for converting an analog voltage into digital data by a plurality of comparing means for referring to the reference voltage obtained from a plurality of voltage dividing point _{(V 1 ~V 3) (3~5} ) The comparison means (3) corresponding to the voltage dividing points (V _{1 to} V ₃ ).
Analog / digital conversion, characterized in that a correction resistor means for correcting the analog / digital conversion characteristic (6-8) between 5) of the reference voltage input terminal (V ₁ '~V _3') vessel. 2. The analog / digital converter according to claim 1, wherein the correction resistance means (6 to 8) is set so that the resistance value increases in an arithmetic progression when viewed from a high potential side.
An analog / digital converter characterized by the above-mentioned.