JPH06196868A - Multilayer printed-wiring board - Google Patents
Multilayer printed-wiring boardInfo
- Publication number
- JPH06196868A JPH06196868A JP4342300A JP34230092A JPH06196868A JP H06196868 A JPH06196868 A JP H06196868A JP 4342300 A JP4342300 A JP 4342300A JP 34230092 A JP34230092 A JP 34230092A JP H06196868 A JPH06196868 A JP H06196868A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- multilayer printed
- printed wiring
- insulating layer
- laminated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体を主とした電子
部品実装用に用いられる多層プリント配線板に関するも
のである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board mainly used for mounting electronic components on semiconductors.
【０００２】[0002]
【従来の技術】図６は多層プリント配線板Ａの従来例を
示すものであり、多層プリント配線基板１の内層や外層
に回路８を設け、多層プリント配線基板１を貫通してス
ルーホール３を設けると共にスルーホール３の内周のス
ルーホールメッキ９で内層回路８ａや外層回路８ｂを導
通接続することによって、多層プリント配線板Ａを形成
するようにしてある。この多層プリント配線板Ａには、
半導体チップ５ａやチップコンデンサ５ｂ等の電子部品
５を搭載すると共にスルーホール３に接続されたランド
４と電子部品５の電極との間に金線等のワイヤー１０を
ボンディングすることによって、電子部品５を実装して
ある。図６において１１は半導体チップ５ａを封止する
封止樹脂である。2. Description of the Related Art FIG. 6 shows a conventional example of a multilayer printed wiring board A, in which a circuit 8 is provided in an inner layer or an outer layer of a multilayer printed wiring board 1 and a through hole 3 is formed through the multilayer printed wiring board 1. The multilayer printed wiring board A is formed by providing the inner layer circuit 8a and the outer layer circuit 8b through conduction through the through hole plating 9 on the inner periphery of the through hole 3. In this multilayer printed wiring board A,
The electronic component 5 is mounted by mounting the electronic component 5 such as the semiconductor chip 5a and the chip capacitor 5b and bonding the wire 10 such as a gold wire between the land 4 connected to the through hole 3 and the electrode of the electronic component 5. Has been implemented. In FIG. 6, 11 is a sealing resin for sealing the semiconductor chip 5a.
【０００３】そして多層プリント配線基板２の表面の絶
縁性は、ソルダーレジストを塗布して確保をするのが一
般的である。The insulation of the surface of the multilayer printed wiring board 2 is generally secured by applying a solder resist.
【０００４】[0004]
【発明が解決しようとする課題】しかし、ソルダーレジ
ストは絶縁性能が十分でなく、半導体等を実装するよう
な高度の絶縁信頼性を要求される分野では信頼性に不安
があった。また、多層プリント配線基板１の表面に放熱
板や部品等を接着する場合、ソルダーレジストは接着剤
との接着性が不十分であると共に多層プリント配線基板
１の表面の回路８に対する接着性も不十分であり、放熱
板等の接着強度を十分に得ることができないという問題
もあった。さらに多層プリント配線板１の表面は回路８
の存在によって凹凸面になっているが、ソルダーレジス
トではこの凹凸がそのまま表面に表れてソルダーレジス
トの表面も凹凸になり、この凹凸によっても放熱板等の
接着強度が不十分になるものであった。However, the insulation performance of the solder resist is not sufficient, and the reliability is uncertain in the field where a high degree of insulation reliability is required such as mounting a semiconductor. In addition, when a heat sink, a component, or the like is attached to the surface of the multilayer printed wiring board 1, the solder resist has insufficient adhesiveness with the adhesive, and the adhesiveness of the surface of the multilayer printed wiring board 1 to the circuit 8 is also poor. It is sufficient, and there is also a problem that the adhesive strength of the heat sink or the like cannot be sufficiently obtained. Further, the surface of the multilayer printed wiring board 1 is a circuit 8
The surface of the solder resist is uneven due to the existence of the solder resist, but the unevenness appears on the surface as it is, and the surface of the solder resist also becomes uneven. .
【０００５】本発明は上記の点に鑑みてなされたもので
あり、表面の絶縁信頼性が高く、しかも放熱板や部品等
の接着強度を高く得ることができる多層プリント配線板
を提供することを目的とするものである。The present invention has been made in view of the above points, and it is an object of the present invention to provide a multilayer printed wiring board which has a high surface insulation reliability and can obtain a high adhesive strength of a heat sink, a component and the like. It is intended.
【０００６】[0006]
【課題を解決するための手段】本発明に係る多層プリン
ト配線板は、多層プリント配線基板１の少なくとも片側
表面に、実装位置を除いてフィルム状又は板状の絶縁層
２を積層して成ることを特徴とするものである。本発明
にあって、多層プリント配線基板１に設けられたスルー
ホール３のランド４表面を被覆するように絶縁層２を積
層するようにするのがよい。A multilayer printed wiring board according to the present invention is formed by laminating a film-shaped or plate-shaped insulating layer 2 except a mounting position on at least one surface of a multilayer printed wiring board 1. It is characterized by. In the present invention, it is preferable that the insulating layer 2 is laminated so as to cover the surface of the land 4 of the through hole 3 provided in the multilayer printed wiring board 1.
【０００７】また本発明にあって、絶縁層２として樹脂
含浸ガラス布２ａ、積層板２ｂ、耐熱性ポリイミドフィ
ルム２ｃを用いることができる。In the present invention, resin-impregnated glass cloth 2a, laminated plate 2b, and heat-resistant polyimide film 2c can be used as the insulating layer 2.
【０００８】[0008]
【作用】多層プリント配線基板１の少なくとも片側表面
に、実装位置を除いて樹脂含浸ガラス布２ａ、積層板２
ｂ、耐熱性ポリイミドフィルム２ｃのようなフィルム状
又は板状の絶縁層２を積層してあるので、これらの絶縁
層２で表面の絶縁性を確保することができる。またこれ
らの絶縁層２は接着性が良好であると共に多層プリント
配線基板１の表面の回路８を被覆して表面を平滑にでき
るために、放熱板等の接着強度を確保することができ
る。Function: The resin-impregnated glass cloth 2a and the laminated plate 2 are provided on the surface of at least one side of the multilayer printed wiring board 1 except for the mounting position.
b, since the film-shaped or plate-shaped insulating layer 2 such as the heat-resistant polyimide film 2c is laminated, the insulating property of the surface can be secured by these insulating layers 2. Further, since these insulating layers 2 have good adhesiveness and can cover the circuit 8 on the surface of the multilayer printed wiring board 1 to make the surface smooth, it is possible to secure the adhesive strength of the heat sink or the like.
【０００９】[0009]
【実施例】以下本発明を実施例によって詳述する。図１
は本発明の一実施例を示すものである。多層プリント配
線基板１はガラス布基材エポキシ樹脂積層板などを絶縁
基材として形成されるものであり、内層や外層に複数層
の回路８が設けてある。また、多層プリント配線基板１
には両面に貫通してスルーホール３を設けると共にスル
ーホール３の内周にスルーホールメッキ９が形成してあ
り、このスルーホールメッキ９で内層回路８ａや外層回
路８ｂを導通接続するようにしてある。さらに多層プリ
ント配線基板１の表面にはスルーホール３の周囲におい
てスルーホールメッキ９と導通されるランド４が設けて
ある。EXAMPLES The present invention will be described in detail below with reference to examples. Figure 1
Shows an embodiment of the present invention. The multilayer printed wiring board 1 is formed by using a glass cloth base material epoxy resin laminated plate or the like as an insulating base material, and a plurality of layers of circuits 8 are provided in an inner layer or an outer layer. In addition, the multilayer printed wiring board 1
Through holes 3 are provided so as to penetrate through both sides, and through hole plating 9 is formed on the inner circumference of the through hole 3. The through hole plating 9 is used to electrically connect the inner layer circuit 8a and the outer layer circuit 8b. is there. Further, on the surface of the multilayer printed wiring board 1, a land 4 is provided around the through hole 3 so as to be electrically connected to the through hole plating 9.
【００１０】そしてこのように形成される多層プリント
配線板１の表面にフィルム状又は板状の絶縁層２が接着
して積層してある。図１の実施例ではガラス布基材にエ
ポキシ樹脂等を含浸して乾燥することによってプリプレ
グとして作成した樹脂含浸ガラス布２ａを絶縁層２とし
て多層プリント配線基板１の片面に接着するようにして
ある。絶縁層２は部品実装位置を除いて多層プリント配
線基板１の表面に積層されるものであり、特に部品実装
に支障がない範囲でスルーホール３のランド４の表面を
被覆するように絶縁層２を積層するようにしてある。A film-shaped or plate-shaped insulating layer 2 is adhered and laminated on the surface of the multilayer printed wiring board 1 thus formed. In the embodiment of FIG. 1, a glass cloth base material is impregnated with an epoxy resin or the like and dried, and a resin-impregnated glass cloth 2a formed as a prepreg is bonded as an insulating layer 2 to one surface of the multilayer printed wiring board 1. . The insulating layer 2 is laminated on the surface of the multilayer printed wiring board 1 except for the mounting position of the component, and the insulating layer 2 covers the surface of the land 4 of the through-hole 3 within a range that does not particularly hinder the mounting of the component. Are laminated.
【００１１】このように多層プリント配線基板１の表面
に絶縁層２を積層することによって作成される多層プリ
ント配線板Ａにあって、その表面に半導体チップ５ａや
チップコンデンサ５ｂ等の電子部品５を搭載すると共に
ランド４と電子部品５の電極との間に金線等のワイヤー
１０をボンディングしたり、半田１２付けしたりするこ
とによって、電子部品５を実装することができるもので
あり、さらに半導体チップ５ａを封止樹脂１１で封止す
るようにしてある。このものにあって、絶縁性能の高い
樹脂含浸ガラス布２ａを絶縁層２として多層プリント配
線基板１の表面を被覆してあるために、多層プリント配
線板Ａの表面の絶縁信頼性を高く得ることができるもの
である。また樹脂含浸ガラス布２ａはその接着面で多層
プリント配線基板１の回路８による凹凸を吸収して多層
プリント配線板Ａの表面を平滑な面にすることができる
ものである。In the multilayer printed wiring board A produced by laminating the insulating layer 2 on the surface of the multilayer printed wiring board 1 as described above, the electronic components 5 such as the semiconductor chip 5a and the chip capacitor 5b are provided on the surface thereof. The electronic component 5 can be mounted by mounting and mounting a wire 10 such as a gold wire or solder 12 between the land 4 and the electrode of the electronic component 5, and further, a semiconductor. The chip 5a is sealed with the sealing resin 11. In this case, since the surface of the multilayer printed wiring board 1 is covered with the resin-impregnated glass cloth 2a having high insulation performance as the insulating layer 2, it is possible to obtain high insulation reliability of the surface of the multilayer printed wiring board A. Is something that can be done. Further, the resin-impregnated glass cloth 2a can absorb unevenness due to the circuit 8 of the multilayer printed wiring board 1 at its adhesive surface to make the surface of the multilayer printed wiring board A smooth.
【００１２】図２は本発明の他の実施例を示すものであ
り、この実施例では多層プリント配線基板１の両面にそ
れぞれ絶縁層２として積層板２ｂを接着することによっ
て、部品実装位置を除いて多層プリント配線基板１の表
面を絶縁するようにしてある。積層板２ｂとしてはガラ
ス布基材エポキシ樹脂積層板などを用いることができる
ものであり、積層板２ｂは絶縁性能が高く多層プリント
配線板Ａの表面の絶縁信頼性を高く得ることができるも
のである。また積層板２ｂは剛体でありしかも表面平滑
に形成されているために、多層プリント配線基板１の回
路８による凹凸に影響されることなく多層プリント配線
板Ａの表面を平滑な面に形成することができるものであ
る。FIG. 2 shows another embodiment of the present invention. In this embodiment, a laminated board 2b as an insulating layer 2 is adhered to both surfaces of a multilayer printed wiring board 1 to remove the component mounting positions. The surface of the multilayer printed wiring board 1 is insulated. A glass cloth-based epoxy resin laminated plate or the like can be used as the laminated plate 2b, and the laminated plate 2b has high insulation performance and can obtain high surface insulation reliability of the multilayer printed wiring board A. is there. Further, since the laminated board 2b is a rigid body and has a smooth surface, it is possible to form the surface of the multilayer printed wiring board A on a smooth surface without being affected by the unevenness of the circuit 8 of the multilayer printed wiring board 1. Is something that can be done.
【００１３】図３の実施例では、多層プリント配線基板
１に設けたスルーホール３に端子ピン１３の基部を埋入
することによって、この端子ピン１３の先部を多層プリ
ント配線基板１の下側表面から突出させてあり、また多
層プリント配線基板１の中央部に開口部１４を設けてあ
る。多層プリント配線基板１の上側表面の中央部に金属
板等で作成される放熱板６が接着してあり、放熱板６に
よってこの開口部１４の上面を塞ぐようにしてある。そ
してスルーホール３の上面の開口を塞ぐように多層プリ
ント配線基板１の上側表面に絶縁層２として積層板２ｂ
を接着することによって、多層プリント配線基板１の表
面、特にスルーホール３の上面開口の絶縁性を確保する
ようにしてある。このように形成される多層プリント配
線板Ａにあって、開口部１４内において放熱板６の表面
に半導体チップ５ａ等の電子部品５を搭載し、回路８の
開口部１４内に露出する端部であるインナーリード部８
ｃと電子部品５の電極とをワイヤー１０でボンディング
して、電子部品５を端子ピン１３に回路８を介して導通
接続するように実装をおこない、さらに開口部１４の下
面をリッド１５で封じることによって、ＰＧＡ型半導体
装置として形成することができるものである。In the embodiment shown in FIG. 3, the base of the terminal pin 13 is embedded in the through hole 3 provided in the multilayer printed wiring board 1 so that the tip of the terminal pin 13 is located below the multilayer printed wiring board 1. It is projected from the surface, and an opening 14 is provided at the center of the multilayer printed wiring board 1. A heat radiating plate 6 made of a metal plate or the like is bonded to the central portion of the upper surface of the multilayer printed wiring board 1, and the heat radiating plate 6 closes the upper surface of the opening 14. A laminated board 2b is formed as an insulating layer 2 on the upper surface of the multilayer printed wiring board 1 so as to close the opening on the upper surface of the through hole 3.
Is adhered to ensure the insulation of the surface of the multilayer printed wiring board 1, especially the upper surface opening of the through hole 3. In the multilayer printed wiring board A thus formed, the electronic component 5 such as the semiconductor chip 5a is mounted on the surface of the heat dissipation plate 6 in the opening 14, and the end portion exposed in the opening 14 of the circuit 8. Inner lead part 8 which is
c and the electrode of the electronic component 5 are bonded by the wire 10, the electronic component 5 is mounted so as to be electrically connected to the terminal pin 13 through the circuit 8, and the lower surface of the opening 14 is sealed with the lid 15. Can be formed as a PGA type semiconductor device.
【００１４】図４の実施例では、多層プリント配線基板
１の上側の表面に開口部１４を除くほぼ全面に亘って絶
縁層２として積層板２ｂを接着して積層してあり、この
積層板２ｂの表面において放熱板６を接着するようにし
てある。積層板２ｂは表面が平滑面に形成されており、
しかも積層板２ｂは接着剤との接着性が良好であるの
で、放熱板６を高い接着強度で多層プリント配線基板１
に接着することができるものである。またスルーホール
３は絶縁層２によって塞がれて絶縁されており、放熱板
６とスルーホール３との間の絶縁をこの絶縁層２で確保
してスルーホール３と短絡することを防止することがで
きるものである。そしてこの実施例では、多数個のベア
チップ５ｃをアルミナ基板１６に実装して作成したマル
チチップモジュール５ｄを放熱板６に搭載して実装する
ようにしてあり、ＭＣＭ（マルチチップモジュール）実
装用ＰＧＡ型半導体装置として形成するようにしてあ
る。In the embodiment shown in FIG. 4, a laminated board 2b is adhered and laminated as an insulating layer 2 on the upper surface of the multilayer printed wiring board 1 over almost the entire surface except the opening 14, and the laminated board 2b is formed. The heat sink 6 is adhered to the surface of the. The laminated plate 2b has a smooth surface,
In addition, since the laminated board 2b has good adhesiveness with the adhesive, the heat dissipation plate 6 can be attached to the multilayer printed wiring board 1 with high adhesive strength.
It can be glued to. Further, the through hole 3 is blocked and insulated by the insulating layer 2, and the insulation between the heat sink 6 and the through hole 3 is secured by this insulating layer 2 to prevent short circuit with the through hole 3. Is something that can be done. In this embodiment, the multi-chip module 5d prepared by mounting a large number of bare chips 5c on the alumina substrate 16 is mounted on the heat dissipation plate 6 to be mounted, and the MGA (multi-chip module) mounting PGA type is mounted. It is formed as a semiconductor device.
【００１５】図５の実施例では、多層プリント配線基板
１の上側の表面に中央部の開口１４の部分と周辺部を除
いて絶縁層２として耐熱性ポリイミドフィルム２ｃが接
着して積層してあり、この積層板２ｂの表面において放
熱板６を接着するようにしてある。耐熱性ポリイミドフ
ィルム２ｃは接着剤との接着性が良好であると共に表面
を平滑面に形成できるので、放熱板６を高い接着強度で
多層プリント配線基板１に接着することができるもので
ある。また多層プリント配線基板１の上面に設けた回路
８の外側端部はアウターリード部８ｄとして絶縁層２の
外側に露出させてあり、リードフレームのリード１７が
アウターリード部８ｄに半田付け等して接続してある。
そしてこの実施例では開口部１４内において放熱板６に
半導体チップ５ａ等の電子部品５を搭載し、開口部１４
内に露出するインナーリード部８ｃと電子部品５の電極
とをワイヤー１０でボンディングして電子部品５とリー
ド１７とを回路８を介して導通接続するように実装をお
こなうことによって、ＱＦＰ型半導体装置として形成す
ることができるものである。In the embodiment of FIG. 5, a heat-resistant polyimide film 2c is adhered and laminated as an insulating layer 2 on the upper surface of the multilayer printed wiring board 1 except for the central opening 14 and the peripheral portion. The heat dissipation plate 6 is adhered to the surface of the laminated plate 2b. Since the heat-resistant polyimide film 2c has good adhesiveness with an adhesive and can be formed with a smooth surface, the heat dissipation plate 6 can be adhered to the multilayer printed wiring board 1 with high adhesive strength. The outer end of the circuit 8 provided on the upper surface of the multilayer printed wiring board 1 is exposed to the outside of the insulating layer 2 as an outer lead portion 8d, and the lead 17 of the lead frame is soldered to the outer lead portion 8d. It is connected.
In this embodiment, the electronic component 5 such as the semiconductor chip 5a is mounted on the heat dissipation plate 6 inside the opening 14,
By mounting the inner lead portion 8c exposed inside and the electrode of the electronic component 5 with the wire 10 so as to electrically connect the electronic component 5 and the lead 17 through the circuit 8, the QFP type semiconductor device is mounted. Can be formed as.
【００１６】[0016]
【発明の効果】上記のように本発明は、多層プリント配
線基板の少なくとも片側表面に、実装位置を除いて樹脂
含浸ガラス布、積層板、耐熱性ポリイミドフィルムのよ
うなフィルム状又は板状の絶縁層を積層したので、これ
らの絶縁層で多層プリント配線基板の表面の絶縁性を確
保することができ、表面の絶縁信頼性を高く得ることが
できるものであり、しかもこれらの絶縁層は接着性が良
好であると共に多層プリント配線基板の表面の回路を被
覆して表面を平滑にでき、放熱板や部品等の接着強度を
高く得ることができるものである。As described above, according to the present invention, a resin-impregnated glass cloth, a laminated plate, a film-shaped or plate-shaped insulating material such as a heat-resistant polyimide film is formed on at least one surface of a multilayer printed wiring board except the mounting position. Since the layers are laminated, the insulating properties of the surface of the multilayer printed wiring board can be ensured by these insulating layers, and it is possible to obtain high surface insulation reliability. Moreover, these insulating layers are adhesive. In addition to being good, the circuit on the surface of the multilayer printed wiring board can be covered to make the surface smooth, and the adhesive strength of the heat dissipation plate, parts, etc. can be increased.
【図１】本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.
【図２】本発明の他の実施例の断面図である。FIG. 2 is a sectional view of another embodiment of the present invention.
【図３】本発明のさらに他の実施例の断面図である。FIG. 3 is a cross-sectional view of yet another embodiment of the present invention.
【図４】本発明のさらに他の実施例の断面図である。FIG. 4 is a sectional view of still another embodiment of the present invention.
【図５】本発明のさらに他の実施例の断面図である。FIG. 5 is a sectional view of still another embodiment of the present invention.
【図６】従来例の断面図である。FIG. 6 is a sectional view of a conventional example.
１ 多層プリント配線基板 ２ 絶縁層 ３ スルーホール ４ ランド ５ 電子部品 1 Multilayer printed wiring board 2 Insulating layer 3 Through hole 4 Land 5 Electronic component
Claims (5)
表面に、実装位置を除いてフィルム状又は板状の絶縁層
を積層して成ることを特徴とする多層プリント配線板。1. A multilayer printed wiring board, comprising a film-shaped or plate-shaped insulating layer laminated on at least one surface of the multilayer printed wiring board except for a mounting position.
ーホールのランド表面を被覆するように絶縁層を積層し
て成ることを特徴とする多層プリント配線板。2. A multilayer printed wiring board, comprising: an insulating layer laminated so as to cover a land surface of a through hole provided in the multilayer printed wiring board.
を特徴とする請求項１又は２に記載の多層プリント配線
板。3. The multilayer printed wiring board according to claim 1, wherein the insulating layer is made of resin-impregnated glass cloth.
る請求項１又は２に記載の多層プリント配線板。4. The multilayer printed wiring board according to claim 1, wherein the insulating layer is a laminated board.
成ることを特徴とする請求項１又は２に記載の多層プリ
ント配線板。5. The multilayer printed wiring board according to claim 1, wherein the insulating layer is made of a heat resistant polyimide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4342300A JPH06196868A (en) | 1992-12-22 | 1992-12-22 | Multilayer printed-wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4342300A JPH06196868A (en) | 1992-12-22 | 1992-12-22 | Multilayer printed-wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06196868A true JPH06196868A (en) | 1994-07-15 |
Family
ID=18352663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4342300A Withdrawn JPH06196868A (en) | 1992-12-22 | 1992-12-22 | Multilayer printed-wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06196868A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6780493B2 (en) | 1997-07-16 | 2004-08-24 | Matsushita Electric Industrial Co., Ltd. | Wiring board and a process of producing a wiring board |
| JP2014222739A (en) * | 2013-05-14 | 2014-11-27 | パナソニック株式会社 | Printed wiring board and substrate module |
-
1992
- 1992-12-22 JP JP4342300A patent/JPH06196868A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6780493B2 (en) | 1997-07-16 | 2004-08-24 | Matsushita Electric Industrial Co., Ltd. | Wiring board and a process of producing a wiring board |
| JP2014222739A (en) * | 2013-05-14 | 2014-11-27 | パナソニック株式会社 | Printed wiring board and substrate module |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000307 |