JPH06188965A - Dtmf signal generating circuit - Google Patents

Abstract

PURPOSE:To output an accurate DTMF signal by omitting a pre-emphasis circuit adjusting a pseudo sine wave so as to have a prescribed frequency setting level thereby preventing the production of waveform distortion due to the effect of the said pre-emphasis circuit. CONSTITUTION:When a reference clock signal CK0 is generated from an oscillation circuit 11, the reference clock signal CK0 is frequency-divided by frequency dividers 13-1, 13-2 and the clock signal subject to frequency division is counted by programmable counters 14-1, 14-2 and sine wave circuits 15-1, 15-2 generate a pseudo sine wave signal being a digital signal based on the count. The output level of the generated pseudo sine wave signal is adjusted by attenuators 16-1, 16-2 and the signals are added by an adder 17 and converted into a DTMF signal being an analog signal at a D/A converter 18.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to a telephone or the like in mobile communication such as a car telephone or a mobile telephone.
(Dual Tone Multi Frequency) Signal generation circuit.

[0002]

2. Description of the Related Art Conventionally, as a technique in such a field,
For example, there is one described in Japanese Patent Laid-Open No. 4-35342. Conventionally, as a DTMF signal generation circuit for generating a DTMF signal, one that automatically sets the DTMF signal to a constant output level, prevents the generation of a direct current (DC) offset voltage, and maintains the symmetry of a symmetrical waveform. Each one is proposed.

On the other hand, when such a DTMF signal generation circuit is applied as a selection signal transmission circuit for a mobile phone, a mobile phone, etc. of a mobile communication system, pre-emphasis for emphasizing a high frequency signal on the transmission side is provided. Done. An example thereof is shown in FIG. FIG. 2 is a functional block diagram of the conventional DTMF signal generation circuit described in the above document. This DTMF signal generation circuit includes an oscillation circuit 1 that generates a reference clock signal CK ₀ and a control circuit 2 that outputs a control signal CS for frequency determination. On the output side of the oscillator circuit 1, frequency dividers 3-1 and 3-2 controlled by the control signal CS and address counters 4-1 and 4- are provided.
2 and sine wave ROM (Read Only Memory) table 5
-1, 5-2 are connected. An adder 6 is connected to the output sides of the sine wave ROM tables 5-1 and 5-2, and a pre-emphasis circuit 7 operating with a clock signal CK and a digital / analog converter are connected to the output side of the adder 6. (Hereinafter referred to as a D / A converter) 8 is connected.

[0004] In DTMF signal generating circuit of this kind, when the reference clock signal CK ₀ is outputted from the oscillation circuit 1, minute in a predetermined frequency the reference clock signal CK ₀ is frequency divider 3-1, 3-2 After being rotated, the address counters 4-1 and 4
-2 is sent. The address counters 4-1 and 4-2 are
For example, it operates as a hexadecimal counter and sequentially designates the addresses of the sine wave ROM tables 5-1 and 5-2 which store the pseudo sine wave data. Then, the sine wave ROM table 5
Pseudo-sine wave digital data is output from -1, 5-2, added by the adder 6, and then adjusted by the pre-emphasis circuit 7 so as to reach the set level of each frequency. The data adjusted by the pre-emphasis circuit 7 is converted into an analog sine wave by the D / A converter 8, and D
It is output as a TMF signal. In this type of DTMF signal generation circuit, the pseudo sine wave after addition by the adder 6 is the hexadecimal address counters 4-1 and 4-2 on the preceding stage side.
Is output as a gradation wave. This gradation wave has a drawback that if it is not synchronized with the clock signal CK input to the pre-emphasis circuit 7, it will have a different distorted waveform when the frequency is set by the pre-emphasis circuit 7. is there. Therefore, in the technique of the above document, the frequency dividers 3-1 and 3-2, the address counters 4-1 and 4-2, and the sine wave ROM tables 5-1 and 5 are used.
-2 and the pre-emphasis circuit 7 are synchronized with each other by a synchronization signal to prevent the occurrence of waveform distortion when setting the output frequency.

[0005]

However, although the conventional DTMF signal generation circuit can prevent the generation of the waveform distortion when setting the output frequency, the pseudo sine wave after addition by the adder 6 is a pre-emphasis circuit. After passing 7, the waveform is distorted differently (especially below 1KHz).
If such waveform distortion of 1 KFz or less occurs, accurate DT
It has been difficult to obtain a DTMF signal generation circuit that is technically sufficiently satisfactory because it cannot output an MF signal. The present invention has the following problems with the conventional technology.
The present invention provides a DTMF signal generation circuit that solves the problem that when a pseudo sine wave after addition by an adder passes through a pre-emphasis circuit, waveform distortion occurs and an accurate DTMF signal cannot be output.

[0006]

In order to solve the above problems, the present invention provides a DTMF signal generating circuit for generating a DTMF signal designated by control means for outputting a control signal for frequency determination, And a second frequency data output means for outputting a first frequency data based on the reference clock signal, the second frequency data being controlled by the control signal and outputting a second frequency data based on the reference clock signal. And output means. Further, a first attenuator that adjusts the level of the first frequency data based on the control signal, and a second attenuator that adjusts the level of the second frequency data based on the control signal.
Attenuator, and an adding means for adding the outputs of the first and second attenuators, and an output of the adding means by D /
A D / A converter that A-converts and outputs a DTMF signal
It is provided.

[0007]

According to the present invention, since the DTMF signal generation circuit is constructed as described above, the first and second frequency data are respectively output from the first and second frequency data output means controlled by the control signal. When output, the levels of the first and second frequency data are adjusted by the first and second attenuators and then added by the adding means, and the addition result is D / A.
It is converted into an analog signal by the converter and a DTMF signal is output. Since this circuit does not use a pre-emphasis circuit as in the prior art, it is possible to prevent the occurrence of waveform distortion due to the influence of the pre-emphasis circuit. Therefore, the above problem can be solved.

[0008]

1 is a functional block diagram of a DTMF signal generation circuit showing an embodiment of the present invention.

This DTMF signal generating circuit is, for example, 1 MHz.
An oscillation circuit 11 such as a crystal oscillator that oscillates a high frequency reference clock signal CK ₀ such as z, and a control signal CS for frequency determination.
And a control circuit 12 which is a control means for outputting On the output side of the oscillation circuit 11, the first frequency data controlled by the control signal CS (for example, the sine wave signal on the high group side)
And a second frequency data output means for outputting second frequency data (for example, a low group side sine wave signal) controlled by the control signal CS are connected to each other. ing.

The first frequency data output means is composed of a frequency divider 13-1, a programmable counter 14-1, a sine wave circuit 15-1, and a first attenuator 16-, which are cascade-connected to the output side of the oscillator circuit 11. It is composed of 1. Similarly, the second frequency data output means is the frequency divider 13-2,
Programmable counter 14-2, sine wave circuit 15-
2 and a second attenuator 16-2. Each of the frequency dividers 13-1 and 13-2 is a circuit that divides the reference clock signal CK ₀ at a frequency division ratio set by the control signal CS and supplies it to the programmable counters 14-1 and 14-2. Each programmable counter 14-1, 14-2
Is a circuit that counts the output clock signals of the frequency dividers 13-1 and 13-2 based on the count value set by the control signal CS and gives the count value to the sine wave circuits 15-1 and 15-2. . The sine wave circuits 15-1 and 15-2 are
Controlled by the control signal CS, for example, the power supply voltage is divided into 16 and programmable counters 14-1, 14-
It is a circuit that sequentially selects the divided power supply voltages one by one at the timing set in 2, generates a pseudo sine wave (digital signal), and supplies it to the attenuators 16-1 and 16-2. Each attenuator 16-1, 16-2
Is a circuit that adjusts the output level of the sine wave of a constant level generated by the sine wave circuits 15-1 and 15-2, according to the frequency set by the control signal CS. An adder 17, which is addition means, is connected to the output side of the first and second frequency data output means thus configured, that is, the output side of the attenuators 16-1 and 16-2, and the output side thereof is connected. D / A
The converter 18 is connected. The adder 17 electrically adds the high group side sine wave signal output from the first attenuator 16-1 and the low group side sine wave signal output from the second attenuator 16-2. And the addition result is D
This is a circuit to be applied to the / A converter 18. D / A converter 18
Is a circuit for converting the pseudo sine wave signal output from the adder 17 into an analog DTMF signal.

FIG. 3 shows each attenuator 16-in FIG.
It is a circuit diagram which shows the structural example of 1 and 16-2. This attenuator includes an amplifier AMP, an input resistor R1 connected to the (−) side input terminal of the amplifier AMP, and the amplifier AMP.
And a feedback resistor R2 connected between the (−) side input terminal and the output terminal. The resistance ratio of the input resistance R1 and the feedback resistance R2 is variable by the control signal CS. For example, the added resistance value R of the resistors R1 and R2
Assuming that 1 + R2 = 100 KΩ is constant, their resistance R
By changing the resistance values of 1 and R2, an output voltage level R2 / R1 times the input voltage level can be obtained. Next, the operation will be described. In the control circuit 12 of FIG. 1, the frequency of the DTMF signal to be output is selected, and the selected information is used as a control signal CS for frequency dividers 13-1 and 13-2, programmable counters 14-1 and 14-2, and sine. Wave circuits 15-1 and 15-2, and first and second attenuators 1
It gives to 6-1 and 16-2. From the oscillation circuit 11, for example, 1MHz reference clock signal CK ₀ of occurs, the clock signal CK ₀ is divided by the frequency divider 13-1 and 13-2 division ratio by the control signal CS is set . The clock signals divided by the frequency dividers 13-1 and 13-2 are counted by the programmable counters 14-1 and 14-2 whose count values are set by the control signal CS, and the count values are sine wave circuits. It is sent to 15-1 and 15-2. In each of the sine wave circuits 15-1 and 15-2, based on the control signal CS, the 16-divided power supply voltage is sequentially selected one by one at the timing set by the programmable counters 14-1 and 14-2, and digitally selected. A pseudo sine wave, which is a signal, is generated, and the pseudo first sinusoidal wave is generated by the first and second attenuators 16-1, 1.
Send to 6-2. Each attenuator 16-1, 16- of FIG.
In 2, the output level of the pseudo sine wave generated by the sine wave circuits 15-1 and 15-2 is adjusted by the resistance ratio of the resistors R1 and R2 set by the control signal CS. The two sine wave signals on the high group side and the low group side, whose output levels have been adjusted by the first and second attenuators 16-1 and 16-2, are added by the adder shown in FIG. It is converted into an analog signal by the D / A converter 18 and output as a DTMF signal.

This embodiment has the following advantages. (A) Before adding the pseudo sine wave signals generated by the sine wave circuits 15-1 and 15-2 by the adder 17, the attenuators 16-1 and 16-2 adjust the output level. After the adjustment result is added by the adder 17, D / A
The converter 18 converts the analog signal. for that reason,
Since it does not pass through the conventional pre-emphasis circuit 7 shown in FIG. 2, it is possible to prevent the occurrence of waveform distortion of, for example, 1 KHz or less due to the influence of the pre-emphasis circuit 7, and to obtain accurate DTMF.
Can output signals. (B) Conventionally, in order to prevent the occurrence of waveform distortion when setting the output frequency, it was necessary to synchronize the first and second frequency data output means with the pre-emphasis circuit 7. In the example, since the pre-emphasis circuit 7 is not provided, it is not necessary to establish such synchronization. for that reason,
The DTMF signal generation circuit can be configured with a simple circuit configuration without waveform distortion when setting the output frequency. The present invention is not limited to the above embodiment, and various modifications can be made. For example, in FIG. 3, each attenuator 16-1,
Although 16-2 is configured by using an inverting amplifier whose resistance ratio can be changed, it may be configured by another circuit.

[0013]

As described above in detail, according to the present invention, the output levels of the first and second frequency data output from the first and second frequency data output means are set to the first and second output levels. After adjusting each with 2 attenuators, add with adder and convert into analog DTMF signal with D / A converter, so it is possible to prevent waveform distortion due to the influence of the pre-emphasis circuit as in the past. Accurate DTMF
It becomes possible to output a signal. Moreover, since a pre-emphasis circuit as in the conventional case is not provided, the pre-emphasis circuit and the first and second frequency data output means are synchronized with each other in order to prevent the occurrence of waveform distortion when setting the output frequency. Even if it does not exist, such a waveform distortion does not occur, and the DTMF signal generation circuit can be configured with a simple circuit configuration.

[Brief description of drawings]

FIG. 1 is a functional block diagram of a DTMF signal generation circuit showing an embodiment of the present invention.

FIG. 2 is a functional block diagram of a conventional DTMF signal generation circuit.

FIG. 3 is a circuit diagram showing a configuration example of an attenuator in FIG.

[Explanation of symbols]

 11 oscillator circuit 13-1, 3-2 frequency divider 14-1, 14-2 programmable counter 15-1, 15-2 sine wave circuit 16-1, 16-2 first and second attenuator 17 adder 18 D / A converter

Claims (1)

[Claims] 1. A DTMF signal generation circuit for generating a DTMF signal designated by control means for outputting a control signal for frequency determination, comprising: a first DTMF signal controlled by the control signal based on a reference clock signal.
First frequency data output means for outputting the frequency data, second frequency data output means for outputting the second frequency data controlled by the control signal based on the reference clock signal, and based on the control signal A first attenuator that adjusts the level of the first frequency data, a second attenuator that adjusts the level of the second frequency data based on the control signal, and the outputs of the first and second attenuators are added. And an output of the adding means is digital-to-analog converted to D.
A DTMF signal generation circuit, comprising: a digital / analog converter that outputs a TMF signal.