JPH0617245U - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0617245U JPH0617245U JP053618U JP5361892U JPH0617245U JP H0617245 U JPH0617245 U JP H0617245U JP 053618 U JP053618 U JP 053618U JP 5361892 U JP5361892 U JP 5361892U JP H0617245 U JPH0617245 U JP H0617245U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- cooling medium
- silicon substrate
- cooling
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Abstract
(57)【要約】
【目的】 半導体デバイスの冷却能力を飛躍的に向上す
るものである。
【構成】 半導体チップ７のシリコン基板７Ａの裏面
に、エッチングにより凹部７Ｂを形成して、回路部分の
シリコン基板７Ａの厚さを薄くすると共に、この凹部７
Ｂを冷却媒体の通路の一部とするものである。
(57) [Abstract] [Purpose] This is to dramatically improve the cooling capacity of semiconductor devices. [Structure] A recess 7B is formed on the back surface of the silicon substrate 7A of the semiconductor chip 7 by etching to reduce the thickness of the silicon substrate 7A in the circuit portion and the recess 7B.
B is a part of the passage of the cooling medium.
Description
【０００１】[0001]
本考案は、冷却能力を向上することが可能な半導体デバイスに関するものであ る。 The present invention relates to a semiconductor device capable of improving cooling capacity.
【０００２】[0002]
従来、この種の半導体デバイス、特に電力用半導体デバイスは、ヒートシンク を密着固定して空冷している。また、発熱量の大きい半導体デバイスでは、図２ に示すように、冷却媒体による冷却が行なわれている。図において、１はシリコ ン基板１Ａ上に所定の回路部を形成した半導体チップ、２Ａおよび２Ｂはこの半 導体チップ１の外部端子、３はこの半導体チップ１がねじ４Ａおよび４Ｂにより 一体に固定されたヒートシンク、５Ａおよび５Ｂは半導体チップ１を冷却するた め、冷却媒体を矢印のように流すためのパイプ、６Ａおよび６Ｂはこのパイプ４ Ａおよび４Ｂをそれぞれヒートシンク３に接続固定するコネクタである。 Conventionally, this type of semiconductor device, particularly a power semiconductor device, is air-cooled by closely fixing a heat sink. Further, in a semiconductor device that generates a large amount of heat, as shown in FIG. 2, cooling is performed by a cooling medium. In the figure, 1 is a semiconductor chip in which a predetermined circuit portion is formed on a silicon substrate 1A, 2A and 2B are external terminals of this semiconductor chip 1, and 3 is the semiconductor chip 1 fixed integrally with screws 4A and 4B. Further, the heat sinks 5A and 5B are pipes for flowing the cooling medium as shown by the arrows for cooling the semiconductor chip 1, and 6A and 6B are connectors for connecting and fixing the pipes 4A and 4B to the heat sink 3, respectively.
【０００３】 この構成による半導体デバイスは、冷却媒体をパイプ５Ａ−ヒートシンク３− パイプ５Ｂを介して流すことにより、半導体チップ１を冷却するものである。The semiconductor device having this configuration cools the semiconductor chip 1 by causing a cooling medium to flow through the pipe 5A, the heat sink 3 and the pipe 5B.
【０００４】[0004]
しかしながら、上記構成の半導体デバイスでは、ＩＣ、ＬＳＩなどの半導体チ ップの高集積化、高速化に伴なって、発熱量も増大しており、その冷却が重要に なってきた。この半導体チップでは、チップ表面上近傍の発熱部分と冷却媒体と の距離は、少なくとも数ミリメートルあり、冷却には限度がある。 However, in the semiconductor device having the above configuration, the amount of heat generated is increasing with the increase in the integration and speed of semiconductor chips such as ICs and LSIs, and cooling thereof has become important. In this semiconductor chip, the distance between the heat generating portion near the surface of the chip and the cooling medium is at least several millimeters, and cooling is limited.
【０００５】 一般に、熱の流れ（単位時間当りの熱量）は、一次元的にはIn general, the flow of heat (heat quantity per unit time) is one-dimensionally
【０００６】[0006]
【数１】 [Equation 1]
【０００７】 （ただし、λは熱伝導度、ｄＴ／ｄｘは温度勾配）で表わされ、近似的には熱源 と冷却媒体との距離に反比例する。(Where λ is the thermal conductivity and dT / dx is the temperature gradient) and is approximately inversely proportional to the distance between the heat source and the cooling medium.
【０００８】 このため、半導体デバイスのシリコン基板の厚みにより、冷却媒体を用いても 十分に冷却することができないという問題点があった。Therefore, there is a problem that the thickness of the silicon substrate of the semiconductor device does not allow sufficient cooling even with a cooling medium.
【０００９】 本考案は以上述べた半導体デバイスを十分に冷却することができないという問 題点を除去するため、半導体デバイスの熱源と冷却媒体との距離を接近させ、半 導体デバイスの冷却能力を大幅に改良した優れた構造を提供することを目的とす る。In order to eliminate the above-mentioned problem that the semiconductor device cannot be sufficiently cooled, the present invention makes the distance between the heat source of the semiconductor device and the cooling medium close to each other, and greatly reduces the cooling capacity of the semiconductor device. The object is to provide an improved and improved structure.
【００１０】[0010]
本考案に係る半導体デバイスは、半導体チップのシリコン基板の裏面に異方性 エッチングにより形成した冷却媒体の通路としての凹部を構成したものである。 A semiconductor device according to the present invention comprises a concave portion as a passage for a cooling medium formed by anisotropic etching on the back surface of a silicon substrate of a semiconductor chip.
【００１１】[0011]
本考案は半導体チップの冷却能力を飛躍的に向上することができる。 The present invention can dramatically improve the cooling capacity of semiconductor chips.
【００１２】[0012]
図１は本考案に係る半導体デバイスの一実施例を示す概略断面図である。図に おいて、７はシリコン基板７Ａの表面に所定の回路部（図示せず）を形成し、裏 面を異方性エッチングによりエッチングして凹部７Ｂを形成することにより、シ リコン基板７Ａの厚さを薄く形成すると共に、冷却媒体の通路として形成した半 導体チップ、８はリードフレーム、９は半導体チップ７の電極とリードフレーム ８を電気的に接続するボンディングワイヤ、１０は内部に、シリコン基板７Ａの 裏面凹部７Ｂの周辺部が接着材１１によって固定されたパッケージ、１２Ａおよ び１２Ｂは半導体チップ７を冷却するため、冷却媒体を矢印のように流すための パイプ、１３Ａおよび１３Ｂはこのパイプ１２Ａおよび１２Ｂをそれぞれパッケ ージ１０に接続固定するコネクタである。 FIG. 1 is a schematic sectional view showing an embodiment of a semiconductor device according to the present invention. In the figure, 7 is a silicon substrate 7A on which a predetermined circuit portion (not shown) is formed, and the back surface is etched by anisotropic etching to form a recess 7B. A semiconductor chip which is formed as a passage for a cooling medium while being thinly formed, 8 is a lead frame, 9 is a bonding wire for electrically connecting the electrode of the semiconductor chip 7 and the lead frame 8, and 10 is a silicon inside. A package in which the peripheral portion of the back surface recessed portion 7B of the substrate 7A is fixed by an adhesive material 11, 12A and 12B are pipes for flowing the cooling medium as shown by arrows for cooling the semiconductor chip 7, and 13A and 13B are A connector for connecting and fixing the pipes 12A and 12B to the package 10, respectively.
【００１３】 なお、上記シリコン基板７Ａの裏面凹部７Ｂは（１００）シリコンウエハーの 場合、８０℃程度のＫＯＨ水溶液でエッチングすれば容易に形成することができ る。また、シリコン基板７Ａの回路部（図示せず）の厚さは電気的特性に影響を 及ぼさない限り、薄くすることが望ましく、例えば５０μｍ程度にすることがで きる。また、接着材１１は冷却媒体に対し耐久性のあるものが望ましいことはも ちろんである。The back surface recess 7B of the silicon substrate 7A can be easily formed in the case of a (100) silicon wafer by etching with a KOH aqueous solution at about 80 ° C. Further, the thickness of the circuit portion (not shown) of the silicon substrate 7A is preferably thin unless it affects the electrical characteristics, and can be, for example, about 50 μm. Further, it is needless to say that it is desirable that the adhesive 11 has durability against the cooling medium.
【００１４】 この構成による半導体デバイスでは、冷却媒体はパイプ１２Ａ−シリコン基板 ７Ａの裏面凹部７Ｂ−パイプ１２Ａを介して流れ、半導体デバイスのシリコン基 板７Ａを直接冷却することができるので、半導体デバイスの回路部（図示せず） で発生した熱をこの冷却媒体により外部に取り出すことができる。しかも、シリ コン基板７Ａの発熱部である回路部（図示せず）と冷却媒体との距離が極めて短 いので、冷却を一層強めることができる。In the semiconductor device having this structure, the cooling medium flows through the pipe 12A-the back surface recess 7B of the silicon substrate 7A-the pipe 12A, and the silicon substrate 7A of the semiconductor device can be directly cooled. The heat generated in the circuit section (not shown) can be taken out to the outside by this cooling medium. Moreover, since the distance between the cooling medium and the circuit portion (not shown) which is the heat generating portion of the silicon substrate 7A is extremely short, the cooling can be further strengthened.
【００１５】[0015]
以上、詳細に説明したように、本考案に係る半導体デバイスによれば、冷却媒 体を基板の発熱部である回路部に、従来のデバイスに比べてはるかに近づけるこ とができるので、冷却能力を飛躍的に向上させることができる効果がある。 As described above in detail, according to the semiconductor device of the present invention, the cooling medium can be brought much closer to the circuit part which is the heat generating part of the substrate as compared with the conventional device. There is an effect that can be dramatically improved.
【図１】本考案に係る半導体デバイスの一実施例を示す
概略断面図である。FIG. 1 is a schematic sectional view showing an embodiment of a semiconductor device according to the present invention.
【図２】従来の半導体デバイスを示す概略断面図であ
る。FIG. 2 is a schematic cross-sectional view showing a conventional semiconductor device.
７ 半導体チップ ７Ａ シリコン基板 ７Ｂ 裏面凹部 １０ パッケージ １２Ａ，１２Ｂ パイプ 7 Semiconductor Chip 7A Silicon Substrate 7B Backside Recess 10 Package 12A, 12B Pipe
Claims (1)
ある凹部を有する半導体デバイス。1. A semiconductor device having a recess, which is a passage for a cooling medium, on the back surface of a semiconductor substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP053618U JPH0617245U (en) | 1992-07-30 | 1992-07-30 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP053618U JPH0617245U (en) | 1992-07-30 | 1992-07-30 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0617245U true JPH0617245U (en) | 1994-03-04 |
Family
ID=12947900
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP053618U Pending JPH0617245U (en) | 1992-07-30 | 1992-07-30 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0617245U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013512422A (en) * | 2009-11-26 | 2013-04-11 | コンチネンタル オートモーティヴ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Sensor module and method for manufacturing sensor module |
-
1992
- 1992-07-30 JP JP053618U patent/JPH0617245U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013512422A (en) * | 2009-11-26 | 2013-04-11 | コンチネンタル オートモーティヴ ゲゼルシャフト ミット ベシュレンクテル ハフツング | Sensor module and method for manufacturing sensor module |
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