JPH06169102A - Semiconductor device and manufacture - Google Patents

Abstract

PURPOSE: To interrupt a large part of illumination light, made incident upon a modulator by constituting a semiconductor device of an address electrode connected to one region brought into contact with an electrically active region and a 2nd metallic layer, forming a landing electrode connected to another area avoided from contacting the electrically active region. CONSTITUTION: A substrate 10 has a source 16, a drain 12 and a gate 14. A block layer 24 is formed by a new patterned metallic layer or another opaque conductive material. The layer 24 can be supported by an oxide layer 23 patterned, so that an address layer can be brought into contact with the source 16 of a transistor(TR). Thereby an electrode layer is formed on the surface of the oxide layer 25 which is higher than the block layer. A phonto 20 made incident upon the electrode is also blocked. A phonto 22 made incident upon a device is made incident upon a shielding layer 24 through the electric layer and then blocked. Furthermore, most of pin hole risks can be removed by the blocking function.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to spatial light modulators, and more particularly to semiconductor spatial light modulators.

[0002]

Spatial light modulators typically consist of individually addressable linear or area arrays.
Examples include liquid crystal display cells, electro-optic modulators, magneto-optic modulators, and digital micromirrors (also known as deformable mirror devices). Spatial light modulators typically include some sort of addressing circuit that allows each cell to be individually addressed. For example,
Liquid crystal displays have electrodes that allow or prevent the transmission of crystalline material when operating in transmit mode. These electrodes can also be accompanied by some kind of memory that allows the electrodes to hold data that determines the state of each cell.

[0003]

There are problems with spatial light modulators that rely on semiconductor materials that incorporate addressing circuitry. A light source that is directly incident on the cell must be used. Photocarriers are generated by incident light on a semiconductor such as silicon. When using address and memory circuits, photocarriers can flow into them and cause leakage currents.

Dynamic random access memory (D
The use of double-layer metal address lines for RAM can reduce photocarrier generation. This process, which typically involves horizontal wiring metal layers and vertical wiring metal layers such as data lines, address lines and power supplies, is performed over most of the substrate. Unfortunately, the amount of light used in a spatial light modulator can exceed this range, and the photo carriers that cause leakage remain a problem for semiconductor optical modulators.

[0005]

SUMMARY OF THE INVENTION The invention disclosed herein comprises the steps and structures of a semiconductor spatial light modulator that dramatically reduces photocarrier generation in semiconductor materials. The light-blocking metal layer is patterned to fit the structure of the spatial light modulator. This layer blocks most of the illumination incident on the modulator and prevents contact with the semiconductor material. Furthermore, the sensitivity to pinhole defects is reduced, and the risk of interlayer short circuit of the address circuit is minimized.

[0006]

For a more complete understanding of the present invention and its advantages, reference is made to the following description and accompanying drawings. Conventionally, in order to overcome the problem of photo-generated carriers in a semiconductor substrate, CM
OS Dynamic Random Access Memory (DRAM)
A double layer metal process is used. This process is often used at low levels of light exposure to the device. In a system that requires the use of a medium in which a high intensity beam is focused in a spatial light modulator, too much photocarriers are generated in the substrate.

An example of an address circuit having a double metal layer is shown in FIG. 1A. The substrate 10 holds a source 16, a drain 12 and a gate 14. The address circuit shown is for a digital micromirror and is composed of the electrode layer 18 of each address transistor in the substrate 10. This electrode layer 18 contacts the source. Photon 20 is electrode layer 1
8 and hit by metal. The photon 22 is not blocked by the electrode layer and contacts the substrate through the oxide layer 21. The photons 22 may generate photocarriers in the substrate, current may leak from the transistors, and the address data may be lost from the electrodes.

FIG. 1B illustrates application to a digital micromirror device using an embodiment of the present invention. The substrate 10 has a source 16, a drain 12 and a gate 14. The blocking layer 24 is formed by a new patterned metal layer or other opaque conductive material. The blocking layer 24 can be supported by an oxide layer 23 that is patterned so that the address layer can contact the transistor source 16.
Therefore, the electrode layer 18 is the oxide layer 2 above the blocking layer.
Come on 5. The photons 20 incident on the electrodes are also blocked. Further, the photon 22 that has entered the device passes through the electrode layer and enters the light shielding layer 24 and is blocked.

This blocking function also eliminates most pinhole risk. As can be seen from FIG. 1B, pinhole defects that are present in oxide layer 25 over most of the area of the device can cause electrode layer 18 to short with blocking layer 24. Oxide layer 25 so that a considerable area of each geometry of layer 18 is at the same potential as the portion of layer 24 near it.
By patterning the contacts therein, the risk associated with such defects can be minimized. The pinhole risk is limited to a small overlapping region, as indicated by reference numerals 27 and 29, which is the only region where the potentials of the overlapping portions of the layers 18 and 24 are different.

FIG. 2 shows a flow chart of one embodiment of the manufacturing process. The substrate, or semiconductor, is typically prepared in step 26 as a wafer. An address circuit for activating the mirror later is formed in step 28. This address circuit usually consists of an electrically active layer on the substrate, and it is up to the designer whether it is an injection transistor or a thin film. Also, as part of this step, a metal layer is deposited on the substrate to form a contact with the electrically active region, if not previously used to form the electrically active region. In step 30, the address circuit can be coated with oxide and a light-blocking layer deposited.

The light blocking layer is deposited in step 32,
Patterned to avoid contact with electrically active areas. In the case of a mirror element or landing electrode,
Since the light shielding layer has a different potential, it is not desirable to contact these regions. It is desirable that the address electrodes have various potentials. Finally, in step 36, the standard modulator manufacturing process is restarted. For digital micromirrors, this step deposits an electrode layer and beam metal, coats them with a thin layer of photoresist to form a spacer layer, deposits post and hinge layers, mirror metal, and then patterns and etches. To allow the mirror to move freely in the space recently occupied by the thick layer and end.

FIG. 3 shows a plan view of each layer of the digital micromirror device. Shown in FIG. 3A is the first layer of the device, which is a substrate region 30 that substantially corresponds to the substrate region on which the modulator is fabricated. Region 40 represents an electrically active region, such as drain 16 from FIGS. 1A and 1B, which signals the electrodes to respond to the modulator cells. Figure 3B
In, the layer of FIG. 3A is coated with oxide and patterned to form contacts 42 with the electrically active regions of FIG. 3A. FIG. 3C shows the light-blocking layer 44, which is one layer on the contact formed in FIG. 3B. Long dashed lines are used to represent this layer and solid lines are used to indicate contacts, as represented by the dashed lines in FIG. 3A. There is a gap between the metal piece 44 covering the contact with the electrically active area and the remaining metal 46. This occurs because the voltages on these areas are different. The internal metal layer has an address potential, and the outside has an address element potential.

Another contact layer is shown in FIG. 3D.
These contacts 48 are internal metal strips 44 from FIG. 3C.
Contact with. Further, the contact 50 in contact with the metal layer 46 from FIG. 3C keeps the metal in the active area of the modulator at ground potential. Each of these contacts 50 is connected to up to four different mirrors in the array, only one of which is shown and shown as a mere small line. In FIG. 3E, the modulator active area has been deposited. Post metal and landing electrodes 52 contact and ground contacts 50 from FIG. 3D, and address electrodes 54 are shown in FIG. 3D.
Contact the internal contacts 48 from. The short dashed line is shown in Figure 3.
The electrode layer shown in E is shown.

Finally, FIG. 3F shows the entire address circuit in which FIGS. 3A to 3E are stacked on top of each other. The dotted area 40 is shown in FIG.
It has been transferred from A. The solid lines actually represent the two-layer contacts from FIGS. 3B and 3D because the contacts are on the same grid of the substrate. Finally, the cell address circuit is completed with the final electrode metal layer forming the contacts 50 and address electrodes 54 of FIG. 3D at the post. From this point, standard production of the modulator in question is resumed. If the modulator is not a digital micromirror,
The contacts on the posts will likely be different so that the beam metal is omitted in FIGS. 3E and 3F.

While one embodiment of a semiconductor light modulator having a light blocking layer has been described, the scope of the invention is not thereby limited unless stated in the claims.

The following items are further disclosed with respect to the above description. (1) a. A substrate, b. An electrically active region in the substrate; c. Substantially all of the light reaching the substrate, one of which is in contact with the at least one electrically active region and the other of which is at least two regions avoiding contact with the electrically active region. A first metal layer that blocks the d. A second metal layer forming an address electrode connected to the one region in contact with the electrically active region and a landing electrode connected to the other region to avoid contact with the electrically active region; A semiconductor consisting of.

(2) a. Prepare the substrate, b. Forming an electrically active region in the substrate, c. Depositing a metal layer on the electrically active region such that the metal layer has at least one region in contact with the electrically active region and an independent region avoiding contact with the electrically active region; d. Defining a second metal layer to form landing and address electrodes, the landing electrode avoiding contact with the region of the first metal layer contacting the electrically active region and the address electrode of the substrate. Connecting to said region of said first metal layer in contact with said electrically active region, e. Developing an optically active region such that light incident on said optically active region by said region is blocked against said first and second metal layers, said electrically active region and said substrate. A semiconductor device manufacturing method comprising.

(3) In the method described in item (2),
The method of claim 1, wherein the forming step further comprises forming a transistor in the substrate.

(4) In the method described in item (2),
The developing step further comprises applying photoresist to the second metal layer, depositing a further metal layer, patterning the additional metal layer to form hinges and posts, and removing substantially all of the photoresist. A method consisting of things.

(5) In the semiconductor device according to item (1), substantially all of the light in the second metal layer reaches the gap between the one and the other regions of the first metal layer. A semiconductor device that prevents from doing so.

(6) a. A substrate, b. An electrically active region in the substrate; c. A first metal layer that blocks light from reaching the substrate; d. A landing electrode that covers substantially the entire area that is not covered by the first metal layer and its overlapping portion, and the first and second metal layers prevent substantially all light from reaching the substrate. And a second metal layer forming an address electrode, the semiconductor device.

(7) The device according to the item (1) or (6), wherein the substrate is silicon.

(8) The device according to item (1) or (6), wherein the electrically active region further comprises a source and a drain of a transistor.

(9) In the semiconductor device according to item (1) or (6), there is further an optically active region on the surface of the semiconductor device, and the optically active region receives the light from a light source and receives the first light. A semiconductor device, wherein the second metal layer, the first metal layer, the electrically active region and the substrate are partially shielded by the optically active region.

(10) The device according to the item (9), wherein the optically active region for receiving light is a mirror portion of a digital micromirror device.

(11) A semiconductor device having an optically active region for receiving light and a metal layer 24 for blocking light 22 from the substrate. The substrate has address circuits 12, 1 through which leakage current flows when photo carriers are formed by contact with light.
Includes 4,16. A metal layer 24 is deposited as an integral part of the device to prevent light from reaching the substrate.

[Brief description of drawings]

1 shows a conventional embodiment of a spatial light modulator address circuit and an embodiment of a light-shielding layer, where A is an example of an address circuit having a double metal layer and B is an application of the present invention to a digital micromirror device. Show.

FIG. 2 is a manufacturing process flow chart of a spatial light modulator having a light shielding layer.

FIG. 3 is a plan view of each layer of the spatial light modulator having a light-shielding layer, where A is the first layer of the device, B is the oxide covering the contacts, and C is the light-shielding layer. Shows,
D shows another contact layer, E the modulator active area is deposited, F shows the whole addressing circuit with A to E stacked.

[Explanation of symbols]

 12 address circuit 14 address circuit 16 address circuit 24 metal layer

Claims (2)

[Claims] 1. A. A substrate, b. An electrically active region in the substrate; c. Substantially all of the light reaching the substrate, one of which is in contact with the at least one electrically active region and the other of which is at least two regions avoiding contact with the electrically active region. A first metal layer for blocking
d. A second metal layer forming an address electrode connected to the one region in contact with the electrically active region and a landing electrode connected to the other region to avoid contact with the electrically active region; A semiconductor consisting of. 2. A. Prepare the substrate, b. Forming an electrically active region in the substrate, c. Depositing a metal layer on the electrically active region such that the metal layer has at least one region in contact with the electrically active region and an independent region avoiding contact with the electrically active region; d. Defining a second metal layer to form landing and address electrodes, the landing electrode avoiding contact with the region of the first metal layer contacting the electrically active region and the address electrode of the substrate. Connecting to said region of said first metal layer in contact with said electrically active region,
e. Developing an optically active region such that light incident on said optically active region by said region is blocked against said first and second metal layers, said electrically active region and said substrate. A semiconductor device manufacturing method comprising.