JPH06163482A - Contact hole forming method of semiconductor device - Google Patents

Abstract

PURPOSE:To enable a contact hole making a small taper angle in the least roughness on the hole sidewall yet excellent controllability and reproducibility of the hole diameter as well as excellent step coverage to be formed by combin ing the whole surface exposure and the mask exposure in the photolithographic step. CONSTITUTION:An SiO2 film 12 is formed on a substrate 11 and after coating the SiO2 film 12 with a resist 13 the whole surface of which is exposed and mask exposed and developed for the formation of a resist pattern 13a. Later, the SiO2 film 12 is anisotropically reactive ion etched away using the mixed gas of CF4 CHF3 and He to form a contact hole 15. For example, the whole surface of the resist 13 is exposed and mask exposed and developed to form a resist pattern 13a making a taper angle. Finally, the SiO2 film 12 is anisotropically reactive ion etched away using the resist pattern 13a as a mask to form a contact hole 15 making the taper angle.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact hole in a semiconductor device, and more particularly to a method for forming a contact hole by etching a SiO ₂ film in a semiconductor integrated circuit manufacturing process.

[0002]

2. Description of the Related Art Conventionally, in the manufacture of a semiconductor device (semiconductor integrated circuit), a technique combining photolithography and etching has been used to form a contact hole in a SiO ₂ film on the surface of a semiconductor substrate. . The photolithography technique is a technique for transferring a mask pattern onto a resist, and the etching technique is a technique for processing a SiO ₂ film using the patterned resist as a mask.

A photolithography and etching process for forming a general contact hole will be described with reference to FIG. First, the SiO ₂ film 32 is formed on the Si substrate 31.
Then, a resist 33 made of a photosensitive polymer is applied, and then prebaking is performed to remove the organic solvent contained in the resist 33 (FIG. 6A). Next, the mask pattern 34 is transferred onto the resist 33 by exposure (FIG. 6B), and then the resist 33 is developed to form a pattern of the resist 33 corresponding to the mask pattern 34. Then, post-baking is performed to remove water contained in the resist 33 to cure the resist 33, and S
Adhesion with the iO ₂ film 32 is enhanced (FIG. 6C).
Further, the SiO ₂ film 32 is etched using the resist 33 as a mask to form a contact hole 35 (FIG. 6D). Next, the unnecessary resist 33 is melted and removed (FIG. 6E). As described above, the general photolithography and etching process is composed of the five main processes as shown in (FIGS. 6A to 6E).

The cross-sectional shape of the contact hole 35 formed by the above-mentioned photolithography and etching process has a rectangular shape.
After etching the _two films 32, it may be desirable to obtain a cross-sectional shape with a taper angle. For example, by making the cross-sectional shape of the contact hole of the insulating film (SiO ₂ film) in the multi-layered wiring taper, it is possible to prevent disconnection in the upper layer wiring, or improve the metal material embedding property to prevent conduction failure. This is the case. As a method of obtaining a contact hole having such a tapered shape, a method combining wet etching and dry etching, a method of performing dry etching while depositing a polymer on a sidewall of a resist pattern, and a method of being used as a mask material during etching There is a method of forming a taper angle on the resist.

First, a method of combining wet etching and dry etching will be described with reference to FIG. In this method, first, Si on the Si substrate 41
An O ₂ film 42 is formed, and a resist 43 made of a photosensitive polymer is applied on the SiO ₂ film 42. After that, pre-baking is performed to remove the organic solvent contained in the resist 43, and a pattern (not shown) on the mask is transferred onto the resist 43 by exposure and then developed. Next, post-baking is performed to cure the resist 43 and enhance the adhesion to the base (FIG. 7A). Further, using the resist 43 as a mask, for example, a 10: 1 BHF solution (HF,
By wet etching using a mixed solution of HNO ₃ and H ₂ O), the upper portion of the SiO ₂ film 42 is isotropically etched and chamfered (FIG. 7B). Then, anisotropic etching is performed by dry etching to form a chamfered pattern on the SiO ₂ film 42 (FIG. 7).
(C)). Next, the resist 43 that is no longer needed is melted and removed (FIG. 7D).

Next, a method of performing dry etching while depositing a polymer on the side wall of the resist pattern will be described with reference to FIG. First, the SiO ₂ film 52 is formed on the Si substrate 51, and then the resist 53 is applied. After that, pre-baking is performed to remove the organic solvent contained in the resist 53, and a mask pattern (not shown) is transferred onto the resist 53 by exposure and then developed (FIG. 8).
(A)). Further, using the resist 53 as a mask, CCl ₂
Anisotropic etching is performed by reactive dry etching using a F ₂ / C ₂ H ₆ mixed gas system. In this case Si
At the same time when the O ₂ film 52 is etched, a polymer is deposited on the pattern side wall of the resist 53 to form a polymer film 54, and a pattern having a taper angle can be formed on the SiO ₂ film 52 (FIG. 8B. )). Next, the unnecessary resist 53 is melted and removed (FIG. 8C).

A method of forming a taper angle on a resist used as a mask material at the time of etching is to heat the resist after development to give a taper angle to the resist, and then perform etching to form the taper angle. The SiO ₂ film is formed.

[0008]

[SUMMARY OF THE INVENTION] The method of combining the wet etching and dry etching using the case, the poor adhesion between the resist 43 and the SiO ₂ film 42, the interface between the resist 43 and the SiO ₂ film 42 The etching solution penetrates in the horizontal direction, and the etching spreads in the horizontal direction. Therefore, there is a problem that reproducibility and controllability are deteriorated and also disadvantageous in fine processing.

Further, in the case of the method of performing the dry etching while depositing the polymer on the side wall of the resist pattern,
Since the taper angle is formed on the SiO ₂ film 52 by utilizing the polymer film 54 formed on the side wall of the pattern of the resist 53, the etching rate decreases due to the influence of the polymer film 54 as the number of etching treatments increases, and the reproduction is reproduced. And the controllability in each pattern is poor.

Further, in the case where the resist used as a mask material at the time of etching has a taper angle, the expansion and contraction caused when the resist is heat-treated is uniform due to the difference in pattern width and pattern density. There was also a problem that it did not occur, and the reproducibility and controllability were poor.

The present invention has been invented in view of the above problems, and has a small taper angle which is excellent in controllability and reproducibility of hole diameter without roughening the side wall of the hole and in step coverage. It is intended to provide a method for forming a contact hole.

[0012]

In order to achieve the above object, a method of forming a contact hole of a semiconductor device according to the present invention comprises forming a SiO ₂ film on a substrate and applying a resist on the SiO ₂ film. Then, the resist is subjected to overall exposure and mask exposure, and developed to form a resist pattern, and then the SiO ₂ film is subjected to anisotropic reactive ion etching treatment using a mixed gas of CF ₄ , CHF ₃ and He. In the method for forming a contact hole of a semiconductor device described above, PEB (Post Exposure Bake) processing is performed after the whole surface exposure or the mask exposure.

[0013]

According to the method described above, in the photolithography process in manufacturing a semiconductor device, when a resist-coated wafer is subjected to exposure / development processing to form a resist pattern, whole surface exposure and mask exposure are combined. After that, development processing is performed. Since the inhibitor (development inhibitor) in the resist is decomposed by exposing the resist, if the intensity of the entire surface exposure is adjusted, only the resist surface is exposed strongly, the inhibitor concentration becomes small, and it becomes a developable state. . Further, as the depth becomes deeper, the intensity of the exposed light becomes weaker, the inhibitor concentration becomes higher, and the developing becomes impossible. That is,
The inhibitor concentration after the whole surface exposure shows a concentration distribution that increases as the depth from the resist surface increases. When the mask exposure is performed in this state, the resist is irradiated with the light only from the opening in the mask exposure, and the light intensity distribution in the opening is in a state in which the state that can be dissolved by the development is broadened as it is closer to the surface. After that, when development is performed, a resist pattern having a taper angle is formed.

However, when a contact hole having a small taper angle is formed, when a normal etching gas is used for etching, resist roughening occurs, and this roughening is transferred to the side wall of the hole, so that the hole diameter is reduced. Controllability and reproducibility are reduced. This resist roughness is caused by an increase in impact on the resist due to an increase in the etching rate. Therefore, when the resist pattern is transferred to the SiO ₂ film in the etching step, a mixed gas of CF ₄ and CHF ₃ with He as a diluent gas is used. Then, the He in the mixed gas has a small mass, and the impact on the resist is small, so that the resist is not roughened. Thus, by subjecting the SiO ₂ film to the anisotropic reactive ion etching treatment using the mixed gas,
Even if the etching rate of the resist is increased, the resist is not roughened, and since the etching is anisotropic, the contact hole does not spread laterally. Therefore, it is possible to form a contact hole having a small taper angle excellent in step coverage, a smooth hole sidewall, and excellent hole diameter controllability and reproducibility.

In the method for forming a contact hole of a semiconductor device described above, when the exposure wavelength is a single wavelength,
Λ / 4n perpendicular to the underlying film due to the effect of standing waves
A wavy pattern may appear on the side wall of the resist due to a change in the light intensity with a cycle of (λ; wavelength, n; refractive index). In this case, the wavy pattern reduces the shape controllability of the resist pattern in the photolithography process. However, the wavy pattern disappears because the resist is also etched to some extent when the SiO ₂ film is etched, and the pattern shape after etching becomes smooth. However, since the shape of the resist pattern is reflected in the etching process, the taper controllability of the contact hole after etching is affected.

Therefore, PEB treatment is performed after the entire surface exposure or the mask exposure to alleviate the effect of the standing wave, so that the inhibitor concentration distribution in the resist after the entire surface exposure and the mask exposure becomes gentle, The width can be easily controlled.

Further, when the PEB treatment is performed before the mask exposure, the light in the mask exposure is likely to enter, so that the mask exposure amount can be estimated to be small, and the light in the mask exposure can be estimated. The effects of standing waves will also be mitigated.

[0018]

EXAMPLES AND COMPARATIVE EXAMPLES Examples and comparative examples of a method for forming a contact hole of a semiconductor device according to the present invention will be described below with reference to the drawings. [Embodiment 1] FIGS. 1A to 1E are cross-sectional views showing respective steps for explaining a method of forming a contact hole of a semiconductor device according to an embodiment.

First, SiO _{2 is formed} on a substrate 11 made of Si.
A film 12 is formed, and then a resist 13 made of a photosensitive polymer is applied on the SiO ₂ film 12 (FIG. 1A). After that, prebaking is performed to remove the organic solvent contained in the resist 13. Next, the entire surface is exposed from above the resist 13 ((FIG. 1 (b)), and then the mask pattern 1
4 is used to perform mask exposure with a stepper (see FIG. 1).
(C)). Next, the resist 13 is developed to have a taper angle corresponding to the mask pattern 14.
a is formed (FIG. 1D). After that, post-baking is performed to remove moisture contained in the resist 13 to cure the resist 13 and enhance the adhesiveness with the SiO ₂ film 12. Further, the SiO ₂ film 12 is subjected to anisotropic reactive etching treatment using the resist pattern 13a having the taper angle as a mask to form a contact hole 15 having the taper angle, and the unnecessary resist pattern 13a is removed. (FIG. 1 (e)).

The above etching treatment is He (350 sccm)
CF ₄ (20 sccm) and CHF ₃ (2
(0 sccm) mixed gas, using the apparatus shown in FIG. 2, RF power: 850 W, distance between electrodes: 1.0 cm, sample temperature: −30 ° C., pressure: 500 mTorr.

In the figure, 21 is an upper electrode, 22 is a lower electrode, 23 is a high frequency power source, 24 is a gas inlet, and 25 is a wafer.

O ₂ may be added as an etching gas to the above mixed gas.

[Embodiment 2] A method for forming contact holes in a semiconductor device according to Embodiment 2 has basically the same steps as the method for forming contact holes in the semiconductor device according to Embodiment 1 shown in FIG. The difference is that PEB treatment (heat treatment) is performed after exposure (FIG. 1C).

When the exposure wavelength is a single wavelength, the light intensity changes at a cycle of λ / 4n (λ: wavelength, n: refractive index) due to the influence of a standing wave, so that the resist pattern as shown in FIG. A wavy pattern may appear on the side wall of 13a. Therefore, in the present embodiment, in order to mitigate the influence of standing waves, PEB processing is performed after mask exposure to smooth the inhibitory wave-like concentration distribution in the resist 13, and after development, a resist pattern 13a having a smooth sidewall is formed. According to the process as shown in FIG. 1, the contact hole 15 having a smooth and small taper angle can be formed without performing the PEB treatment, but the PEB treatment is preferable in terms of shape control. Is more preferable.

[Third Embodiment] A contact hole forming method for a semiconductor device according to a third embodiment basically has the same steps as the contact hole forming method for a semiconductor device according to the first embodiment shown in FIG. After exposure (Fig. 1 (b)), P
The difference is that EB treatment (heat treatment) is performed.

FIG. 4 is a sectional view showing the shape of the contact hole 15 formed in the third embodiment. The formation conditions at this time are as follows: positive resist PFX-15 as resist 13.
(Sumitomo Chemical Co., Ltd.), prebaking is 100
It was carried out at 120 ° C. for 120 seconds. N for full exposure without mask
After using SR1505G7E (manufactured by Nikon Corporation) under an exposure condition of an exposure amount of 95 mJ / cm ² , PE was used.
Treatment B was carried out at 125 ° C. for 120 seconds. Then, mask exposure is performed at an exposure dose of 95 mJ / cm ² , and then 22
Development processing was performed at 65 ° C. for 65 seconds, and post baking was performed at 120 ° C. for 120 seconds.

In the third embodiment, PEB is applied after the whole surface exposure.
A mask exposure is performed after the processing. Since the resist 13 is strongly exposed only on the surface portion and weakly as the depth is increased by adjusting the exposure amount during the whole surface exposure,
The inhibitor concentration after the whole surface exposure has a concentration distribution in which the inhibitor concentration increases as the depth from the surface of the resist 13 increases.
As the inhibitor concentration increases, dissolution due to development becomes impossible. By performing PEB processing in this state, the inhibitor concentration distribution in the resist 13 can be made smooth. Further, the transmittance of light in the resist 13 also changes, and the light in the mask exposure is likely to enter, so that the mask exposure amount can be underestimated, and the influence of the standing wave of light during the mask exposure can be mitigated. be able to.

FIG. 5 is a sectional view of a contact hole 20 according to a comparative example formed when etching is performed using a mixed gas diluted with Ar gas instead of He gas in the method of forming a contact hole of a semiconductor device according to the third embodiment. The shape is shown.

In FIG. 5, the side wall of the contact hole 20 is uneven. This is because the impact given by Ar during etching was strong and the resist was roughened.

[0030]

[Table 1]

Table 1 shows the result of comparison between the contact hole 15 formed in Example 3 and the contact hole 20 of the comparative example.

As is clear from Table 1, in the contact hole 15 formed in Example 3, the hole sidewall was not roughened, the taper angle was small, and the coverage by Al sputtering was good.

[0033]

As described in detail above, in the method for forming a contact hole of a semiconductor device according to the present invention, a resist pattern is formed by combining whole surface exposure and mask exposure in a photolithography process in manufacturing a semiconductor device. A taper angle with good controllability and reproducibility can be attached. In addition, by performing anisotropic reactive etching in the etching process, the side wall of the hole is not roughened, the controllability and reproducibility of the hole diameter is excellent, and the contact having a small taper angle is excellent in step coverage. Holes can be formed.

For this reason, it is possible to prevent disconnection of the wiring in the contact hole portion and conduction failure due to filling failure.

In the contact hole forming method for a semiconductor device described above, when PEB (Post Exposure Bake) processing is performed after the whole surface exposure or mask exposure,
Since the inhibitor concentration distribution in the resist after the whole surface exposure and the mask exposure can be made gentle, the rate of change of the line width with respect to the exposure amount can be reduced, and the line width controllability can be improved, so that a finer pattern can be obtained. It becomes easy to make contact holes.

[Brief description of drawings]

1A to 1E are schematic cross-sectional views showing an embodiment of a method for forming a contact hole of a semiconductor device according to the present invention in the order of each step.

FIG. 2 is a schematic cross-sectional view showing an etching apparatus used in an etching process in Examples 1 to 3.

FIG. 3 is a schematic sectional view showing a resist pattern according to the present invention without PEB treatment.

FIG. 4 is a sectional view showing a contact hole formed in Example 3;

FIG. 5 is a cross-sectional view showing a shape of a contact hole according to a comparative example formed by using Ar instead of He as a mixed gas in an etching process.

6A to 6E are schematic cross-sectional views sequentially showing a contact hole forming process using a conventional resist pattern.

7A to 7D are schematic cross-sectional views sequentially showing each step in forming a conventional contact hole having a taper angle.

FIGS. 8A to 8C are schematic cross-sectional views sequentially showing each step in forming a contact hole with a taper angle in another conventional example.

[Explanation of symbols]

11 substrate 12 SiO ₂ film 13 resist 13a resist pattern 15 contact hole

Claims (2)

[Claims] 1. A SiO ₂ film is formed on a substrate, and the SiO ₂ film is formed.
_{After a} resist is applied on the _two films, the resist is subjected to overall exposure and mask exposure, and developed to form a resist pattern, and then the SiO ₂ film is subjected to CF ₄ , CHF ₃ and He.
A method for forming a contact hole in a semiconductor device, which comprises subjecting a reactive ion etching treatment having anisotropy to a mixed gas of the above. 2. PEB after whole surface exposure or mask exposure
The method for forming a contact hole in a semiconductor device according to claim 1, wherein a (Post Exposure Bake) process is performed.