JPH1032190A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable an etching mask to be enhanced in etching resistance and restrained from increasing in dimension conversion difference, when the fine pattern is formed. SOLUTION: A positive-type photoresist film 4 is applied onto a wiring film 3, subjected to an under-exposure process, so as to be exposed to light as deep as half of its thickness and developed for the formation of grooves 5. Then, an SOG (spin-on-glass) film is applied to all the surfaces and etched backs, whereby an SOG buried film 6b is formed in the grooves 5 respectively, and the positive-type photoresist film 4 is etched through an RIE method (reactive ion etching) for the formation of a resist pattern 4p. The wiring film 3 is etched through an RIE method, using the SOG buried film 6b and the resist pattern 4p as a cooperative mask for the formation of a wiring pattern 3p. The width of the wiring pattern 3p is substantially determined almost by the width in the opening edge of the groove 5, and the etching mask 7 is enhanced in etching resistance by the SOG-buried film 6b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for accurately forming a fine pattern in a semiconductor device manufacturing process.

[0002]

2. Description of the Related Art In a semiconductor device manufacturing process, wiring,
Photolithography and dry etching are widely used for forming fine patterns such as connection holes and trenches. Above all, photolithography for forming a resist pattern serving as an etching mask of a layer to be processed is a process for substantially determining the dimensional limit of a fine pattern,
Every effort has been made and devised in terms of equipment, materials, and methods.

The photoresist materials for forming the above resist patterns are roughly classified into two types, negative type and positive type.
There are types. The negative type is a photoresist material of a type in which the exposed portion is polymerized by a cross-linking reaction of a molecular chain generated by exposure and the solubility in a developing solution is reduced, and the positive type is a polymer material generated by the exposure. Is a type in which the exposed portion is reduced in molecular weight by the decomposition reaction of the compound and the solubility in a developing solution is improved.

However, the negative type generally has a low resolution because the exposed portion absorbs the developing solution during development and swells. Also,
When a rubber-based material such as cyclized isoprene is used as the base material, there are disadvantages in that crosslinking is hindered by the presence of O ₂ at the time of exposure and dry etching resistance is low.
On the other hand, the positive type is slightly inferior in chemical stability, but has high resolution because it does not cause swelling due to the developer, and has a large difference in solubility between exposed and unexposed parts, and therefore has a high It has advantages such as obtaining a contrast. For this reason, in a semiconductor process in which design rules are highly reduced as in recent years, a positive type is often used.

When the photoresist film is exposed, the exposure threshold is sufficiently increased even in the vicinity of the interface with the underlying film, that is, the amount of light that causes a resist reaction in the exposed portion in the entire thickness direction of the photoresist film. Exposure is usually performed with an amount of light that exceeds this. However, in recent years, as the design rules of semiconductor devices have been reduced, monochromatic light having a short wavelength has been used, and the scattering of exposure light at the interface between the base film and the photoresist film has resulted in the scattering of exposure light from the steps of the base film. Problems such as halation caused by the reflected light concentrating on a specific region of the photoresist film and deterioration of the resist pattern shape due to the standing wave effect are likely to occur. These problems are unavoidable even if a positive photoresist material is used.

Therefore, as one means for avoiding this problem, for example, Japanese Patent Application Laid-Open No. 58-98924 discloses that exposure is performed not on the entire photoresist film but in a part of the photoresist film in the thickness direction. A method has been proposed in which a resist reaction is performed under conditions (under-exposure conditions), the photoresist film is once developed to form an incomplete resist pattern, and then dry etching is performed to complete the resist pattern. ing. An example of a process in which this method is applied to contact hole processing will be described with reference to FIGS.

FIG. 8 shows a substrate (wafer) in which an interlayer insulating film 22 made of SiOx is formed on a Si substrate 21 and a positive photoresist film 23 is formed on this film via a photomask 30. 3 shows a state in which selective exposure is being performed. When this exposure is performed using a normal stepper (reduction projection exposure apparatus), the pattern on the photomask 30 is reduced to 1/5 on the wafer. Are shown at the same magnification.

The photomask 30 has a predetermined pattern on a reticle substrate 31 transparent to exposure light.
A light-shielding film pattern 32 made of a film is formed, and the exposure light hν transmitted through the opening of the light-shielding film pattern 32 irradiates the positive photoresist film 23. However, this exposure is performed under the condition that light is exposed from the surface of the positive photoresist 23 to a depth of about 1/3 to 1/2 in the film thickness direction. In other words, the exposed portion 23e as indicated by the dotted line in the drawing is a region where the molecular weight is reduced by the selective exposure.

When the wafer after the selective exposure is developed, the exposed portion 23e is dissolved and removed. As a result, openings 24 are formed in the positive photoresist film 23 as shown in FIG. Next, RIE (Reactive Ion Etching) is performed to anisotropically etch back the positive photoresist film 23 until the interlayer insulating film 22 is exposed on the bottom surface of the opening 24, as shown in FIG. The resist pattern 23p is formed. Further, when the interlayer insulating film 22 is anisotropically etched using the resist pattern 23p as a mask, a contact hole 25 as shown in FIG. 11 is formed. Finally, ashing is performed to remove the resist pattern 23p as shown in FIG.

According to such a method, since the photosensitive region of the positive type photoresist film 23 is limited to the surface layer, scattering, diffraction and reflection of light are prevented, and the fidelity and contrast of an optical image are improved. ing.

[0011]

However, the above method employing the under-exposure condition has the following disadvantages. First, the positive photoresist film 23 after selective exposure is entirely etched back to form a resist pattern 2.
Since 3p is formed, the net resist film thickness functioning as an etching mask decreases. This means that in etching that requires high incident ion energy like the contact hole etching described above,
This may accelerate the reduction of the resist film and cause a deterioration in the cross-sectional shape of the contact hole 25 and a difference in dimensional conversion. When the underlying film of the resist pattern 23p is a material having a low selectivity with respect to the resist, such as an Al-based wiring film, the resist pattern 23p may sufficiently exhibit the function as an etching mask. become unable.

Second, the cross-sectional shape of the opening 24 formed in the positive photoresist film 23 has a tapered shape whose bottom is narrower than the opening end, reflecting the resist sensitivity at the time of selective exposure. This cross-sectional shape is directly transferred to the resist pattern 23p by anisotropic etchback, and the diameter of the contact hole 25 opened by anisotropic etching using this as a mask reflects the diameter of the bottom surface of the opening 24. It will be. That is, a conversion difference occurs between the pattern dimension (design dimension) on the photomask 30 and the pattern dimension on the wafer. Although this suggests the possibility of forming fine contact holes that exceed the resolution of photolithography, the possibility that the dimensions fluctuate greatly depending on the exposure amount and development time during selective exposure is large,
It is extremely difficult to control this variation with good reproducibility.

It is an object of the present invention to provide a method of manufacturing a semiconductor device capable of forming a fine pattern while sufficiently improving etching resistance and suppressing a dimensional conversion difference.

[0014]

In a method of manufacturing a semiconductor device according to the present invention, first, a positive type photoresist film formed on a layer to be processed is under-exposed, developed, and selectively exposed. Then, instead of etching back the positive photoresist film as it is, an etching resistant material film is buried in the recess, and then anisotropic etching is performed using this as a mask. By performing anisotropic etching of the layer to be processed,
The above object is achieved. The pattern of the positive photoresist film formed by the anisotropic etching is finally removed by using a resist stripper.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a positive type photoresist film having a concave portion formed through an under-exposure and a developing process is used.
Rather than etching back as it is conventionally, anisotropic etching is performed using an etching-resistant material film formed in a self-aligned manner as a mask so as to fill the recess.
Therefore, the portion of the layer to be processed, which functions as an etching mask, is a combination of the etching resistant material film and the pattern of the positive photoresist film formed immediately below. Therefore, the thickness of the etching mask is not different from the thickness of the positive photoresist film formed first. Accordingly, the occurrence of the dimensional conversion difference and the deterioration of the shape of the pattern of the layer to be processed, which have conventionally occurred due to the decrease in the thickness of the etching mask, are suppressed.

It is preferable that the degree of underexposure is such that about 1/3 to 1/2 of the thickness of the positive type photoresist film in the thickness direction is exposed. If the photosensitive region is too shallow, the etching resistant material film to be embedded in the concave portion becomes thin, and the etching resistance of the etching mask decreases. If the photosensitive region is too deep, problems such as difficulty in embedding the concave portion with the etching resistant material film and unevenness in the shape of the concave portion due to the reflection and diffraction of exposure light occur. The exposure amount when performing underexposure can be adjusted by controlling the irradiation energy of the exposure light source if it is variable, or by controlling the number of shots if it is a pulsed light source.

In addition, the above-described anisotropic etching is usually performed under plasma etching conditions in which the straightness of incident ions is increased by applying a substrate bias or a low gas pressure discharge.
The etching range of the positive photoresist film is substantially determined by the width of the upper end side of the etching resistant material film, that is, the width of the opening end of the concave portion. The width of the opening end of this recess is
Since this reflects the pattern width on the photomask, according to the present invention, almost no dimensional conversion difference occurs between the pattern dimensions on the photomask and the pattern dimensions on the wafer.

When removing the etching mask after the anisotropic etching of the layer to be processed is completed, it is necessary to consider the efficient removal of both the pattern of the positive photoresist film and the etching resistant material film. Basically, a method is employed in which the positive photoresist film is removed first, and as a result, the etching-resistant material film that floats due to the loss of adhesion scaffolding is removed. It is not impossible to remove the positive-type photoresist film even by performing ordinary O ₂ plasma ashing from the beginning. However, in order to prevent the etching-resistant material film from adhering to the substrate surface, it is more preferable to use a wet process capable of washing away the etching-resistant material film simultaneously with the removal of the positive photoresist film, that is, a process using a resist stripping agent. is there. However, it is all right to perform O ₂ plasma ashing after performing the processing using the resist stripping agent.

In the present invention, the embedding of the etching-resistant material film into the concave portion in the fourth step is performed by flattening the entire surface of the etching-resistant material film, and by forming a film thickness for exposing the surface of the positive photoresist film. This is performed by a reduction process.
As the film thickness reduction processing, etch back by anisotropic plasma etching is advantageous from the viewpoint of the number of steps and throughput, but the so-called resist etch back method using resist flattening in combination with this etch back or chemical mechanical A polishing method (CMP) may be applied.

In the fifth step of the present invention, it is particularly effective to perform anisotropic etching of the positive photoresist film and the layer to be processed under optimized conditions for each film. This is because the anisotropic etching of a positive photoresist film is usually performed by plasma etching using O ₂ gas, but the underlying layer which is to be processed in a normal semiconductor process underneath. This is because the optimum etching gas is often a gas other than O ₂ . For example, if the layer to be processed is an Al-based wiring film, BC
A mixed gas of l ₃ / Cl _{2, a} mixed gas of Cl ₂ / O _{2 for} a W-polycide-based wiring film, and a fluorocarbon-based gas for a SiOx-based insulating film are used as etching gases. Of course, the optimization of the etching conditions includes not only the selection of the etching gas, but also the setting of conditions such as gas pressure, plasma discharge type, discharge power, wafer temperature, and substrate bias.

In the present invention, the combination of the etching resistant material film and the layer to be processed is also important. In particular, when the layer to be processed is an Al-based, polysilicon-based, polycide-based or refractory metal-based wiring film, the etching of the wiring film secures a high selectivity with respect to the underlying interlayer insulating film and gate oxide film. Therefore, the etching resistant material film may be the same type of insulating film. If a spin-on-glass (SOG) film is used as this insulating film, not only can the etching selectivity be ensured, but also the formation of an etching-resistant material film is simple. This is because the SOG film can be formed almost evenly on the surface of the uneven wafer by the spin coating method. In addition, the SOG film is other than this.
It can also be used as an etching mask for Si trench etching. However, it is difficult, if not impossible, to use it as an etching mask for the SiOx-based interlayer insulating film. This is because the etching mask and the layer to be processed are made of the same type of material, so that an etching selective target cannot be secured in principle, and particle contamination increases.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, as a preferred embodiment of the present invention, an example of a wiring pattern forming process will be described with reference to FIGS. FIG. 1 shows, via a photomask 10, a substrate on which an interlayer insulating film 2 and a wiring film 3 are sequentially laminated on a Si substrate 1, and on which a positive photoresist film 4 is formed. This shows a state where selective exposure is being performed. When this exposure is performed using a normal stepper (reduction projection exposure apparatus), the pattern on the photomask 10 is reduced to one fifth on the wafer. Are shown at the same magnification.

The interlayer insulating film 2 is made of, for example, O ₃ / TE
It was deposited by a normal pressure CVD method using a mixed gas of OS (tetraethoxysilane) / TMB (tetramethylboric acid) / TMOP (tetramethoxyphosphoric acid) as a raw material. The wiring film 3 is made of, for example, Al-
It was formed by depositing a 1% Si-0.5% Cu film to a thickness of about 0.5 μm.

The positive photoresist film 4 is formed, for example, by spin-coating a novolak-based positive photoresist material on the wiring film 3 and then forming a film on a hot plate at 90.degree.
By performing the pre-bake for 0 second, finally about 1.
It was formed to a thickness of 5 μm. In the present invention, since the entirety of the positive photoresist film in the thickness direction is not exposed, the exposure throughput is high. Accordingly, a positive photoresist material having a large light absorption, for which a decrease in throughput has been feared in recent years, for example, a material containing many benzene rings having a large light absorption in an ultraviolet wavelength region can be used.

The photomask 10 has a predetermined pattern on a reticle substrate 11 transparent to exposure light.
The light-shielding film pattern 12 made of a film is formed, and the exposure light hν transmitted through the non-formed portion of the light-shielding film pattern 12 irradiates the positive photoresist film 4. This exposure is performed under the condition that light is exposed from the surface of the positive photoresist 4 to a depth of about 1/2 of the film thickness direction. Area. Here, an i-line (365 nm) is used as an exposure light source, and the width of the exposed portion 4e is set to about 0.
4 μm.

After the selective exposure was completed, post-baking was performed at 200 ° C. for 60 seconds on a hot plate while irradiating the positive photoresist film with ultraviolet light having a wavelength of 220 to 320 nm. This post-bake is a process for improving the heat resistance of the positive photoresist film. After this,
A development process was performed using a normal alkaline developer to dissolve and remove the exposed portions 4e. As a result, as shown in FIG. 2, the width of the opening end of the positive photoresist film 4 is about 0.5 mm.
The groove 5 having a thickness of 4 μm and a depth of about 0.7 μm was formed. In the present invention, since exposure is not performed over the entire thickness of the positive photoresist film 4 in the film thickness direction, deterioration of resolution and contrast due to reflected light and scattering from the underlying step is prevented,
The dimensions and shape of these grooves 5 became uniform over the wafer surface.

Next, as shown in FIG.
And spin coating an amount of SOG (spin on glass) sufficient to flatten the surface of the substrate.
The SOG film 6 was formed by baking at 00 ° C. for 10 minutes. Next, RIE is performed using a fluorocarbon-based gas.
The SOG film 6 was etched back by (reactive ion etching). This etch back was performed until the upper surface of the positive photoresist film 4 was exposed. As a result, as shown in FIG. 4, an SOG buried film 6b for burying the trench 5 flat was formed.

Next, the positive photoresist film 4 was subjected to RIE using O ₂ plasma using the SOG buried film 6b as an etching mask to form a resist pattern 4p as shown in FIG. It is important that this RIE is performed while applying a substrate bias sufficient for performing anisotropic processing. This is because if the incidence of ions in the plasma is made substantially perpendicular to the substrate surface by applying a bias, the width of the formed resist pattern 4p can be made substantially equal to the width of the upper end of the SOG buried film 6b. is there. Thereafter, the SOG buried film 6b and the resist pattern 4p having a vertical wall immediately below the SOG buried film 6b function together as the etching mask 7.

Next, through the etching mask 7,
For example, the wiring film 3 was anisotropically processed by RIE using a mixed gas of BCl ₃ / Cl ₂ to form a wiring pattern 3p as shown in FIG. Conventionally, in the etching for processing the Al wiring, a decrease in the selectivity with respect to the resist mask has been a problem. However, according to the present invention, the ion incident surface of the etching mask 7 is constituted by the SOG buried film 6b. , The etching selectivity is large enough,
Therefore, a dimensional conversion difference between the etching mask 7 and the wiring pattern 3p hardly occurred.

Finally, a cleaning process using a resist stripping solution and pure water cleaning were performed to remove the etching mask 7 as shown in FIG. The pure water cleaning was sufficiently performed to remove the buried SOG film 6b separated and floating from the resist pattern 4p. Although the etching mask 7 can be almost completely removed by this process, for example, when the resist pattern 4p has a large line width and cannot be sufficiently removed only by the resist stripping solution, O ₂ plasma ashing is performed. May be used to ensure complete removal of the resist.

Although the specific embodiments of the present invention have been described above, the present invention is not limited to these embodiments, and the configuration of the wafer, the dimensions of each member on the wafer, the forming method, and the constituent materials The details of process conditions such as exposure and baking can be changed or selected as appropriate.

[0032]

As is clear from the above description, according to the present invention, a high-etching film is formed by forming a self-aligned etching-resistant material film while skillfully utilizing the photosensitive characteristics of a positive-type photoresist film. It is possible to form an etching mask having resistance, and thereby, it is possible to form a fine pattern with high precision while suppressing a dimensional conversion difference and shape deterioration. Therefore, the present invention greatly contributes to miniaturization, high integration, and high reliability of a semiconductor device.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view showing a state in which selective underexposure is performed on a positive photoresist film on a wafer via a photomask in a process example of forming a wiring pattern by applying the present invention. FIG.

FIG. 2 is a schematic cross-sectional view showing a state where a groove is formed by developing the positive photoresist film of FIG. 1;

FIG. 3 is a schematic cross-sectional view showing a state where an SOG film is formed so as to fill a groove of FIG. 2 and flatten the surface of a base.

FIG. 4 is a schematic cross-sectional view showing a state in which the SOG film of FIG. 3 is etched back until an upper surface of a positive photoresist film is exposed to form an SOG buried film.

5 is a schematic cross-sectional view showing a state in which RIE of a positive photoresist film is performed using the SOG embedded film of FIG. 4 as a mask to form an etching mask.

FIG. 6 is a view showing an example in which R is applied to a wiring film through the etching mask shown in FIG.
It is a typical sectional view showing the state where IE was performed.

FIG. 7 is a schematic cross-sectional view showing a state where the etching mask of FIG. 6 is removed.

FIG. 8 is a schematic cross-sectional view showing a state in which a selective underexposure is performed on a positive photoresist film on a wafer via a photomask in a conventional process example of forming a wiring pattern.

FIG. 9 is a schematic cross-sectional view showing a state where an opening is formed by developing the positive photoresist film of FIG. 8;

FIG. 10 is a schematic cross-sectional view showing a state where a resist pattern is formed by etching back the positive photoresist film of FIG. 9;

FIG. 11 is a schematic cross-sectional view showing a state in which RIE of the interlayer insulating film is performed through the resist pattern of FIG. 10 to form a contact hole.

FIG. 12 is a schematic cross-sectional view showing a state where the resist pattern of FIG. 11 is removed.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 interlayer insulating film 3 wiring film 3p wiring pattern 4 positive type photoresist film 4e exposure part 4p resist pattern 5 groove part 6 SOG film 6b SOG buried film 7 etching mask 10 photomask 11 reticle substrate 12 light shielding film pattern

Claims (5)

[Claims] A first step of forming a positive photoresist film on a layer to be processed; and a resist reaction with respect to the positive photoresist film from a surface layer portion to a partial depth in a film thickness direction. A second step of performing selective exposure via a photomask under conditions that can occur, a third step of performing development to form a recess corresponding to the selective exposure portion in the positive photoresist film, and an etching-resistant material in the recess. A fourth step of embedding a film, and performing anisotropic etching of the positive photoresist film and the layer to be processed using at least the etching resistant material film as a mask, so that a width substantially equal to the width of the opening end of the concave portion is obtained. A fifth step of forming a pattern of the positive photoresist film and a pattern of the layer to be processed, and removing the pattern of the positive photoresist film using a resist release agent Method of manufacturing a semiconductor device having a sixth step, the that. 2. The step of embedding the etching-resistant material film in the recess in the fourth step is performed by removing the etching-resistant material film formed so as to cover the entire surface of the positive-type photoresist film. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the method is performed by removing the film until the surface of the film is exposed. 3. The method according to claim 2, wherein the etching-resistant material film is removed by etch-back. 4. The semiconductor device according to claim 1, wherein, in the fifth step, anisotropic etching of the positive photoresist film and anisotropic etching of the layer to be processed are performed according to respective optimum conditions. Production method. 5. The method according to claim 1, wherein the processed layer is a wiring film, and the etching-resistant material film is a spin-on-glass film.