JPH0614092B2 - Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits - Google Patents

Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits

Info

Publication number
JPH0614092B2
JPH0614092B2 JP5428690A JP5428690A JPH0614092B2 JP H0614092 B2 JPH0614092 B2 JP H0614092B2 JP 5428690 A JP5428690 A JP 5428690A JP 5428690 A JP5428690 A JP 5428690A JP H0614092 B2 JPH0614092 B2 JP H0614092B2
Authority
JP
Japan
Prior art keywords
circuit board
circuit
test
insulating layer
test method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5428690A
Other languages
Japanese (ja)
Other versions
JPH03255966A (en
Inventor
光司 大川
道彦 吉岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Cable Industries Ltd
Original Assignee
Mitsubishi Cable Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Cable Industries Ltd filed Critical Mitsubishi Cable Industries Ltd
Priority to JP5428690A priority Critical patent/JPH0614092B2/en
Priority to GB9104718A priority patent/GB2242750B/en
Publication of JPH03255966A publication Critical patent/JPH03255966A/en
Publication of JPH0614092B2 publication Critical patent/JPH0614092B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/12Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing
    • G01R31/1227Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials
    • G01R31/1263Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation
    • G01R31/129Testing dielectric strength or breakdown voltage ; Testing or monitoring effectiveness or level of insulation, e.g. of a cable or of an apparatus, for example using partial discharge measurements; Electrostatic testing of components, parts or materials of solid or fluid materials, e.g. insulation films, bulk material; of semiconductors or LV electronic components or parts; of cable, line or wire insulation of components or parts made of semiconducting materials; of LV components or parts

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Relating To Insulation (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は混成集積回路すなわちハイブリッドIC形成用
の回路基板について製品の耐電圧性の良否を判別する試
験方法に関するものである。
Description: TECHNICAL FIELD The present invention relates to a test method for determining whether or not a withstand voltage of a product is good for a hybrid integrated circuit, that is, a circuit board for forming a hybrid IC.

(従来の技術) 高密度実装或はハイパワーのハイブリッドIC用等の回
路基板として、ヒートシンクとなる金属ベース例えばア
ルミベースの上にエポキシ樹脂、ポリイミド等の有機絶
縁物より成る絶縁層もしくはガラスエポキシ等の有機絶
縁物を含む絶縁層を有し、更にこの上に回路導体を設け
た回路基板が多用されている。このような回路基板の耐
電圧性すなわち絶縁破壊強度をテストするルーチンの製
品検査では、専ら、回路基板の回路導体と金属ベースと
の間にAC2〜5KVの電圧を1分間課電する試験方法が
採用され、この試験により絶縁破壊を生じるか否かによ
り製品の絶縁破壊強度の良否を判別している。
(Prior Art) As a circuit board for high-density mounting or high-power hybrid IC, etc., an insulating layer made of an organic insulating material such as epoxy resin or polyimide on a metal base such as an aluminum base to be a heat sink, or glass epoxy, etc. There is often used a circuit board having an insulating layer containing the organic insulating material, and further having a circuit conductor provided thereon. In the routine product inspection for testing the withstand voltage property of the circuit board, that is, the dielectric breakdown strength, a test method for applying a voltage of 2 to 5 KV AC for 1 minute between the circuit conductor of the circuit board and the metal base is exclusively used. Adopted, this test determines whether the dielectric breakdown strength of the product is good or not depending on whether dielectric breakdown occurs.

一方、30年或は40年以上という長期の信頼性が要求
される高電圧ケーブル、電力用コンデンサ、変圧器等の
高電圧電気機器について、絶縁層中のボイド等による絶
縁層の内部放電すなわち部分放電を測定する部分放電測
定が知られている。この部分放電測定は電気機器の絶縁
性能の長期の信頼性を評価するのに有効であり、高電圧
用の電気機器の研究開発、認定試験等における絶縁性能
の長期信頼性の評価や長期使用中の電気機器の絶縁性能
の劣化度合の診断に利用されている。また、例えば電力
用ケーブルについて言えば、最近は60KV以上の高圧ケ
ーブルについては製品出荷前に行う製品検査においても
部分放電測定を行っているが、この場合も、部分放電測
定は絶縁性能の長期の信頼性をチエックするものであ
り、製品の絶縁破壊強度の良否を判別する試験として
は、別に交流電圧破壊試験、直流衝撃電圧破壊試験を行
っている。
On the other hand, for high-voltage cables, power capacitors, transformers and other high-voltage electrical equipment that requires long-term reliability of 30 or 40 years or more, internal discharge of the insulation layer due to voids in the insulation layer, that is, partial Partial discharge measurement, which measures the discharge, is known. This partial discharge measurement is effective for evaluating the long-term reliability of the insulation performance of electrical equipment, and is useful for evaluating the long-term reliability of insulation performance in high-voltage electrical equipment research and development and certification tests, and during long-term use. It is used to diagnose the degree of deterioration of the insulation performance of electrical equipment. In addition, regarding power cables, for example, recently, for high-voltage cables of 60 KV or more, partial discharge measurement is also carried out during product inspection before product shipment. In this case, partial discharge measurement is also effective for long-term insulation performance. This is to check the reliability, and as a test for determining the quality of the dielectric breakdown strength of the product, an AC voltage breakdown test and a DC shock voltage breakdown test are separately performed.

(発明が解決しようとする課題) 前記した金属ベース上に有機絶縁物より成る絶縁層もし
くは有機絶縁物を含む絶縁層を有し、更にその上に回路
導体を設けた回路基板にトランジスタ等の半導体素子、
抵抗、コンデンサ等を搭載して電子的機能をもつモジュ
ールまたはボード、いわゆる実装品を製造する場合に、
前述した耐電圧試験に合格した基板を使用しているにも
拘らず、実装品を製造する製造過程中に行われる耐電圧
試験或は実装品の製造後の耐電圧試験において回路基板
の絶縁層に絶縁破壊を生じることが少なくない。そこ
で、金属ベースと回路導体との間に印加する電圧を高く
して回路基板の耐電圧試験の試験条件をシビヤにして
も、実装品の製造過程中もしくは製造後に行う耐電圧試
験において回路基板の絶縁層に絶縁破壊を生じる頻度に
は変化がないかもしくは却って悪化する。
(Problems to be Solved by the Invention) A semiconductor such as a transistor is provided on a circuit board having an insulating layer made of an organic insulating material or an insulating layer containing an organic insulating material on the metal base, and a circuit conductor provided on the insulating layer. element,
When manufacturing a module or board that has electronic functions by mounting resistors, capacitors, etc., so-called mounted products,
Insulation layer of the circuit board in the withstand voltage test that is performed during the manufacturing process of manufacturing the mounted product or the withstand voltage test after manufacturing the mounted product, even though the board that has passed the above-mentioned withstand voltage test is used. It often happens that dielectric breakdown occurs. Therefore, even if the voltage applied between the metal base and the circuit conductor is increased to set the test condition of the withstand voltage test of the circuit board to "Shibiya", the withstand voltage test of the circuit board is performed during or after the manufacturing process of the mounted product. The frequency of dielectric breakdown in the insulating layer remains unchanged or worsens.

この事実は、従来の耐電圧試験法では、回路基板の耐電
圧性すなわち絶縁破壊強度を充分に評価することができ
ないことを意味するものであり、実装品の製造過程中或
は製造後に行う耐電圧試験において絶縁破壊するような
回路基板を確実に判別し、排除できる新らしい試験方法
を確立することが必要である。
This fact means that the conventional dielectric strength test method cannot fully evaluate the dielectric strength of the circuit board, that is, the dielectric breakdown strength. It is necessary to establish a new test method that can reliably identify and eliminate circuit boards that cause dielectric breakdown in voltage tests.

本発明はこの新らしい課題を解決しようとするものであ
る。
The present invention seeks to solve this new problem.

(課題を解決するための手段) 本発明の耐電圧試験方法は、金属ベース上に有機絶縁物
より成るもしくは有機絶縁物を含む絶縁物より成る絶縁
層を有し、更にその上に回路導体を有する混成集積回路
用回路基板について製品の絶縁破壊強度の良否を判別す
る試験方法であって、回路基板の回路導体と金属ベース
との間に所定電圧を印加して絶縁層中の部分放電を測定
し、放電電荷の大小により当該回路基板の絶縁破壊強度
の良否を判別することを特徴とするものである。
(Means for Solving the Problems) The withstand voltage test method of the present invention has an insulating layer made of an organic insulating material or an insulating material containing an organic insulating material on a metal base, and further has a circuit conductor formed thereon. A test method for determining whether the dielectric breakdown strength of a product has a circuit board for a hybrid integrated circuit, and measuring a partial discharge in the insulating layer by applying a predetermined voltage between the circuit conductor of the circuit board and the metal base. However, the quality of the dielectric breakdown strength of the circuit board is determined based on the magnitude of the discharged electric charge.

放電電荷が所定値を越える大きさになる回路基板は、実
装品の製造中或は製造後の耐電圧試験において絶縁破壊
を生じる可能性が大きいものであり、これらは絶縁破壊
強度不良として製品から排除される。実際の検査におい
ては、放電電荷量の最大値を測定することは必ずしも必
要ではなく、簡便に、所定電圧を印加したときに所定の
値を越える放電電荷の放電が有るか、無いかにより絶縁
破壊強度の良否を判別することもできる。
A circuit board whose discharge charge exceeds the specified value has a high possibility of causing a dielectric breakdown during the withstand voltage test during or after the manufacturing of the mounted product. Will be eliminated. In the actual inspection, it is not always necessary to measure the maximum value of the discharge charge amount, and simply, when the predetermined voltage is applied, the dielectric breakdown depending on whether or not the discharge charge exceeds the predetermined value is discharged. It is also possible to determine the quality of the strength.

ここに言う放電電荷とは、所定電圧を印加したときに所
定の頻度数以上の発生頻度で生じる放電電荷を言い、所
定の頻度数としては10pps、20pps、100pps等を
適宜に選ぶことができるが、通常は商用サイクル数に合
わせて50pps、60ppsに選ぶのが便利である。
The discharge charge referred to here is a discharge charge generated at a frequency of occurrence of a predetermined frequency or more when a predetermined voltage is applied, and the predetermined frequency can be appropriately selected from 10 pps, 20 pps, 100 pps, etc. Normally, it is convenient to select 50 pps or 60 pps according to the number of commercial cycles.

なお、上記本発明で言う回路導体は、絶縁層上の導体箔
をエッチングして形成した導体回路およびエッチング前
の導体箔の双方を含むものである。
The circuit conductor referred to in the present invention includes both the conductor circuit formed by etching the conductor foil on the insulating layer and the conductor foil before etching.

(作用) 従来の耐電圧試験に合格した回路基板を使用しているに
も拘らず、実装品の製造過程中或は製造後の耐電圧試験
において絶縁破壊した回路基板につき、本願発明者が精
密に検討した所、絶縁破壊は回路基板の絶縁層中に存在
するボイドに起因している。実装品メーカにおける耐電
圧試験の繰り返し、或は回路基板の製品検査自体におけ
る高電圧の印加が回路基板の絶縁層中のボイドに放電を
生じさせて絶縁層の有機絶縁物を劣化させ、絶縁層の厚
さが極めて薄いという回路基板の特異性と相俟って、回
路基板の製品検査における耐電圧試験に合格した回路基
板でありながら、実装品の製造過程中或は製造後の耐電
圧試験において絶縁破壊を生じていたものと考えられ
る。このことは、回路基板に対する従来の耐電圧試験に
おいて印加電圧を高め、耐電圧試験の条件をシビアにし
ても、実装品製造過程中或は製造後の耐電圧試験におい
て回路基板に絶縁破壊を生じる頻度があまり変らないか
或は却って増大するという前述の結果ともよく符合す
る。従って回路基板の絶縁破壊強度を充分に評価でき、
実装品の製造過程中或は製造後の耐電圧試験において絶
縁破壊するような絶縁破壊強度が不足する製品を完全に
排除できる試験としては、本発明のように、回路基板の
絶縁層中のボイドによる内部放電の状況を観測し、これ
に基づいて良否を判定する試験を欠くことができないと
考えられる。
(Function) The inventor of the present invention has made a precise determination regarding a circuit board that has undergone insulation breakdown during a withstand voltage test during or after the manufacturing process of a mounted product, despite using a conventional circuit board that has passed the withstand voltage test. The dielectric breakdown is caused by the voids existing in the insulating layer of the circuit board. Repeated withstand voltage test by the manufacturer of the mounted product or application of high voltage during product inspection of the circuit board causes discharge in voids in the insulating layer of the circuit board, degrading the organic insulator of the insulating layer, and In combination with the peculiarity of the circuit board that the thickness of the circuit board is extremely thin, it is a circuit board that has passed the withstand voltage test in product inspection of the circuit board, but withstand voltage test during or after the manufacturing process of the mounted product. It is probable that there was a dielectric breakdown in. This means that dielectric breakdown occurs in the circuit board during the withstand voltage test during or after the manufacturing process of the mounted product, even if the applied voltage is increased in the conventional withstand voltage test for the circuit board and the conditions of the withstand voltage test are severe. It is in good agreement with the above result that the frequency does not change much or increases on the contrary. Therefore, the dielectric breakdown strength of the circuit board can be fully evaluated,
As a test that can completely eliminate a product having insufficient dielectric breakdown strength such as dielectric breakdown during a withstand voltage test during or after the manufacturing process of a mounted product, as in the present invention, a void in an insulating layer of a circuit board is used. It is considered necessary to conduct a test for observing the state of internal discharge due to the above and determining pass / fail based on this.

部分放電測定は、絶縁層中のボイド等による内部放電を
観測する測定方法であり、放電開始電圧の測定、放電消
滅電圧の測定、コロナ平均電流の測定等の種々の試験方
法があるが、本発明においては回路導体と金属ベースと
の間に所定電圧を印加したときの絶縁層中の内部放電に
よる放電電荷を測定し、その大小により回路基板の絶縁
破壊強度の良否を判定する。より簡便には、所定電圧を
印加したとき、所定の値を越える放電電荷の放電の有無
を検出することにより回路基板の絶縁破壊強度の良否を
判定する。これは放電電荷量が大きい程有機絶縁物を劣
化させ、極めて薄い回路基板絶縁層を絶縁破壊させるの
で、本発明の課題に対し最も合目的的であること、試験
の感便さがルーチンワークとしての製品検査に適してい
ることによる。
Partial discharge measurement is a measurement method for observing internal discharge due to voids in the insulating layer, and there are various test methods such as discharge start voltage measurement, discharge extinction voltage measurement, and corona average current measurement. In the present invention, the discharge charge due to the internal discharge in the insulating layer when a predetermined voltage is applied between the circuit conductor and the metal base is measured, and the quality of the dielectric breakdown strength of the circuit board is determined by the magnitude thereof. More simply, when a predetermined voltage is applied, it is determined whether or not the dielectric breakdown strength of the circuit board is good by detecting the presence or absence of discharge of a discharge charge that exceeds a predetermined value. This is because the organic insulator is deteriorated as the amount of discharged electric charge is large and the extremely thin circuit board insulating layer is dielectrically broken down. Therefore, it is most purposeful for the problem of the present invention, and the convenience of the test is a routine work. Because it is suitable for product inspection.

回路基板の長時間耐電圧試験の結果と部分放電測定の結
果との相関を示す後記の実験例によっても、短時間で絶
縁破壊する回路基板を上記の部分放電測定によって判別
し、排除することができることが明らかである。
Also by the experimental example described below showing the correlation between the result of the long-term withstand voltage test of the circuit board and the result of the partial discharge measurement, it is possible to identify and eliminate the circuit board that causes dielectric breakdown in a short time by the above partial discharge measurement. It is clear that you can.

なお、前記したように高電圧電力用ケーブル等の電気機
器における製品検査において、交流電圧破壊試験、直流
衝撃電圧破壊試験と共に部分放電測定を行うことがある
が、これらの高電圧用の電気機器は充分な厚さの絶縁層
を備え、交流電圧破壊試験、直流衝撃電圧破壊試験に合
格したものが、その後の使用中において短期間に絶縁破
壊するようなことは、その後の外傷、化学腐食等、特別
な事由がない限り生じないものであり、この場合の部分
放電測定は30年或は40年以上という長期の絶縁性能
の信頼性をみるものである。これに対し、本発明の試験
方法は製品の絶縁破壊強度の良否を判別するためのもの
であり、高電圧電力用ケーブルの製品検査の場合で言え
ば交流電圧破壊試験、直流衝撃電圧破壊試験に相当する
ものであり、高電圧電力用ケーブル等における部分放電
測定とは、その目的、性格を異にする。
As described above, in product inspection of electric equipment such as high-voltage power cables, partial discharge measurement may be performed together with AC voltage breakdown test and DC shock voltage breakdown test. A product that has an insulating layer of sufficient thickness and that has passed the AC voltage breakdown test and DC shock voltage breakdown test, but that will cause dielectric breakdown in a short period of time during subsequent use, such as subsequent external damage, chemical corrosion, etc. It does not occur unless there is a special reason, and the partial discharge measurement in this case is to check the reliability of long-term insulation performance of 30 years or 40 years or more. On the other hand, the test method of the present invention is for determining whether the dielectric breakdown strength of the product is good or bad, and in the case of the product inspection of the high-voltage power cable, the AC voltage breakdown test and the DC shock voltage breakdown test are performed. It is equivalent, and its purpose and character are different from the partial discharge measurement in a cable for high-voltage power.

(実施例) まず、本発明の試験方法の対象とする回路基板の具体例
について説明する。
(Example) First, a specific example of a circuit board which is a target of the test method of the present invention will be described.

第1図(イ)(ロ)(ハ)(ニ)および(ホ)は、それぞれ回路板の断
面図を示すものであり、何れも、ヒートシンクとなる金
属ベース1の上に絶縁層2を有し、更にその上に銅の回
路導体3を有している。第1図(イ)および(ロ)の回路基板
においては絶縁層2は、ポリイミドフィルム等のポリマ
ーフィルム21とその上下のエポキシ樹脂等の接着材層
22とにより構成されている。第1図(ハ)および(ニ)で
は、絶縁層2がエポキシ樹脂等の接着材層であり、この
接着材層には熱伝導性を向上させるために無機フイラー
を混入することが多い。第1図(ホ)では、絶縁層2がガ
ラスエポキシ層により構成されている。回路導体3につ
いては、第1図(ホ)では絶縁層2の上に張られた導体箔
(エッチング前)が示されており、第1図(イ)〜(ハ)にお
いては、導体箔をエッチングして回路を形成した回路導
体が示されている。4は、エッチングされて回路を形成
している回路導体の側面およびエッジを封止する絶縁性
或は半導電性の材料による封止部で、該封止部は回路導
体のエッジ部からのコロナ放電を抑止する効果を有し、
本願発明者等が特願昭61−313969号において提案した
ものである。
1 (a), (b), (c), (d), and (e) are cross-sectional views of the circuit board, respectively, in which the insulating layer 2 is provided on the metal base 1 serving as a heat sink. And further has a copper circuit conductor 3 thereon. In the circuit boards shown in FIGS. 1A and 1B, the insulating layer 2 is composed of a polymer film 21 such as a polyimide film and an adhesive layer 22 such as an epoxy resin above and below the polymer film 21. In FIGS. 1C and 1D, the insulating layer 2 is an adhesive layer such as an epoxy resin, and an inorganic filler is often mixed in this adhesive layer in order to improve thermal conductivity. In FIG. 1 (e), the insulating layer 2 is composed of a glass epoxy layer. Regarding the circuit conductor 3, a conductor foil (before etching) stretched on the insulating layer 2 is shown in FIG. 1 (e), and a conductor foil is shown in FIGS. 1 (a) to 1 (c). Circuit conductors are shown etched to form circuits. Reference numeral 4 denotes a sealing portion made of an insulative or semiconductive material that seals the side surface and the edge of the circuit conductor that is etched to form a circuit, and the sealing portion is a corona from the edge portion of the circuit conductor. Has the effect of suppressing discharge,
This is proposed by the inventors of the present application in Japanese Patent Application No. 61-313969.

これらの回路基板の寸法の一例を示せば、金属ベースの
厚さが通常2〜3mm、回路導体の厚さが通常35μmで
あり、絶縁層の厚さは第1図(イ)および(ロ)に示す回路基
板の場合で通常50μm(ポリマークフィルムの厚さが
通常25μm)第1図(ハ)および(ニ)に示す回路基板の場合
で通常100μmである。
To give an example of the dimensions of these circuit boards, the thickness of the metal base is usually 2 to 3 mm, the thickness of the circuit conductor is usually 35 μm, and the thickness of the insulating layer is shown in FIGS. 1 (a) and (b). In the case of the circuit board shown in FIG. 1, it is usually 50 μm (the thickness of the polymer film is usually 25 μm), and in the case of the circuit board shown in FIGS.

第2図に銅箔をエッチングして形成した導体回路の一例
を上面図により示している。図においては見易くするた
めに回路導体3にハッチングを付している。
FIG. 2 shows a top view of an example of a conductor circuit formed by etching a copper foil. In the figure, the circuit conductors 3 are hatched for the sake of clarity.

第1図(イ)〜(ニ)の何れの回路基板においても接着材層2
2或は絶縁層2たる接着材層を金属ベース、銅箔、ポリ
マーフィルム等に塗布する場合に接着材層中にボイドが
混入し易い。特に接着材が無機フイラー入りの場合、或
は接着材の1回の塗布厚さが比較的厚く30μm(乾燥
後の厚さ)を越えるような場合に接着材層中にボイドが
混在し易い。
In any of the circuit boards shown in FIGS. 1 (a) to 1 (d), the adhesive layer 2 is used.
When the adhesive layer 2 or the insulating layer 2 is applied to a metal base, a copper foil, a polymer film or the like, voids are easily mixed in the adhesive layer. In particular, when the adhesive contains an inorganic filler, or when the thickness of one application of the adhesive is relatively thick and exceeds 30 μm (the thickness after drying), voids are likely to be mixed in the adhesive layer.

従って第1図(ハ)および(ニ)に示したタイプの回路基板で
あって絶縁層2が無機フイラー入りの接着材より成る回
路基板は、絶縁層にボイドを混入し易く、従来の耐電圧
試験に合格した回路基板でありながら、実装品の製造過
程中或は製造後の耐電圧試験において回路基板の絶縁層
に絶縁破壊を生じるという現象が最も生じ易い。従って
このような回路基板の製品検査において本発面の試験方
法は最も効果的である。
Therefore, the circuit board of the type shown in FIGS. 1 (c) and 1 (d), in which the insulating layer 2 is made of an adhesive material containing an inorganic filler, is apt to mix voids in the insulating layer, and is Even though the circuit board has passed the test, the phenomenon that dielectric breakdown occurs in the insulating layer of the circuit board is most likely to occur during the withstand voltage test during or after the manufacturing process of the mounted product. Therefore, in the product inspection of such a circuit board, the test method of the original surface is most effective.

部分放電測定自体は、既によく知られているものであ
り、本発明の方法における部分放電測定も市販されてい
る公知の部分放電測定器を用いて行うことができる。
The partial discharge measurement itself is already well known, and the partial discharge measurement in the method of the present invention can be carried out using a known commercially available partial discharge measuring instrument.

部分放電測定は、高電圧を印加したときに発生する部分
放電に基づく微少電圧を測定するものであるから、各種
雑音の影響を受け易い。従って試験回路の構成において
は雑音の発生源ないしは侵入経路を断つ或は侵入した雑
音を除去する等の雑音対策が講じられるが、測定対象た
る回路基板についても、測定時に回路導体のエッジ部等
からのコロナ放電等の雑音により測定が妨害されないよ
うにする必要がある。このため課電用電極は丸味をもた
せる等コロナ放電を生じ難い構造、形状とし、また回路
基板を絶縁油中に浸漬して測定を行う、ガード電極を設
ける等の工夫、対策が必要である。
Since the partial discharge measurement measures a minute voltage based on the partial discharge generated when a high voltage is applied, it is easily affected by various noises. Therefore, in the configuration of the test circuit, noise countermeasures such as cutting off the source of noise or the intrusion route or removing the intruding noise are taken, but the circuit board to be measured is also measured from the edge of the circuit conductor at the time of measurement. It is necessary to prevent the measurement from being disturbed by noise such as corona discharge. For this reason, it is necessary to take measures and measures such as providing a round electrode with a structure and a shape that are unlikely to cause corona discharge, and immersing the circuit board in insulating oil for measurement, and providing a guard electrode.

この点において有利なのは第1図(ロ)および(ニ)に示して
いる回路基板のように、回路導体の側面およびエッジン
を絶縁性或は半導電性材料により封止した回路基板であ
り、この場合には回路導体のエッジからのコロナ放電が
封止部4により有効に抑止されるので、空気中において
試験を行うことができ、絶縁油中への浸漬、試験後の回
路基板からの絶縁油の除去といった面倒さがない。
In this respect, what is advantageous is a circuit board in which the side surface and the edge of the circuit conductor are sealed with an insulating or semi-conductive material like the circuit board shown in FIGS. 1 (b) and 1 (d). In this case, the corona discharge from the edge of the circuit conductor is effectively suppressed by the sealing portion 4, so that the test can be performed in the air, the immersion in the insulating oil, and the insulating oil from the circuit board after the test. There is no trouble of removing.

試験においては、例えば第2図に示す回路導体のように
数個の回路導体が互いに絶縁されて存在する場合には、
各導体それぞれに課電電極を接触させ、これらを一括し
て試験回路に接続する。また本発明の試験方法は製品検
査に適用するものであるから、例えば30個等、多数個
の製品につき同時に試験するのが望ましく、被試験回路
基板それぞれの課電電極を一括して試験回路に接続す
る。
In the test, when several circuit conductors exist such that they are insulated from each other, such as the circuit conductor shown in FIG. 2,
The charging electrode is brought into contact with each conductor, and these are collectively connected to the test circuit. Further, since the test method of the present invention is applied to product inspection, it is desirable to test a large number of products at the same time, for example, 30 products. Connecting.

回路導体と金属ベースの間に印加する電圧は、本発明の
場合、1〜3KVの範囲に選ぶのが適当であり、通常2KV
である。
In the case of the present invention, it is appropriate to select the voltage applied between the circuit conductor and the metal base in the range of 1 to 3 KV, usually 2 KV.
Is.

本発明においては部分放電測定で測定した放電電荷の大
小により回路基板の絶縁破壊強度の良否を判定するが、
その判定の基準とする放電電荷の大きさは、絶縁層の厚
さ、絶縁層の構成(内部放電による絶縁層の劣化の難易
等)、当該基板を使用する実装品の使用電圧等により異
なり、一概には言えないが、通常10〜20PC(ピコ
クーロン)程度に選ぶのが適当である。厳密には長時間
課電試験との対比等により定めるのが好ましい。
In the present invention, the quality of the dielectric breakdown strength of the circuit board is determined by the magnitude of the discharge charge measured by the partial discharge measurement,
The magnitude of the discharge charge used as a criterion for the determination depends on the thickness of the insulating layer, the configuration of the insulating layer (such as difficulty of deterioration of the insulating layer due to internal discharge), the operating voltage of the mounted product using the board, and the like. Although it cannot be generally stated, it is usually appropriate to select about 10 to 20 PC (pico coulomb). Strictly speaking, it is preferable to determine it by comparison with a long-term voltage application test.

次に本発明の試験方法により試験した部分放電測定と長
時間耐電圧とを対比した実験例について述べる。
Next, an experimental example comparing the partial discharge measurement tested by the test method of the present invention and the long-term withstand voltage will be described.

(実験例) 厚さ35μmの銅箔を厚さ100μmの無機フイラー混
入エポキシ樹脂接着材層を介して厚さ2.0mmのアルミ
ニウムベース上に接着した基板の銅箔をエッチングして
回路導体を形成した混成集積回路用回路基板の試料を絶
縁油中に浸漬して回路導体とアルミニウムベースとの間
にAC2KVのい電圧を印加し、三菱電線工業株式会社製
の部分放電測定器QM−20を用いて60ppsの最大放
電電荷を測定した。この測定結果から最大放電電荷が大
きい試料を5試料選び、また最大放電電荷が小さい試料
を5試料選び、合計10試料について空気中で回路導体
とアルミニウムベースとの間にAC2KVを課電する長時
間課電試験を行った。各試料の最大放電電荷絶縁破壊す
る迄の課電時間、絶縁破壊場所はそれぞれ表1に示す通
りであった。
(Experimental example) A circuit conductor is formed by etching a copper foil of a substrate in which a 35 μm-thick copper foil is bonded onto an aluminum base having a thickness of 2.0 mm through an epoxy resin adhesive layer mixed with an inorganic filler having a thickness of 100 μm. A sample of the hybrid integrated circuit circuit board was immersed in insulating oil to apply a voltage of AC2KV between the circuit conductor and the aluminum base, and a partial discharge measuring instrument QM-20 manufactured by Mitsubishi Cable Industries, Ltd. was used. The maximum discharge charge of 60 pps was measured. From this measurement result, 5 samples with large maximum discharge charge and 5 samples with small maximum discharge charge were selected, and a total of 10 samples were charged with AC2KV between the circuit conductor and aluminum base in air for a long time. Conducted a voltage test. Table 1 shows the voltage application time until the maximum discharge charge dielectric breakdown and the dielectric breakdown location of each sample.

表1から明らかなように放電電荷量が大きい試料は短時
間で絶縁破壊しており、しかも絶縁破壊場所が回路導体
の銅箔の下の絶縁層である。一方、放電電荷量が小さい
試料は回路導体のエッジ部の下で絶縁破壊している。こ
の結果は、放電電荷が大きいものは絶縁層中に欠陥があ
りこのため短時間で破壊していることを示し、放電電荷
が小さいものは絶縁層に欠陥がなく、長時間課電中に導
体回路エッジ部に生じたコロナ放電により絶縁層が劣化
し絶縁破壊に至っていることを示している。本発明に従
って、放電電荷の大小により混成集積回路用回路基板の
絶縁破壊強度の良否を判別すれば、従来の1分間の耐電
圧試験には合格してもその後短時間で絶縁破壊するよう
な製品を排除できることが表1の結果によく示されてい
る。
As is clear from Table 1, the sample having a large amount of discharged electric charge was subjected to dielectric breakdown in a short time, and the location of the dielectric breakdown was the insulating layer below the copper foil of the circuit conductor. On the other hand, the sample with a small discharge charge has a dielectric breakdown under the edge portion of the circuit conductor. This result shows that the one with a large discharge charge has a defect in the insulating layer and therefore it is destroyed in a short time, and the one with a small discharge charge has no defect in the insulating layer and shows a conductor during long-term charging. It shows that the insulating layer deteriorates due to the corona discharge generated at the circuit edge, leading to dielectric breakdown. According to the present invention, if the breakdown strength of the circuit board for a hybrid integrated circuit is determined by the magnitude of the discharge charge, the product will be able to breakdown in a short time after passing the conventional 1 minute withstand voltage test. It is well shown in the results in Table 1 that the can be eliminated.

(発明の効果) 上記説明した通り、従来の耐電圧試験では回路基板の絶
縁破壊強度が充分に評価できずに、耐電圧試験に合格し
た回路基板であっても、これを使用した実装品の製造過
程中或は製造後の耐電圧試験において回路基板の絶縁層
が絶縁破壊するというような事故が少なくなかったが、
本発明の試験方法によれば、このような事故の可能性を
もつ、絶縁破壊強度が充分でない製品を確実に判別で
き、出荷製品から排除することができる。
(Effects of the Invention) As described above, even if the circuit board has passed the withstand voltage test because the conventional dielectric strength test cannot sufficiently evaluate the dielectric breakdown strength of the circuit board, There were not a few accidents such as dielectric breakdown of the insulating layer of the circuit board during the withstand voltage test during or after the manufacturing process.
According to the test method of the present invention, a product having a possibility of such an accident and having insufficient dielectric breakdown strength can be reliably identified and excluded from shipped products.

また、回路基板製品の絶縁破壊強度の良否判定を本発明
の試験方法により行い、従来の耐電圧試験を廃止する場
合には、本発明の試験方法では従来の耐電圧試験に較べ
て課電電圧を低くできる場合が多いので、この場合は試
験のための高電圧の課電による製品の絶縁劣化も少なく
なる。
Further, when the quality of the dielectric breakdown strength of the circuit board product is determined by the test method of the present invention and the conventional withstand voltage test is abolished, the test method of the present invention uses the applied voltage in comparison with the conventional withstand voltage test. In many cases, the insulation deterioration of the product due to the application of high voltage for the test is also reduced in this case.

【図面の簡単な説明】[Brief description of drawings]

第1図(イ)〜(ホ)は、いずれも本発明の試験方法の
対象とする回路基板の断面図であり、第2図は他の試験
対象回路基板例の上面図である。 1……金属ベース、2……絶縁層、3……回路導体
1 (a) to 1 (e) are sectional views of a circuit board which is a target of the test method of the present invention, and FIG. 2 is a top view of another example of the circuit board to be tested. 1 ... metal base, 2 ... insulating layer, 3 ... circuit conductor

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】金属ベース上に有機絶縁物より成るもしく
は有機絶縁物を含む絶縁物より成る絶縁層を有し、更に
その上に回路導体を有する混成集積回路用回路基板につ
いて製品の絶縁破壊強度の良否を判別する試験方法であ
って、回路基板の回路導体と金属ベースの間に所定電圧
を印加して絶縁層中の部分放電を測定し、放電電荷の大
小により当該回路基板の絶縁破壊強度の良否を判別する
ことを特徴とする混成集積回路用回路基板の製品検査用
耐電圧試験方法。
1. A circuit board for a hybrid integrated circuit having an insulating layer made of an organic insulating material or an insulating material containing an organic insulating material on a metal base, and further having a circuit conductor thereon. Is a test method to determine whether the circuit board is good or bad, and a certain voltage is applied between the circuit conductor of the circuit board and the metal base to measure partial discharge in the insulating layer. A withstand voltage test method for product inspection of a circuit board for a hybrid integrated circuit, characterized in that the quality of the product is determined.
【請求項2】混成集積回路用回路基板の絶縁層が無機フ
イラー入りの接着材より成ることを特徴とする請求項
(1)記載の混成集積回路用回路基板の製品検査用耐電圧
試験方法。
2. The insulating layer of the circuit board for a hybrid integrated circuit is made of an adhesive material containing an inorganic filler.
(1) Withstanding voltage test method for product inspection of a circuit board for a hybrid integrated circuit as described above.
【請求項3】回路導体の側面およびエッジが電気絶縁性
もしくは半導電性の材料により封止されていることを特
徴とする請求項(1)又は(2)記載の混成集積回路用回路基
板の製品検査用耐電圧試験方法。
3. The circuit board for a hybrid integrated circuit according to claim 1, wherein the side surface and the edge of the circuit conductor are sealed with an electrically insulating or semiconductive material. Withstand voltage test method for product inspection.
JP5428690A 1990-03-06 1990-03-06 Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits Expired - Lifetime JPH0614092B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP5428690A JPH0614092B2 (en) 1990-03-06 1990-03-06 Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits
GB9104718A GB2242750B (en) 1990-03-06 1991-03-06 Method of testing for withstand voltage in inspection of circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5428690A JPH0614092B2 (en) 1990-03-06 1990-03-06 Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits

Publications (2)

Publication Number Publication Date
JPH03255966A JPH03255966A (en) 1991-11-14
JPH0614092B2 true JPH0614092B2 (en) 1994-02-23

Family

ID=12966321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5428690A Expired - Lifetime JPH0614092B2 (en) 1990-03-06 1990-03-06 Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits

Country Status (2)

Country Link
JP (1) JPH0614092B2 (en)
GB (1) GB2242750B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010032457A (en) * 2008-07-31 2010-02-12 Hioki Ee Corp Insulation inspecting apparatus and technique
CN107907818B (en) * 2017-10-12 2020-07-31 中车青岛四方机车车辆股份有限公司 Experimental device and experimental method for detecting circuit board under multi-field effect
CN107884701B (en) * 2017-10-12 2020-06-16 中车青岛四方机车车辆股份有限公司 Experimental device and experimental method for circuit board to withstand overvoltage damage
CN107907817B (en) * 2017-10-12 2020-09-11 中车青岛四方机车车辆股份有限公司 Experimental device and experimental method for evaluating quality of circuit board in composite environment
CN107907755B (en) * 2017-10-12 2020-09-11 中车青岛四方机车车辆股份有限公司 Experimental device and experimental method for electric field damage resistance of circuit board

Also Published As

Publication number Publication date
GB2242750B (en) 1994-03-30
JPH03255966A (en) 1991-11-14
GB2242750A (en) 1991-10-09
GB9104718D0 (en) 1991-04-17

Similar Documents

Publication Publication Date Title
Naguib et al. Silver migration and the reliability of Pd/Ag conductors in thick-film dielectric crossover structures
KR20010067250A (en) Material For Improved Sensitivity Of Stray Field Electrodes
Bayer et al. Enhancement of the partial discharge inception voltage of DBCs by adjusting the permittivity of the encapsulation
JPH0614092B2 (en) Withstanding voltage test method for product inspection of circuit boards for hybrid integrated circuits
JP2501011B2 (en) DC low noise measurement system
US7863922B2 (en) Evaluation method of insulating film and measurement circuit thereof
US6333633B1 (en) Method for inspecting a flexible printed circuit
US4583038A (en) Electrical testing
Phloymuk et al. The Dissipation Factor (tan δ) Monitoring of A Stator Winding Insulation of A Synchronous Machine
JPH075223A (en) Insulation property testing method of circuit board
JP6911875B2 (en) Power cable manufacturing method and power cable inspection method
JPH062518U (en) Power cable with tree detector
WO2020225897A1 (en) Semiconductor device, semiconductor device deterioration diagnosis device, and semiconductor device deterioration diagnosis method
Chan et al. Failure analysis of miniaturized multilayer ceramic capacitors in surface mount printed circuit board assemblies
CA1199969A (en) Electrical testing
JP2006266712A (en) Dielectric breakdown test method of substrate material for printed wiring board and printed wiring board by voltage impression for long time or repetitive voltage application
Okumura et al. Proposal for Evaluation of Insulation Performance by Partial Discharge Characteristics of Resin Substrates Containing Micro-Sized Multiple Voids
JPH1078472A (en) Method for diagnosing deterioration of cv cable
Okamoto et al. Copper ion migration in insulated metal substrates
Timpe et al. Laboratory and field partial-discharge studies by a utility
Sato et al. Study on generation of electro-chemical migration in layered insulating films for flexible printed circuit
Mathes Electrical properties of insulating materials
SU1744628A1 (en) Method for determining resistance of film and sheet materials to action of partial discharges
Burgess et al. Device Failures in Pressure Cooker Tests at 130° C
JPH0526950A (en) Method for detecting defective portion of cable insulator