JPH075223A - Insulation property testing method of circuit board - Google Patents

Insulation property testing method of circuit board

Info

Publication number
JPH075223A
JPH075223A JP17215593A JP17215593A JPH075223A JP H075223 A JPH075223 A JP H075223A JP 17215593 A JP17215593 A JP 17215593A JP 17215593 A JP17215593 A JP 17215593A JP H075223 A JPH075223 A JP H075223A
Authority
JP
Japan
Prior art keywords
circuit board
circuit
metal base
partial discharge
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17215593A
Other languages
Japanese (ja)
Inventor
Koji Okawa
光司 大川
Michihiko Yoshioka
道彦 吉岡
Nozomi Fujita
望 藤田
Hidefumi Morita
英史 森田
Hideaki Matsuda
秀秋 松田
Seiji Okada
聖司 岡田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Cable Industries Ltd
Original Assignee
Mitsubishi Cable Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Cable Industries Ltd filed Critical Mitsubishi Cable Industries Ltd
Priority to JP17215593A priority Critical patent/JPH075223A/en
Publication of JPH075223A publication Critical patent/JPH075223A/en
Pending legal-status Critical Current

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  • Testing Relating To Insulation (AREA)

Abstract

PURPOSE:To provide a testing method which enables the judging of the propriety in the insulation property of an insulation layer in a metal base circuit board provided with a circuit conductor through the insulation layer on a metal base. CONSTITUTION:A specific voltage is applied between a circuit conductor 3 of a circuit board 10 and a metal base 1 to measure the frequency of a partial discharge generated in an insulation layer 2. When the frequency of occurrence of the partial discharge in a specified discharged electric charge is large, a rejection is identified and when the frequency of the occurrence is zero or very limited, acceptance is identified.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は金属ベース回路基板にお
ける金属ベースと回路導体との間の絶縁性が良好か否か
を試験するための方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for testing good insulation between a metal base and a circuit conductor in a metal base circuit board.

【0002】[0002]

【従来の技術】金属ベース上に絶縁層を介して回路導体
を設けた金属ベース回路基板は、ハイパワーのハイブリ
ッドIC用等の回路基板として多用されている。このよ
うな回路基板の絶縁性評価試験は、回路導体と金属ベー
スとの間にAC2〜5KVの電圧を1分間課電したとき
の絶縁破壊の有無により判定が行われていた。
2. Description of the Related Art A metal base circuit board having a circuit conductor provided on a metal base via an insulating layer is widely used as a circuit board for high power hybrid ICs and the like. In the insulation evaluation test of such a circuit board, the judgment was made based on the presence or absence of insulation breakdown when a voltage of AC 2 to 5 KV was applied between the circuit conductor and the metal base for 1 minute.

【0003】[0003]

【発明が解決しようとする課題】しかしながら、上記の
試験方法で合格とされた回路基板に部品を実装する過程
もしくは実装後に行われる耐電圧試験において、回路基
板の絶縁層に絶縁破壊が生ずることが少なくなく、当該
試験方法では十分に絶縁層の絶縁性の良否を判定できな
いという問題があった。
However, dielectric breakdown may occur in the insulating layer of the circuit board in the withstand voltage test performed during or after mounting the components on the circuit board that has passed the above test method. Not a little, there is a problem that the test method cannot sufficiently judge the quality of the insulating layer.

【0004】[0004]

【課題を解決するための手段】本発明の回路基板の絶縁
性試験方法は、金属ベース上に絶縁層を介して回路導体
を設けた回路基板の前記回路導体と金属ベースとの間に
所定電圧を印加し、このときに前記絶縁層中に発生する
部分放電の発生頻度を測定することにより、当該回路基
板の絶縁性の良否を判定することを特徴とするものであ
る。
SUMMARY OF THE INVENTION A circuit board insulation test method according to the present invention comprises a circuit board having a circuit conductor provided on a metal base with an insulating layer interposed between the circuit conductor and the metal base. Is applied, and the occurrence frequency of partial discharge that occurs in the insulating layer at this time is measured to judge whether the insulation property of the circuit board is good or bad.

【0005】[0005]

【作用】本発明者らは、金属ベース上の絶縁層の絶縁破
壊強度の良否と、該絶縁層に所定電圧を印加したときに
発生する部分放電の発生頻度との間に、密接な関係があ
ることを見出した。すなわち、特定の放電電荷の部分放
電の発生頻度が大である場合は不良品と判定し、発生頻
度がゼロまたは僅かである場合は合格と判定するもので
ある。
The present inventors have found that there is a close relationship between the quality of the dielectric breakdown strength of the insulating layer on the metal base and the frequency of partial discharge that occurs when a predetermined voltage is applied to the insulating layer. I found that there is. That is, if the frequency of occurrence of partial discharge of a specific discharge charge is high, it is determined as a defective product, and if the frequency of occurrence of partial discharge is zero or very low, it is determined as pass.

【0006】絶縁層の絶縁性の良否は、絶縁層中におけ
るボイドの存在度合に主に依存しているが、従来の耐電
圧試験法で実質的な良否判定を行い得るのは、ほぼボイ
ドフリーであるものと、ボイドがかなり多く存在してい
るもののみであり、ボイドの存在度合が両者の中間的で
ある場合、前述したような初期試験では合格とされたも
のの部品実装過程もしくは実装後の耐圧試験で絶縁破壊
が起きるという不都合が生じる。本発明によれば、上記
のいわば『半不良品』をも事前にチェックし得ることが
判明し、本発明を提案するに至った。
[0006] The quality of insulation of the insulating layer mainly depends on the existence degree of voids in the insulating layer. However, it is almost void-free that the conventional dielectric strength test method can judge the quality. If there is a large number of voids, and the presence degree of voids is intermediate between the two, if the initial test as described above was passed, the component mounting process or after mounting This causes the inconvenience that dielectric breakdown occurs in the withstand voltage test. According to the present invention, it has been found that the so-called "semi-defective product" can be checked in advance, and the present invention has been proposed.

【0007】[0007]

【実施例】図1に、本発明の試験方法の対象となる回路
基板10を例示している。図において、1はアルミニウ
ム板等からなるヒートシンク用の金属ベースであり、こ
の金属ベース1上に絶縁層2及び回路導体3が順次積層
されている。前記絶縁層2は、ポリイミドフィルム等の
絶縁フィルムの両面にエポキシ樹脂系接着材等の接着層
を設けたものや、エポキシ樹脂系接着剤に熱伝導性を向
上させるための無機フィラーを混入させたもの等からな
る。また4は、回路導体3のエッジ部を封止する絶縁性
或いは半導電性の材料からなる封止部であり、これは回
路導体3のエッジ部からのコロナ放電を防止するために
設けられている。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 illustrates a circuit board 10 which is the subject of the test method of the present invention. In the figure, reference numeral 1 denotes a metal base for a heat sink made of an aluminum plate or the like, on which an insulating layer 2 and a circuit conductor 3 are sequentially laminated. The insulating layer 2 is one in which an adhesive layer such as an epoxy resin adhesive is provided on both surfaces of an insulating film such as a polyimide film, or an epoxy resin adhesive is mixed with an inorganic filler for improving thermal conductivity. It consists of things. Reference numeral 4 denotes a sealing portion made of an insulating or semi-conductive material that seals the edge portion of the circuit conductor 3, which is provided to prevent corona discharge from the edge portion of the circuit conductor 3. There is.

【0008】図2は、本発明法により絶縁性を評価する
に際して行う部分放電試験法の一例を示す簡易回路図で
ある。本発明にかかる回路基板の絶縁性試験は、図示す
るように供試用回路基板10の金属ベース1と回路導体
3との間に高電圧を印加し、絶縁層2中にボイド等が存
在している場合に部分放電が生起する状態とすることを
基本としている。高電圧印加回路は電源E、高圧トラン
スTr、ブロッキングコイルBc等から構成されてい
る。また6は、部分放電測定に際して当該測定系の構成
に用いられる標準電荷の発生器であり、パルス発生器6
1などを具備している。
FIG. 2 is a simplified circuit diagram showing an example of a partial discharge test method for evaluating the insulation property by the method of the present invention. In the insulation test of the circuit board according to the present invention, as shown in the figure, a high voltage is applied between the metal base 1 and the circuit conductor 3 of the test circuit board 10, and a void or the like exists in the insulating layer 2. The basic idea is to create a partial discharge when there is a discharge. The high voltage application circuit is composed of a power source E, a high voltage transformer Tr, a blocking coil Bc and the like. Further, 6 is a standard charge generator used for the configuration of the measurement system in the partial discharge measurement, and the pulse generator 6
It has 1 and so on.

【0009】上記の高電圧印加回路には、供試用回路基
板10と並列に結合コンデンサCkを介して部分放電測
定器5が接続されている。該測定器5は、前記の高電圧
印加回路による一定の印加電圧で、一定値以上の放電電
荷量の部分放電が、絶縁層2中に1秒間に何回発生する
かを計測するパルスカウンタと、良否判定の基準となる
部分放電発生レベルを設定するレベル入力部と、上記パ
ルスカウンタの計測パルス数と基準パルス数との対比を
行い、計測パルス数が基準パルス数を上回った場合にN
G信号を出力する比較回路などを備えている。
A partial discharge measuring instrument 5 is connected to the above-mentioned high voltage applying circuit in parallel with the test circuit board 10 via a coupling capacitor Ck. The measuring device 5 is a pulse counter for measuring the number of times per second in the insulating layer 2 a partial discharge having a discharge charge amount of a certain value or more is generated with a constant voltage applied by the high voltage applying circuit. , The level input section that sets the partial discharge generation level that is the reference for quality judgment is compared with the number of measured pulses of the pulse counter and the number of reference pulses, and if the number of measured pulses exceeds the number of reference pulses, then N
A comparison circuit for outputting the G signal is provided.

【0010】回路基板3と金属ベース1との間に印加す
る電圧は、絶縁層2の厚さなどによって適宜決定すれば
良いが、概ね1〜5KV、特に2〜3KVの範囲に選ぶ
のが適当である。
The voltage applied between the circuit board 3 and the metal base 1 may be appropriately determined depending on the thickness of the insulating layer 2 and the like, but it is suitable to select it in the range of approximately 1 to 5 KV, and particularly 2 to 3 KV. Is.

【0011】また、本発明においては部分放電の発生頻
度により回路基板の絶縁性の良否を判定するが、その判
定の基準となる部分放電の大きさ(放電電荷量の大き
さ)及び発生回数は、回路基板の絶縁層の厚さや材料、
当該基板の使用電圧等により適宜設定され、概ね10〜
30pc程度の放電電荷量の部分放電の発生が、1秒間
に10〜40回程度以下であるとき合格と判定するのが
適当である。
Further, in the present invention, the quality of insulation of the circuit board is judged by the frequency of occurrence of partial discharge. The size of partial discharge (size of discharge charge amount) and the number of times of occurrence, which are criteria for the judgment, are , The thickness and material of the insulating layer of the circuit board,
It is set appropriately according to the voltage used on the substrate, and is generally 10
It is appropriate to judge that the partial discharge having a discharge charge amount of about 30 pc is about 10 to 40 times or less per second and that the partial discharge is acceptable.

【0012】(試験例)厚さ35μmの銅箔を、厚さ1
00μmの無機フィラー混入エポキシ樹脂接着剤層を介
して、厚さが2mmのアルミニウムベース上に接着し、
上記銅箔にエッチングを施して回路導体を形成し、供試
用回路基板を作成した。この回路基板に3KV・1分間
を印加する従来の耐電圧試験を行い、これに合格したも
のを試験用回路基板とした。
(Test Example) A copper foil having a thickness of 35 μm was formed with a thickness of 1
It is adhered on an aluminum base having a thickness of 2 mm through an epoxy resin adhesive layer mixed with an inorganic filler of 00 μm,
A circuit conductor was formed by etching the copper foil to prepare a test circuit board. This circuit board was subjected to a conventional withstand voltage test of applying 3 KV for 1 minute, and a circuit board that passed this test was used as a test circuit board.

【0013】上記の回路基板に対し、図2に示すごとき
測定回路を使用して、交流3.0KVを1秒間印加した
とき、放電電荷量が20pcを越える部分放電パルスが
何回発生するかを上述のパルスカウンタで計測するよう
に設定すると共に、良否判定の基準となるレベルパルス
数を20回に設定し、部分放電発生頻度の測定を行っ
た。
Using the measuring circuit as shown in FIG. 2 to the above circuit board, when an alternating current of 3.0 KV is applied for 1 second, how many partial discharge pulses with a discharge charge amount exceeding 20 pc are generated. The partial pulse occurrence frequency was measured by setting the above-mentioned pulse counter so as to measure, and setting the number of level pulses as a reference for the quality judgment to 20 times.

【0014】この測定結果から、部分放電の発生頻度が
1秒間に20回以上の回路基板を5枚と、20回以下の
ものを5枚それぞれ選び、これら10枚の回路基板につ
き空気中で回路導体とアルミニウムベースとの間に交流
3KVを課電する長期課電試験を行った。その結果を表
1に示す。
From these measurement results, five circuit boards each having a frequency of occurrence of partial discharge of 20 times or more per second and five circuit boards having a frequency of 20 times or less per second are selected. A long-term voltage application test was performed in which an AC voltage of 3 KV was applied between the conductor and the aluminum base. The results are shown in Table 1.

【0015】[0015]

【表1】 [Table 1]

【0016】以上の結果から、本発明の絶縁性試験方法
で合格と判定された回路基板は、いずれも長期課電試験
で絶縁破壊することなく、一方不合格と判定されたもの
は短時間で絶縁破壊しており、本発明の試験方法の信頼
性が確認された。
From the above results, the circuit boards judged to be acceptable by the insulation test method of the present invention did not cause dielectric breakdown in the long-term voltage application test, while those judged to be unacceptable in a short time. Dielectric breakdown was confirmed, and the reliability of the test method of the present invention was confirmed.

【0017】[0017]

【発明の効果】以上説明した通りの本発明の試験方法に
よれば、回路基板に部品を実装する過程もしくは実装後
に行われる耐電圧試験において回路基板の絶縁層に絶縁
破壊が生ずる可能性のある、絶縁破壊強度が十分でない
回路基板を確実に判別でき、部品実装回路基板の製造効
率を著るしく向上させることができるという効果を奏す
る。
As described above, according to the test method of the present invention, dielectric breakdown may occur in the insulating layer of the circuit board in the withstand voltage test performed in the process of mounting the component on the circuit board or after the mounting. The circuit board having insufficient dielectric breakdown strength can be reliably identified, and the manufacturing efficiency of the component mounting circuit board can be significantly improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の試験方法の試験対象となる回路基板の
一例を示す断面図である。
FIG. 1 is a cross-sectional view showing an example of a circuit board to be tested by a test method of the present invention.

【図2】本発明法により絶縁性を評価するに際して行う
部分放電試験法の一例を示す簡易回路図である。
FIG. 2 is a simplified circuit diagram showing an example of a partial discharge test method performed when evaluating insulation by the method of the present invention.

【符号の説明】[Explanation of symbols]

1 金属ベース 10 回路基板 2 絶縁層 3 回路導体 5 部分放電測定器 1 metal base 10 circuit board 2 insulating layer 3 circuit conductor 5 partial discharge measuring instrument

フロントページの続き (72)発明者 森田 英史 兵庫県伊丹市池尻4丁目3番地 三菱電線 工業株式会社伊丹製作所内 (72)発明者 松田 秀秋 兵庫県伊丹市池尻4丁目3番地 三菱電線 工業株式会社伊丹製作所内 (72)発明者 岡田 聖司 兵庫県伊丹市池尻4丁目3番地 三菱電線 工業株式会社伊丹製作所内Front page continuation (72) Inventor Hidefumi Morita 4-3 Ikejiri, Itami City, Hyogo Prefecture Mitsubishi Cable Industries, Ltd. Itami Works (72) Inventor Hideaki Matsuda 4-3 Ikejiri, Itami City, Hyogo Mitsubishi Cable Industries Itami Co., Ltd. Inside the Works (72) Inventor Seiji Okada 4-3 Ikejiri, Itami City, Hyogo Prefecture Mitsubishi Cable Industries, Ltd. Itami Works

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 金属ベース上に絶縁層を介して回路導体
を設けた回路基板の前記回路導体と金属ベースとの間に
所定電圧を印加し、このときに前記絶縁層中に発生する
部分放電の発生頻度を測定することにより、当該回路基
板の絶縁性の良否を判定することを特徴とする回路基板
の絶縁性試験方法。
1. A partial discharge generated in the insulating layer when a predetermined voltage is applied between the circuit base and the metal base of a circuit board provided with a circuit conductor on a metal base via an insulating layer. A circuit board insulation test method, comprising determining the quality of insulation of the circuit board by measuring the occurrence frequency of the circuit board.
JP17215593A 1993-06-17 1993-06-17 Insulation property testing method of circuit board Pending JPH075223A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17215593A JPH075223A (en) 1993-06-17 1993-06-17 Insulation property testing method of circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17215593A JPH075223A (en) 1993-06-17 1993-06-17 Insulation property testing method of circuit board

Publications (1)

Publication Number Publication Date
JPH075223A true JPH075223A (en) 1995-01-10

Family

ID=15936591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17215593A Pending JPH075223A (en) 1993-06-17 1993-06-17 Insulation property testing method of circuit board

Country Status (1)

Country Link
JP (1) JPH075223A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010032457A (en) * 2008-07-31 2010-02-12 Hioki Ee Corp Insulation inspecting apparatus and technique
CN107329053A (en) * 2017-05-26 2017-11-07 华南理工大学 A kind of method that utilization high-speed camera measures suspended conductor induction discharge frequency
JP2019203820A (en) * 2018-05-24 2019-11-28 三菱電機株式会社 Method for inspecting insulation substrate and inspection device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010032457A (en) * 2008-07-31 2010-02-12 Hioki Ee Corp Insulation inspecting apparatus and technique
CN107329053A (en) * 2017-05-26 2017-11-07 华南理工大学 A kind of method that utilization high-speed camera measures suspended conductor induction discharge frequency
CN107329053B (en) * 2017-05-26 2019-11-15 华南理工大学 A method of suspended conductor induction discharge frequency is measured using high-speed camera
JP2019203820A (en) * 2018-05-24 2019-11-28 三菱電機株式会社 Method for inspecting insulation substrate and inspection device
CN110531226A (en) * 2018-05-24 2019-12-03 三菱电机株式会社 Inspection method, the check device of insulating substrate

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