JPH06140851A - High frequency amplifying semiconductor integrated circuit - Google Patents
High frequency amplifying semiconductor integrated circuitInfo
- Publication number
- JPH06140851A JPH06140851A JP28970992A JP28970992A JPH06140851A JP H06140851 A JPH06140851 A JP H06140851A JP 28970992 A JP28970992 A JP 28970992A JP 28970992 A JP28970992 A JP 28970992A JP H06140851 A JPH06140851 A JP H06140851A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- high frequency
- frequency amplifying
- inductance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Amplifiers (AREA)
- Coils Or Transformers For Communication (AREA)
- Semiconductor Integrated Circuits (AREA)
- Microwave Amplifiers (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は高周波増幅半導体集積回
路に関し、帰還型のバイポーラトランジスタ高周波増幅
器に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency amplifying semiconductor integrated circuit, and more particularly to a feedback type bipolar transistor high frequency amplifier.
【0002】[0002]
【従来の技術】従来の高周波・高出力増幅では、半導体
集積回路は高効率化のために例えば、図3に示すバイポ
ーラトランジスタQ1及びQ2と帰還抵抗RE1,RE
2及びRFより構成された2段帰還型広帯域増幅器の場
合は、点線に示すように出力端子TOと電源端子TC間
に外部インダクタンスLCの外部整合回路6aを接続し
ている。2. Description of the Related Art In a conventional high frequency and high output amplification, a semiconductor integrated circuit is provided with high efficiency, for example, bipolar transistors Q1 and Q2 and feedback resistors RE1 and RE shown in FIG.
In the case of a two-stage feedback wideband amplifier composed of 2 and RF, as shown by the dotted line, the external matching circuit 6a of the external inductance LC is connected between the output terminal TO and the power supply terminal TC.
【0003】この場合に外部インダクタンスLCは、こ
の増幅器の負荷インピーダンスとして働くが、出力電力
に対する抵抗損失が無いので電力効率が高く、高出力増
幅器に非常に適している。In this case, the external inductance LC acts as a load impedance of this amplifier, but since it has no resistance loss with respect to the output power, it has high power efficiency and is very suitable for a high output amplifier.
【0004】[0004]
【発明が解決しようとする課題】しかしこの従来の高周
波増幅半導体集積回路の高周波増幅器では、出力インピ
ーダンスが100Ω〜1KΩと高く、通常の高周波で用
いられる50Ω系の伝送線路へ接線された場合に、イン
ピーダンスの不整合を起し、そのための出力電力の不整
合損失が多く、また増幅器自体も高インピーダンスで発
振し易いという問題があった。However, in the conventional high-frequency amplifier semiconductor integrated circuit high-frequency amplifier, the output impedance is as high as 100 Ω to 1 KΩ, and when it is tangential to the 50 Ω transmission line used at normal high frequencies, There is a problem in that impedance mismatching occurs, there is a large amount of mismatch loss in output power, and the amplifier itself easily oscillates at high impedance.
【0005】[0005]
【課題を解決するための手段】本発明の高周波増幅半導
体集積回路は、半導体チップの絶縁層上に形成されたポ
リシリコンの抵抗およびスパイラル形の配線層により形
成されたインダクタンスとが直列に接続され、電源端子
及び出力端子間に挿入された内部整合回路を有して構成
されている。In a high frequency amplification semiconductor integrated circuit of the present invention, a resistance of polysilicon formed on an insulating layer of a semiconductor chip and an inductance formed by a spiral wiring layer are connected in series. , An internal matching circuit inserted between the power supply terminal and the output terminal.
【0006】[0006]
【実施例】次に本発明について図面を参照して説明す
る。図1は本発明の一実施例の等価回路図で、トランジ
スタQ1及びQ2により構成された2段帰還型高周波増
幅半導体集積回路である。The present invention will be described below with reference to the drawings. FIG. 1 is an equivalent circuit diagram of an embodiment of the present invention, which is a two-stage feedback type high frequency amplification semiconductor integrated circuit composed of transistors Q1 and Q2.
【0007】本実施例の回路は、図3に示した半導体高
周波増幅器の出力端子TOとコレクタ電源端子間TCの
外部整合回路6aをチップ上の内部の内部整合回路6に
移し直列抵抗RIを挿入した点以外は同様である。In the circuit of this embodiment, the external matching circuit 6a between the output terminal TO and the collector power supply terminal TC of the semiconductor high frequency amplifier shown in FIG. 3 is moved to the internal matching circuit 6 on the chip and the series resistor RI is inserted. It is the same except that it was done.
【0008】内部整合回路6は50〜500Ωの直列抵
抗RI及び1〜50nHのインダクタンスLIを有し、
図2(a)の半導体チップ平面図及びそのAA線断面で
ある。図2(b)に示す様に、通常の半導体集積回路の
製法と同様に半導体基板1表面のシリコン酸化絶縁層2
上に形成された50〜500Ω/□のポリシリコン抵抗
層3と、絶縁層2を挟んでその両端のコンタクトホール
4において接続されたアルミニウム層が、エッチングに
よりスパイラル状に加工された配線層5で形成され、そ
の両端はチップ内部で電源端TCと出力端TOに配線接
続されている。The internal matching circuit 6 has a series resistance RI of 50 to 500Ω and an inductance LI of 1 to 50 nH,
FIG. 2 is a plan view of the semiconductor chip of FIG. 2A and a cross section taken along the line AA. As shown in FIG. 2B, the silicon oxide insulating layer 2 on the surface of the semiconductor substrate 1 is formed in the same manner as in the usual method for manufacturing a semiconductor integrated circuit.
The polysilicon resistance layer 3 of 50 to 500 Ω / □ formed above and the aluminum layers connected in the contact holes 4 on both ends of the insulation layer 2 with the insulating layer 2 sandwiched therebetween are formed into a wiring layer 5 spirally processed by etching. Both ends thereof are connected to the power source terminal TC and the output terminal TO by wiring inside the chip.
【0009】通常トランジスタQ2の出力インピーダン
スは100〜500Ω程度を有するが、抵抗RI及びイ
ンダクタンスLIの内部整合回路により通常50Ωもし
くは75Ωの外部伝送線路とのインピーダンス整合が行
なわれる。Normally, the output impedance of the transistor Q2 is about 100 to 500Ω, but impedance matching with an external transmission line of usually 50Ω or 75Ω is performed by the internal matching circuit of the resistor RI and the inductance LI.
【0010】またトランジスタQ2の出力インピーダン
スは周波数特性を有し高周波側で低くなるが、インダク
タンスLIの値を調整・選択して広帯域にわたってイン
ピーダンス整合が可能となる。The output impedance of the transistor Q2 has a frequency characteristic and is low on the high frequency side, but impedance matching can be performed over a wide band by adjusting and selecting the value of the inductance LI.
【0011】[0011]
【発明の効果】以上説明したように本発明は、高周波増
幅器において、の半導体集積回路において、整合部をチ
ップ内部に設けたので周波数の広帯域にわたり外部伝送
線路とのインピーダンス整合を可能にする。As described above, according to the present invention, in the semiconductor integrated circuit of the high frequency amplifier, since the matching portion is provided inside the chip, it is possible to perform impedance matching with the external transmission line over a wide frequency band.
【図1】本発明の一実施例の等価回路図である。FIG. 1 is an equivalent circuit diagram of an embodiment of the present invention.
【図2】(a),(b)は図1の回路のインダクタンス
部に対応する半導体チップの平面図およびA−A線断面
図である。2A and 2B are a plan view and a cross-sectional view taken along line AA of a semiconductor chip corresponding to an inductance portion of the circuit of FIG.
【図3】従来の高周波増幅集積回路の一例の等価回路図
である。FIG. 3 is an equivalent circuit diagram of an example of a conventional high frequency amplification integrated circuit.
1 半導体基板 2a,2b 絶縁層 3 ポリシリコン抵抗体 4 コンタクトホール 5 配線層 1 Semiconductor Substrate 2a, 2b Insulating Layer 3 Polysilicon Resistor 4 Contact Hole 5 Wiring Layer
Claims (1)
リシリコンの抵抗層およびスパイラル形の配線層により
形成されたインダクタンスとが直列に接続され、電源端
子及び出力端子間に挿入された内部整合回路を有するこ
とを特徴とする高周波増幅半導体集積回路。1. An internal matching inserted between a power supply terminal and an output terminal, which is connected in series with a resistance layer of polysilicon formed on an insulating layer of a semiconductor chip and an inductance formed by a spiral wiring layer. A high-frequency amplification semiconductor integrated circuit having a circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28970992A JP2946971B2 (en) | 1992-10-28 | 1992-10-28 | High frequency amplification semiconductor integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP28970992A JP2946971B2 (en) | 1992-10-28 | 1992-10-28 | High frequency amplification semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH06140851A true JPH06140851A (en) | 1994-05-20 |
JP2946971B2 JP2946971B2 (en) | 1999-09-13 |
Family
ID=17746738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP28970992A Expired - Fee Related JP2946971B2 (en) | 1992-10-28 | 1992-10-28 | High frequency amplification semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2946971B2 (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001013384A1 (en) * | 1999-08-17 | 2001-02-22 | Niigata Seimitsu Co., Ltd. | Inductor element |
JP2006173882A (en) * | 2004-12-14 | 2006-06-29 | Iwatsu Test Instruments Corp | Wideband offset circuit |
WO2011037101A1 (en) * | 2009-09-24 | 2011-03-31 | 株式会社村田製作所 | Electronic circuit device |
CN106470019A (en) * | 2015-08-21 | 2017-03-01 | 飞思卡尔半导体公司 | RF amplifier modules and the method manufacturing RF amplifier modules |
-
1992
- 1992-10-28 JP JP28970992A patent/JP2946971B2/en not_active Expired - Fee Related
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001013384A1 (en) * | 1999-08-17 | 2001-02-22 | Niigata Seimitsu Co., Ltd. | Inductor element |
US7046113B1 (en) | 1999-08-17 | 2006-05-16 | Niigata Seimitsu Co., Ltd. | Inductor element |
CN100382208C (en) * | 1999-08-17 | 2008-04-16 | 新泻精密株式会社 | Inductor element |
JP2006173882A (en) * | 2004-12-14 | 2006-06-29 | Iwatsu Test Instruments Corp | Wideband offset circuit |
JP4668599B2 (en) * | 2004-12-14 | 2011-04-13 | 岩通計測株式会社 | Wideband offset circuit |
WO2011037101A1 (en) * | 2009-09-24 | 2011-03-31 | 株式会社村田製作所 | Electronic circuit device |
CN106470019A (en) * | 2015-08-21 | 2017-03-01 | 飞思卡尔半导体公司 | RF amplifier modules and the method manufacturing RF amplifier modules |
Also Published As
Publication number | Publication date |
---|---|
JP2946971B2 (en) | 1999-09-13 |
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