JPH06120297A - Electronic component - Google Patents

Electronic component

Info

Publication number
JPH06120297A
JPH06120297A JP29385292A JP29385292A JPH06120297A JP H06120297 A JPH06120297 A JP H06120297A JP 29385292 A JP29385292 A JP 29385292A JP 29385292 A JP29385292 A JP 29385292A JP H06120297 A JPH06120297 A JP H06120297A
Authority
JP
Japan
Prior art keywords
chip
electrode
bare
bumps
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29385292A
Other languages
Japanese (ja)
Inventor
Shuichi Sugimoto
周一 杉元
Takashi Sotodani
高志 外谷
Tomoyuki Kamiguchi
朋行 上口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Corp
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Corp, Omron Tateisi Electronics Co filed Critical Omron Corp
Priority to JP29385292A priority Critical patent/JPH06120297A/en
Publication of JPH06120297A publication Critical patent/JPH06120297A/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To obtain an electronic component excellent in moisture resistance and impact resistance and suitable for high density mounting by arranging bumps on the surface of electrode of a chip component and then entirely sealing the chip component with resin except the bumps. CONSTITUTION:In a bare IC chip 1, a plurality of Al electrodes 1b are provided on one surface of a silicon chip 1a where an integrated circuit is formed and the surface provided with the Al electrodes is coated with a passivation film 2 (e.g. silicon nitride film) except the central part of each Al electrode 1b (where a bump 3 is formed). A solder bump 3 is provided on the surface of each N electrode 1b of the bare IC chip 1 which is then entirely sealed with sealing resin 4 (e.g. epoxy resin of 0.05-0.5mum thick) except the bumps 3 thus constituting an IC 10. This constitution protects the electrode of chip component against corrosion and enhances moisture resistance.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品に関する。具
体的にいうと、本発明は、フリップチップ実装法などに
よって基板上に直接実装する電子部品に関する。
FIELD OF THE INVENTION The present invention relates to electronic components. Specifically, the present invention relates to an electronic component that is directly mounted on a substrate by a flip chip mounting method or the like.

【0002】[0002]

【背景技術】図2(a)(b)に従来のベアICチップ
31の構造及びベアICチップ31を基板34に直接実
装するフリップチップ実装法を示す。従来のベアICチ
ップ31にあっては、シリコンチップ31aの片面に複
数のAl電極31bが設けられており、Al電極31b
が設けられている面はAl電極31bの中央部を除いて
パッシベーション膜32で被覆されている。
BACKGROUND ART FIGS. 2A and 2B show a structure of a conventional bare IC chip 31 and a flip chip mounting method for directly mounting the bare IC chip 31 on a substrate 34. In the conventional bare IC chip 31, a plurality of Al electrodes 31b are provided on one surface of the silicon chip 31a.
The surface provided with is covered with a passivation film 32 except for the central portion of the Al electrode 31b.

【0003】しかして、パッシベーション膜32から露
出している各Al電極31bの表面に半田のバンプ33
を形成し、そのバンプ33を基板34のランド34aに
位置合わせしてベアICチップ31を基板34上に載置
する。次いで、加熱してバンプ33を溶融させ、ベアI
Cチップ31のAl電極31bと基板34のランド34
aを接合する。
However, solder bumps 33 are formed on the surface of each Al electrode 31b exposed from the passivation film 32.
Are formed, the bumps 33 are aligned with the lands 34a of the substrate 34, and the bare IC chip 31 is mounted on the substrate 34. Then, the bumps 33 are melted by heating and bare I
Al electrode 31b of C chip 31 and land 34 of substrate 34
Join a.

【0004】[0004]

【発明が解決しようとする課題】このような実装方法に
あっては、ベアICチップ31を直接実装するので高密
度実装が可能となり、装置のコンパクト化を図ることが
できるが、反面、ベアICチップ31が水分や不純物の
影響を受け易く、例えばAl電極31bが腐食される
等、耐湿性が悪いという問題があった。
In such a mounting method, since the bare IC chip 31 is directly mounted, high-density mounting is possible and the device can be made compact, but on the other hand, the bare IC is not mounted. There is a problem in that the chip 31 is easily affected by moisture and impurities and has poor moisture resistance, for example, the Al electrode 31b is corroded.

【0005】また、実装時や使用時の衝撃によってシリ
コンチップ31aに欠けが生じたり、ベアICチップ3
1の表面がダメージを受けたりし易く、耐衝撃性が低か
った。
Also, the silicon chip 31a may be chipped due to impact during mounting or use, or the bare IC chip 3 may be damaged.
The surface of No. 1 was easily damaged, and the impact resistance was low.

【0006】したがって、このような実装方法は、ごく
限られた分野にしか適用できず、例えば車載用の基板や
大型コンピュータ用の基板などの限られた分野でしか使
用されていなかった。
Therefore, such a mounting method can be applied only in a very limited field, and has been used only in a limited field such as a board for a vehicle or a board for a large computer.

【0007】本発明は、叙上の従来例の欠点に鑑みてな
されたものであり、その目的とするところは、高密度実
装が可能で、且つ耐湿性及び耐衝撃性に優れた電子部品
を提供することにある。
The present invention has been made in view of the above-mentioned drawbacks of conventional examples, and an object of the present invention is to provide an electronic component capable of high-density mounting and excellent in moisture resistance and impact resistance. To provide.

【0008】[0008]

【課題を解決するための手段】本発明の電子部品は、チ
ップ部品の電極の表面にバンプを設け、当該チップ部品
のバンプ以外の部分の全体を樹脂で封止したことを特徴
としている。
The electronic component of the present invention is characterized in that a bump is provided on the surface of the electrode of the chip component, and the entire portion of the chip component other than the bump is sealed with resin.

【0009】[0009]

【作用】本発明の電子部品にあっては、チップ部品のバ
ンプ以外の部分の全体を樹脂で封止しているので、樹脂
により外部からチップ部品への水分や不純物の侵入を阻
止し、例えばチップの電極の腐食を防止することがで
き、耐湿性を向上させることができる。
In the electronic component of the present invention, since the entire portion of the chip component other than the bump is sealed with resin, the resin prevents moisture and impurities from entering the chip component from the outside. Corrosion of the chip electrodes can be prevented, and moisture resistance can be improved.

【0010】また、チップ部品を包んでいる樹脂によっ
てチップ部品が保護されているので、実装時などの衝撃
を樹脂によって緩和させ、チップ部品の欠けを防止で
き、また、チップ部品の表面が受けるダメージを軽減さ
せることができ、耐衝撃性を向上させることができる。
Further, since the chip component is protected by the resin wrapping the chip component, the impact at the time of mounting can be mitigated by the resin, chipping of the chip component can be prevented, and the surface of the chip component is damaged. Can be reduced and the impact resistance can be improved.

【0011】また、電極にバンプを設けたので、基板に
直接実装することができ、高密度に実装することができ
る。
Further, since the electrodes are provided with bumps, they can be directly mounted on the substrate and can be mounted at a high density.

【0012】[0012]

【実施例】図1(a)(b)に本発明の一実施例による
IC(電子部品)10の構造及びIC10を基板(例え
ば、アルミナ基板)5に直接実装するフリップチップ実
装法を示す。本実施例のIC10は、ベアICチップ
(チップ部品)1の各Al電極1bの表面にバンプ3を
設け、そのバンプ3のみを露出させてベアICチップ1
全体を封止用樹脂4で封止したものである。
1 (a) and 1 (b) show the structure of an IC (electronic component) 10 according to an embodiment of the present invention and a flip-chip mounting method for directly mounting the IC 10 on a substrate (for example, an alumina substrate) 5. In the IC 10 of this embodiment, a bump 3 is provided on the surface of each Al electrode 1b of the bare IC chip (chip component) 1 and only the bump 3 is exposed to expose the bare IC chip 1
The whole is sealed with a sealing resin 4.

【0013】詳しく説明すると、ベアICチップ1にあ
っては、集積回路が形成されたシリコンチップ1aの片
面に複数個のAl電極1bが設けられており、ベアIC
チップ1のAl電極1bが設けられている面は各Al電
極1bの中央部(バンプ3を形成される部分)を除いて
パッシベーション膜2(例えば、窒化シリコン膜)で被
覆されている。
More specifically, in the bare IC chip 1, a plurality of Al electrodes 1b are provided on one surface of a silicon chip 1a on which an integrated circuit is formed.
The surface of the chip 1 on which the Al electrodes 1b are provided is covered with a passivation film 2 (for example, a silicon nitride film) except for the central portion (the portion where the bumps 3 are formed) of each Al electrode 1b.

【0014】このようなベアICチップ1の各Al電極
1bの表面に半田のバンプ3を設け、そのバンプ3のみ
を露出させてベアICチップ1全体を封止用樹脂4(例
えば、エポキシ樹脂;0.05μm厚から0.5μm厚)
で封止することによってIC10が構成されている。
Solder bumps 3 are provided on the surface of each Al electrode 1b of the bare IC chip 1 and only the bumps 3 are exposed to seal the entire bare IC chip 1 with a resin 4 (for example, epoxy resin; (0.05 to 0.5 μm thick)
The IC 10 is configured by sealing with.

【0015】しかして、図1(a)に示すように、IC
10を例えばバキュームパッドのような搬送用ツールで
チャッキングして実装位置の上方に搬送し、IC10に
設けたバンプ3を基板5上に設けられたランド5aに位
置合わせする。
Therefore, as shown in FIG.
The chip 10 is chucked by a carrying tool such as a vacuum pad and carried to above the mounting position, and the bumps 3 provided on the IC 10 are aligned with the lands 5a provided on the substrate 5.

【0016】次いで、図1(b)に示すように、搬送用
ツールを下方に移動させてIC10を基板5上に静かに
載置する。次に、例えばリフロー炉内で加熱してバンプ
3を溶融させ、冷却させてAl電極1bと基板5のラン
ド5aを接合し、実装を終了する。
Then, as shown in FIG. 1B, the carrying tool is moved downward to gently mount the IC 10 on the substrate 5. Next, for example, the bumps 3 are melted by heating in a reflow furnace and cooled to bond the Al electrodes 1b and the lands 5a of the substrate 5 to finish the mounting.

【0017】本実施例によれば、Al電極1bの表面に
設けたバンプ3のみを露出させてベアICチップ1全体
を封止用樹脂4で封止したので、ベアICチップ1を外
気中の水分や不純物から保護することができ、例えばA
l電極1bが腐食したり、ベアICチップ1の特性が変
化したりすることを防止することができる。
According to this embodiment, only the bump 3 provided on the surface of the Al electrode 1b is exposed and the entire bare IC chip 1 is sealed with the sealing resin 4. Therefore, the bare IC chip 1 is exposed to the outside air. Can be protected from moisture and impurities, eg A
It is possible to prevent the l-electrode 1b from being corroded and the characteristics of the bare IC chip 1 from changing.

【0018】また、例えば搬送用ツールでチャッキング
するときの衝撃を封止用樹脂1によって緩和することが
でき、衝撃でベアICチップ1の表面がダメージを受け
たり、シリコンチップ1aが欠けたりすることを防止で
きる。
Further, for example, the shock when chucking with a carrying tool can be alleviated by the sealing resin 1, and the surface of the bare IC chip 1 is damaged or the silicon chip 1a is chipped due to the shock. Can be prevented.

【0019】また、IC10は、ベアICチップ1より
も封止用樹脂4の厚み分大きいだけなので、これをフリ
ップチップ実装法で実装することにより、他の実装方
法、例えばモールドしたパッケージによる実装法、TA
B実装法又はワイヤボンディング実装法によるよりも高
密度に実装することができる。
Since the IC 10 is thicker than the bare IC chip 1 by the thickness of the sealing resin 4, it is mounted by the flip-chip mounting method so that another mounting method, for example, a mounting method using a molded package is used. , TA
It can be mounted at a higher density than by the B mounting method or the wire bonding mounting method.

【0020】[0020]

【発明の効果】本発明の電子部品によれば、樹脂によっ
て外部からチップ部品への水分や不純物の侵入を阻止
し、例えばチップ部品の電極の腐食を防止することがで
き、耐湿性を向上させることができる。
According to the electronic component of the present invention, the resin can prevent moisture and impurities from entering the chip component from the outside, for example, can prevent the electrode of the chip component from being corroded, and improve the moisture resistance. be able to.

【0021】また、樹脂によって衝撃を緩和し、チップ
部品の表面が受けるダメージを軽減させることができ、
耐衝撃性を向上させることができ、チップ部品の取り扱
いが容易になる。
Further, the resin can reduce the impact and reduce the damage to the surface of the chip component.
Impact resistance can be improved, and handling of chip components becomes easy.

【0022】また、電極にバンプを設けたので、基板に
直接実装することができ、高密度に実装することができ
る。
Since the electrodes are provided with the bumps, they can be directly mounted on the substrate and can be mounted at a high density.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)(b)は本発明の一実施例によるICの
構造及びその実装方法を示す断面図である。
1A and 1B are cross-sectional views showing a structure of an IC and a mounting method thereof according to an embodiment of the present invention.

【図2】(a)(b)は従来のベアICチップの構造及
びその実装方法を示す断面図である。
2A and 2B are cross-sectional views showing a structure of a conventional bare IC chip and a mounting method thereof.

【符号の説明】[Explanation of symbols]

1 ベアICチップ(チップ部品) 1b Al電極 3 バンプ 4 封止用樹脂 5 基板 5a ランド 10 IC(電子部品) 1 Bare IC Chip (Chip Component) 1b Al Electrode 3 Bump 4 Sealing Resin 5 Substrate 5a Land 10 IC (Electronic Component)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 チップ部品の電極の表面にバンプを設
け、当該チップ部品のバンプ以外の部分の全体を樹脂で
封止したことを特徴とする電子部品。
1. An electronic component, characterized in that a bump is provided on a surface of an electrode of a chip component, and the entire portion of the chip component other than the bump is sealed with a resin.
JP29385292A 1992-10-06 1992-10-06 Electronic component Pending JPH06120297A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29385292A JPH06120297A (en) 1992-10-06 1992-10-06 Electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29385292A JPH06120297A (en) 1992-10-06 1992-10-06 Electronic component

Publications (1)

Publication Number Publication Date
JPH06120297A true JPH06120297A (en) 1994-04-28

Family

ID=17799994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29385292A Pending JPH06120297A (en) 1992-10-06 1992-10-06 Electronic component

Country Status (1)

Country Link
JP (1) JPH06120297A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5604379A (en) * 1994-09-21 1997-02-18 Sharp Kabushiki Kaisha Semiconductor device having external electrodes formed in concave portions of an anisotropic conductive film
JP2001184618A (en) * 1999-12-24 2001-07-06 Hitachi Ltd Magnetic disk device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5604379A (en) * 1994-09-21 1997-02-18 Sharp Kabushiki Kaisha Semiconductor device having external electrodes formed in concave portions of an anisotropic conductive film
JP2001184618A (en) * 1999-12-24 2001-07-06 Hitachi Ltd Magnetic disk device

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