JPH0610717Y2 - Hybrid integrated circuit - Google Patents

Hybrid integrated circuit

Info

Publication number
JPH0610717Y2
JPH0610717Y2 JP1986022430U JP2243086U JPH0610717Y2 JP H0610717 Y2 JPH0610717 Y2 JP H0610717Y2 JP 1986022430 U JP1986022430 U JP 1986022430U JP 2243086 U JP2243086 U JP 2243086U JP H0610717 Y2 JPH0610717 Y2 JP H0610717Y2
Authority
JP
Japan
Prior art keywords
metal substrate
conductive path
integrated circuit
hybrid integrated
resin layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1986022430U
Other languages
Japanese (ja)
Other versions
JPS62135464U (en
Inventor
明 風見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP1986022430U priority Critical patent/JPH0610717Y2/en
Publication of JPS62135464U publication Critical patent/JPS62135464U/ja
Application granted granted Critical
Publication of JPH0610717Y2 publication Critical patent/JPH0610717Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【考案の詳細な説明】 (イ)産業上の利用分野 本考案は混成集積回路に関し、特に高電源電圧で駆動す
る混成集積回路の絶縁構造の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a hybrid integrated circuit, and more particularly to improvement of an insulating structure of the hybrid integrated circuit driven by a high power supply voltage.

(ロ)従来の技術 従来の混成集積回路は第2図に示す如く、金属基板(11)
と、基板(11)上に設けられた絶縁樹脂層(12)と、絶縁樹
脂層(12)上に設けた導電路(13)と、導電路(13)上に固着
された半導体素子(14)とから構成される。
(B) Conventional technology A conventional hybrid integrated circuit has a metal substrate (11) as shown in FIG.
An insulating resin layer (12) provided on the substrate (11), a conductive path (13) provided on the insulating resin layer (12), and a semiconductor element (14) fixed on the conductive path (13). ) And.

金属基板(11)は良熱伝導性の優れたアルミニウム基板が
用いられ、その表面は陽極酸化により絶縁処理されてい
る。
An aluminum substrate having excellent thermal conductivity is used as the metal substrate (11), and the surface thereof is subjected to insulation treatment by anodic oxidation.

絶縁樹脂層(12)はエポキシ又はポリイミド等の接着性を
有する樹脂が用いられ、基板(11)上に貼着して導電路(1
3)となる銅箔が貼着される。
The insulating resin layer (12) is made of an adhesive resin such as epoxy or polyimide, and is adhered onto the substrate (11) to form a conductive path (1
3) The copper foil to be used is attached.

導電路(13)は銅箔を所定のパターンにエッチングするこ
とにより形成され、その導電路(13)上または導電路(13)
間にトランジスタ、チップ抵抗あるいはチップコンデン
サー等の回路素子(14)が固着される。又、導電管(13)と
金属基板(11)とは図示されないが、例えば、金属基板(1
1)をドリル等の手段によりザグリ部が設けられ、そのザ
グリ部と導電路(13)の一部がワイヤ等によって接続さ
れ、いわゆる基板アース構造が行われ、内外部のノイズ
による悪影響を防止している。回路素子(14)を保護する
ために混成集積回路は樹脂材料からなる蓋体(15)でケー
シングされる。この様な絶縁処理が施された金属基板を
ベースにした混成集積回路はインバータ用ICとしても
用いられる。
The conductive path (13) is formed by etching a copper foil into a predetermined pattern, and is formed on the conductive path (13) or the conductive path (13).
A circuit element (14) such as a transistor, a chip resistor or a chip capacitor is fixed between them. Further, although the conductive tube (13) and the metal substrate (11) are not shown, for example, the metal substrate (1
1) is provided with a counterbore part by means such as a drill, and the counterbore part and a part of the conductive path (13) are connected by a wire or the like, so-called substrate grounding structure is performed to prevent adverse effects from internal and external noise. ing. In order to protect the circuit element (14), the hybrid integrated circuit is casing with a lid (15) made of a resin material. The hybrid integrated circuit based on the metal substrate subjected to such an insulation treatment is also used as an inverter IC.

上述した同様の混成集積回路は特公昭52−37587
号公報に記載されている。
The similar hybrid integrated circuit described above is disclosed in Japanese Examined Patent Publication No. 52-37587.
It is described in Japanese Patent Publication No.

(ハ)考案が解決しようとする問題点 しかしながら、上述した構造の混成集積回路では電源電
圧を有するインバータ用の混成集積回路をシャーシ等に
取付けする場合、一般的に絶縁薄層物を介して取付けら
れる。しかしながら、上記したように、金属基板上には
アース構造が形成されているため、上記の絶縁薄層物が
破れた場合等金属基板とシャーシとが短絡するため、安
全性が著しく低下する問題があった。
(C) Problems to be solved by the device However, in the hybrid integrated circuit having the above-mentioned structure, when a hybrid integrated circuit for an inverter having a power supply voltage is mounted on a chassis or the like, it is generally mounted via an insulating thin layer. To be However, as described above, since the ground structure is formed on the metal substrate, there is a problem that the metal substrate and the chassis are short-circuited when the above-mentioned insulating thin layer is broken, resulting in a significant decrease in safety. there were.

(ニ)問題点を解決するための手段 本考案は上述した点を鑑みてなされたものであり、第1
図に示す如く、第1および第2の基板(1)(2)と、第1の
基板(1)上に設けた樹脂層(3)と、樹脂層(3)上に設けた
所望形状の高電源電圧が印加される導電路(5)と、導電
路(5)上に設けた複数の回路素子(6)とを備え、第2の金
属基板(2)上に絶縁フィルム(4)を設け、第2の金属基板
(2)上に第1の金属基板(1)を配置して解決するものであ
る。
(D) Means for Solving the Problems The present invention has been made in view of the above-mentioned points.
As shown in the figure, the first and second substrates (1) and (2), the resin layer (3) provided on the first substrate (1), and the desired shape provided on the resin layer (3) A conductive path (5) to which a high power supply voltage is applied and a plurality of circuit elements (6) provided on the conductive path (5) are provided, and an insulating film (4) is provided on the second metal substrate (2). Provide a second metal substrate
(2) The first metal substrate (1) is placed on top of this to solve the problem.

(ホ)作用 この様に第2の金属基板(2)上に絶縁フィルム(4)を設
け、そのフィルム(4)上に第1の金属基板(1)を配置する
二重構造とすることにより、シャーシーに取り付けを行
なう場合回路素子(6)が固着された第1の金属基板(1)と
シャーシーとの間に第2の金属基板(2)が介されている
ので第1の金属基板(1)の絶縁性を向上することができ
る。
(E) Action In this way, by providing the insulating film (4) on the second metal substrate (2) and arranging the first metal substrate (1) on the film (4), a double structure is obtained. , When mounting on a chassis Since the second metal substrate (2) is interposed between the first metal substrate (1) to which the circuit element (6) is fixed and the chassis, the first metal substrate ( The insulating property of 1) can be improved.

(ヘ)実施例 以下に第1図に示した実施例に基づいて本考案を詳細に
説明する。
(F) Embodiment The present invention will be described in detail below based on the embodiment shown in FIG.

本考案の混成集積回路は第1図に示す如く、第1および
第2の金属基板(1)(2)と、第1の金属基板(1)上に設け
た樹脂層(3)と、樹脂層(3)上に設けた高電源電圧が印加
される導電路(5)と、導電路(5)上に固着した回路素子
(6)と第2の金属基板(2)上に設けた絶縁フィルム(4)と
を具備している。
As shown in FIG. 1, the hybrid integrated circuit of the present invention includes first and second metal substrates (1) and (2), a resin layer (3) provided on the first metal substrate (1), and a resin. A conductive path (5) provided on the layer (3) to which a high power supply voltage is applied, and a circuit element fixed on the conductive path (5)
(6) and an insulating film (4) provided on the second metal substrate (2).

第1の金属基板(1)は熱伝導性の優れたアルミニウム基
板が用いられ、その表面は陽極酸化によって絶縁処理が
施される。樹脂層(3)はエポキシ系又はポリイミド系の
樹脂が用いられ、第1の金属基板(1)と導電路(5)とを絶
縁する最小限の厚さで形成される。
An aluminum substrate having excellent thermal conductivity is used as the first metal substrate (1), and its surface is subjected to insulation treatment by anodic oxidation. The resin layer (3) is made of an epoxy-based or polyimide-based resin, and is formed with a minimum thickness that insulates the first metal substrate (1) and the conductive path (5).

導電路(5)は樹脂層(3)上に銅箔を貼着し、その銅箔を所
定のパターンに露光し、パターン以外の銅箔をエッチン
グ除去して所望形状の導電路(5)が形成される。その導
電路(5)上または導電路(5)間に集積回路、トランジス
タ、チップ抵抗およびチップコンデンサー等の回路素子
(6)が固着される。又、導電路(5)と第1の金属基板(1)
とは図示されないが、例えば、第1の金属基板(1)をド
リル等の手段によりザグリ部が設けられ、そのザグリ部
と導電路(5)の一部がワイヤ等によって接続され、いわ
ゆる基板アース構造が行われ、内外部のノイズによる悪
影響を防止している。
The conductive path (5) is a copper foil adhered on the resin layer (3), the copper foil is exposed to a predetermined pattern, the copper foil other than the pattern is removed by etching to form a conductive path (5) having a desired shape. It is formed. Circuit elements such as integrated circuits, transistors, chip resistors and chip capacitors on or between the conductive paths (5)
(6) is fixed. Also, the conductive path (5) and the first metal substrate (1)
Although not shown, for example, the first metal substrate (1) is provided with a countersunk portion by means such as a drill, and the countersunk portion and a part of the conductive path (5) are connected by a wire or the like, so-called substrate ground. The structure is used to prevent the adverse effects of internal and external noise.

第2の金属基板(2)は第1の金属基板(1)と同様にアルミ
ニウム基板が用いられ、絶縁処理が施される。絶縁フィ
ルム(4)はポリイミドフィルムが用いられ、第2の金属
基板(2)が放熱板の作用をもたらすので樹脂層(3)より厚
く貼着される。
As the second metal substrate (2), an aluminum substrate is used similarly to the first metal substrate (1), and insulation treatment is performed. A polyimide film is used as the insulating film (4), and since the second metal substrate (2) acts as a heat dissipation plate, it is attached thicker than the resin layer (3).

表面に絶縁フィルム(4)が設けられた第2の金属基板(2)
上に第1の金属基板(1)を密着する様に配置し、第1の
金属基板(1)上に設けた回路素子(6)を保護するために、
樹脂材料からなるケース(7)でケーシングされる。
Second metal substrate (2) with insulating film (4) on the surface
In order to protect the circuit element (6) provided on the first metal substrate (1) by arranging the first metal substrate (1) so as to be in close contact therewith,
The case (7) made of a resin material is used for casing.

斯る本考案に依れば、第1および第2の金属基板(1)
(2)で二重構造とし、シャーシーに取り付けを行って
も、回路素子(6)とシャーシーとの間に絶縁フィルム
(4)が介されているので第2の金属基板(2)とシャ
ーシーとがショートしても、第1の金属基板(1)の混
成集積回路に悪影響を与えない利点を有する。
According to the present invention, the first and second metal substrates (1)
Even when the double structure is used in (2) and the chassis is attached to the chassis, since the insulating film (4) is interposed between the circuit element (6) and the chassis, the second metal substrate (2) and the chassis are not connected. Has a merit that it does not adversely affect the hybrid integrated circuit of the first metal substrate (1).

また第1図のように、第1の金属基板(1)のサイズ
は、第2の金属基板(2)のサイズより小さいため、第
1の金属基板(1)の周端辺と第2の金属基板(2)の
周端辺との間には、離間距離が設けられ、第1の金属基
板(1)と第2の金属基板(2)の間に生じやすい放電
等を抑止でき、絶縁効果を更に向上させることができ
る。
Further, as shown in FIG. 1, since the size of the first metal substrate (1) is smaller than the size of the second metal substrate (2), the peripheral edge of the first metal substrate (1) and the second metal substrate (1) are A separation distance is provided between the metal substrate (2) and the peripheral edge of the metal substrate (2) to prevent electric discharge or the like that is likely to occur between the first metal substrate (1) and the second metal substrate (2), and to provide insulation. The effect can be further improved.

(ト)考案の効果 上述の如く、第2の金属基板上に、回路素子が固着され
た第1の金属基板を固着する二重構造とすることによ
り、シャーシーにこの二重構造を取り付けても回路素子
とシャーシーとの間に絶縁フィルムが介されているの
で、第2の金属基板とシャーシーとがショートしても、
第1の金属基板の混成集積回路に悪影響を与えず、また
第1図のように、第1の金属基板のサイズは、第2の金
属基板のサイズより小さいため、第1の金属基板の周端
辺と第2の金属基板の周端辺との間には、離間距離が設
けられているので、第1の金属基板と第2の金属基板の
間に生じやすい放電等を抑止でき、従来に比べ信頼性が
高くなり、且つ、放熱性も向上する利点を有するもので
ある。
(G) Effect of the Invention As described above, even if the double structure is attached to the chassis by providing the double structure in which the first metal substrate to which the circuit element is fixed is fixed onto the second metal substrate. Since the insulating film is interposed between the circuit element and the chassis, even if the second metal substrate and the chassis are short-circuited,
It does not adversely affect the hybrid integrated circuit of the first metal substrate, and as shown in FIG. 1, the size of the first metal substrate is smaller than the size of the second metal substrate. Since a separation distance is provided between the edge and the peripheral edge of the second metal substrate, it is possible to suppress electric discharge or the like that is likely to occur between the first metal substrate and the second metal substrate. Has the advantages of higher reliability and improved heat dissipation.

【図面の簡単な説明】[Brief description of drawings]

第1図は本考案の実施例を示す断面図、第2図は従来例
を示す断面図である。 (1)(2)……第1および第2の金属基板、(3)……樹脂
層、(4)……絶縁フィルム、(5)……導電路、(6)……回
路素子、(7)……ケース。
FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. (1) (2) …… first and second metal substrates, (3) …… resin layer, (4) …… insulating film, (5) …… conductive path, (6) …… circuit element, ( 7) …… Case.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】第1の金属基板上に絶縁樹脂層を介して所
望形状の導電路が形成され、前記導電路上の所定の位置
に高電源電圧用の回路素子が固着されるとともに、前記
導電路と前記第1の金属基板を接続するアース構造を有
する混成集積回路であって、 前記第1の金属基板をその表面に絶縁樹脂層が設けられ
た第1の金属基板よりも大きい第2の金属基板上に固着
配置し、第1の金属基板の周端辺と第2の金属基板の周
端辺間に離間距離を設けたことを特徴とする混成集積回
路。
1. A conductive path having a desired shape is formed on a first metal substrate via an insulating resin layer, a circuit element for high power supply voltage is fixed to a predetermined position on the conductive path, and the conductive path is formed. A mixed integrated circuit having a ground structure for connecting a path and the first metal substrate, wherein the second metal substrate is larger than the first metal substrate on the surface of which the insulating resin layer is provided. A hybrid integrated circuit characterized in that it is fixedly arranged on a metal substrate, and a separation distance is provided between the peripheral edge of the first metal substrate and the peripheral edge of the second metal substrate.
JP1986022430U 1986-02-19 1986-02-19 Hybrid integrated circuit Expired - Lifetime JPH0610717Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986022430U JPH0610717Y2 (en) 1986-02-19 1986-02-19 Hybrid integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986022430U JPH0610717Y2 (en) 1986-02-19 1986-02-19 Hybrid integrated circuit

Publications (2)

Publication Number Publication Date
JPS62135464U JPS62135464U (en) 1987-08-26
JPH0610717Y2 true JPH0610717Y2 (en) 1994-03-16

Family

ID=30819804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986022430U Expired - Lifetime JPH0610717Y2 (en) 1986-02-19 1986-02-19 Hybrid integrated circuit

Country Status (1)

Country Link
JP (1) JPH0610717Y2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5815374U (en) * 1981-07-21 1983-01-31 電気化学工業株式会社 circuit printed circuit board

Also Published As

Publication number Publication date
JPS62135464U (en) 1987-08-26

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