JPH0591751A - Portable ac power source - Google Patents

Abstract

PURPOSE:To temporarily lower an output frequency and to cope with the starting transient state of an induction motor, etc., by automatically lowering the frequency of a reference signal when an overload state is detected in an AC generator for forming an AC power by switching controlling an inverter circuit based on the reference signal. CONSTITUTION:The output of an AC generator l is connected to a bridge type inverter 3a through a rectifying and smoothing circuit 2. An output of a VCO 6 which outputs an oscillation signal for forming an output target waveform signal is input to a frequency divider 7 as frequency reducing means. The output of the divider 7 is connected to a sine wave forming circuit 8 as a sine wave reference signal forming circuit. The output of the circuit 8 is input to a PWM 11 as a switch-controller through an electronic variable resistor 9 and an LPF 10. In this case, when an output of a current detector 5 is input to the divider 7 and an overload state is detected, the frequency of a sine wave reference signal is automatically reduced to alleviate a temporarily overload sharing of a power source when an induction motor, etc., is started.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a portable AC power supply device, and more particularly to a smooth drive of an induction motor.

[0002]

2. Description of the Related Art In recent years, an inverter device has been increasingly used in a portable AC power supply device in order to stabilize the output frequency. For example, an AC generator driven by an engine supplies a commercial frequency power supply. In a portable AC power supply device that outputs AC power, an engine is operated in a high rotation speed region to obtain a high output AC current from a generator, and this AC current is once converted into a DC current, and then an inverter device is used. A device adapted to convert into an alternating current of a commercial frequency and output the same is known from Japanese Utility Model Application Laid-Open No. 59-132398.

By the way, in such an AC power supply device, there is a demand for the output waveform to be as close to a sine wave as possible depending on the application, and in order to meet this demand, the inverter device is subjected to pulse width modulation (PW).
An AC power supply device adopting the M) system has also been studied (Japanese Patent Laid-Open No. 82098/60).

By the way, in the portable AC power supply device as described above, various measures have been taken to protect its output circuit. However, depending on the output characteristics of the power supply device and the characteristics of the load, the load current to be output may vary. In some cases, the size does not directly serve as an indicator of the load state, and there is one aspect that does not constitute an appropriate protection system. For example, in a configuration in which the output is simply cut off when the load current becomes large, a load device such as an electric motor in which a large current flows temporarily at the time of start is connected to the output circuit of the power supply device. In this case, there is a possibility that the output may be cut off more than necessary at the time of starting the load device, and it has not been an optimum protection system for the output circuit.

In view of the above, the applicant of the present invention, for the AC power supply device of the inverter control system, stops the output only for a certain period of time when an overcurrent state is detected, and turns on the power again after the certain period of time. A system has been proposed in which an electric motor or the like can be started while repeating the operation (Japanese Patent Laid-Open No. 63-114527). This is intended to keep the average energization current value low by intermittently limiting the energization time of a large current.

[0006]

By the way, an induction motor (for example, an induction motor for an air compressor used at a construction site) is often used as a load of a portable AC power supply device of this type. Focusing on the starting current of a kind of inductance load, the output power of the load itself decreases as the frequency decreases, but the magnitude of the starting current also decreases. For example, in the case of a shared load of 50 Hz and 60 Hz, a large amount of starting power (a large starting current at a constant voltage) is required at 60 Hz (higher frequency) due to the influence of inductance.

Therefore, in the transient state at the time of starting, even if the output power of the load is reduced by lowering the frequency, there is no great influence because it is originally in the transient state, and after this transient state has passed, the frequency is immediately returned to the normal frequency. By
No adverse effects occur during normal operation.

The present invention has been made in view of the above circumstances, and its object is to change the point of view from the method in which the average energization current value is reduced by intermittently limiting the energization time of a large current. A portable AC power supply device configured to temporarily reduce the output power of the load by temporarily reducing the output frequency, and thereby smoothly start the induction motor and the like while keeping the starting current small. To provide.

[0009]

In order to achieve the above object, the present invention rectifies and smoothes the alternating current output from the generator main output winding to obtain a direct current of a predetermined frequency through an inverter circuit. In a portable AC power supply device configured to output as an AC output, a reference signal forming circuit that outputs a reference signal of the predetermined frequency, and a switching signal of the inverter circuit based on the reference signal A switching control circuit for forming an AC output, a current detection circuit for detecting a load current, an overload detection circuit for detecting whether or not an overload state is caused by the load current signal, and an overload state when an overload state is detected. A frequency lowering means for automatically lowering the frequency of the reference signal is provided.

[0010]

In the portable AC power supply device according to the present invention,
When it becomes overloaded, the output frequency is temporarily lowered,
It operates in response to a starting transient for a load such as an induction motor.

[0011]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a portable AC power supply device according to the present invention. In the figure, the output side of the AC generator 1 is connected to the input side of the rectifying and smoothing circuit 2,
The output side of the rectifying / smoothing circuit 2 is a bridge type inverter circuit 3
a is connected to the input side of the bridge type inverter circuit 3a
The output side of is connected to the LPF (low-pass filter) 3b and the input side of the current detection circuit 5, and the output side of the LPF 3b is connected to the output terminal T1 via the voltage detector 4.

The output side of a voltage controlled oscillator (hereinafter referred to as "VCO") 6 which outputs an oscillation signal for producing an output target waveform signal (sine wave reference signal) is provided with a frequency divider 7 as a frequency lowering means. It is connected to the input side, the output side of the frequency divider 7 is connected to the input side of a sine wave conversion circuit 8 as a sine wave reference signal forming circuit that generates an output target waveform signal, and the output side of the sine wave conversion circuit 8 is Electronic volume (electronic attenuation means) 9
Is connected to the input side of and the output side of the electronic volume 9 is LP
It is connected to the input side of a pulse width modulator (hereinafter referred to as “PWM”) 11 as a switch control circuit via F10.

Further, the output side of the voltage detector 4 is connected to the non-inverting terminal of the operational amplifier 12, the output side of the operational amplifier 12 is connected to the input side of the rectangular wave converter 14 via the resistor 13, and the rectangular wave converter is connected. The output side of 14 is connected to the input side of the inverter 18 and the input side of the phase difference detector 16. The output side of the current detection circuit 5 is connected to the input side of the phase difference detector 16 via the rectangular wave converter 15, and the output side of the phase difference detector 16 is connected to the input side of the VCO 6. The input side of the phase difference detector 16 is also connected to the output side of the sine wave conversion circuit 8, and the output side of the current detection circuit 5 is also connected to the input side of the frequency divider 7.

Further, the input side of the NAND circuit 19 is connected to the output sides of the inverter 18 and the operation / stop controller 17,
The output side of the luck / stop controller 17 is connected to the D terminal of the D flip-flop 21 and the input side of the inverter 20. The CK (clock) terminal of the D flip-flop 21 is the output side of the NAND circuit 19, its R (reset) terminal is the output side of the inverter 20, and its Q bar (inverted output) terminal is the sine wave conversion circuit 8, electronic volume 9 and It is connected to the R (reset) terminal of the PWM 11. The output side of the inverter 20 is connected to the R terminal of the counter 22. As the counter 22, for example, μPD4024 (Nichiden) may be used. The CK terminal of the counter 22 is connected to the output side of the frequency divider 7, and its Q6 (output) terminal is connected to the input side of the inverter 23. The output side of the inverter 23 is connected to the input side of the rectangular wave converter 24 via the resistor 24.

The portable AC power supply device having such a connection and configuration can be operated independently or in parallel. However, in the case of parallel operation, the output terminal T1 of its own machine and the output terminal T1 of another machine are operated.
This is done by connecting and.

Next, the operation of the portable AC power supply device of FIG. 1 will be described.

The alternating current output from the alternating current generator 1 is rectified and smoothed by the rectifying and smoothing circuit 2 to become direct current power. This DC power is converted into AC power by the bridge type inverter circuit 3a controlled by the PWM 11, and is output to the load from the output terminal T1 via the LPF 3b. The output voltage signal a output from the voltage detector 4 has a sine wave shape as shown in FIG. 2A, and this signal a is input to the rectangular wave converter 14 through the operational amplifier 12, and is output to the rectangular wave converter 14 shown in FIG. A rectangular wave signal b as shown in is output to the inverter 18 and the phase difference detector 16. A signal b ′ output from the rectangular wave converter 15 by inputting an output current signal, which will be described later, from the current detection circuit 5 is also a similar rectangular wave signal, and is input to the phase difference detector 16. The phase difference detector 16 outputs a phase difference voltage corresponding to the phase difference between the signals b and b ′ to the VCO 6 to control the oscillation frequency of the VCO 6.

The frequency-controlled oscillation signal output from the VCO 6 is frequency-divided by the frequency divider 7 and input to the sine wave conversion circuit 8 as a clock signal. The sine wave conversion circuit 8 generates a stepwise sine wave signal by the clock signal, and the sine wave signal is output to the electronic volume 9. The electronic volume 9 controls the above-mentioned sine wave signal for blocking, passing, and attenuation at the time of passing.
A pulse input to the PWM 11 via F10 and pulse width modulated by the sine wave signal is output from the PWM 11. The LPF 10 is a filter for removing the step portion of the stepped sine wave signal to obtain a smooth sine wave signal. The pulse output from the PWM 11 controls the energization time of each gate constituting the bridge type inverter circuit 3a, and the bridge type inverter circuit 3a is formed as a pulse train having a pulse width corresponding to the sine wave signal from the LPF 10.
And the output of the bridge-type inverter circuit 3a becomes sinusoidal AC power by the LPF 3b and is output from the output terminal T1 via the voltage detector 4.

When the luck / stop controller 17 is set to the operating state, the output signal c of the luck / stop controller 17 is changed from the "L" level (stopped state) to the "H" level, as shown in FIG. 2 (c). Becomes

The output signal c is applied to the D terminal of the D flip-flop 21, and the NAND signal d of the output signal c and the inverted signal of the rectangular wave signal b is applied to the CK terminal thereof (see FIG. 2 (d)).
An inverted signal f (see FIG. 2F) of the output signal c is input to the R terminal. The Q bar terminal of the D flip-flop 21 has a signal Q bar (see FIG. 2) corresponding to the signals c, d, and f.
(See (e)) is output. Signal Q bar and signals c, d, f
The relationship is shown in the table. In the table, ↑ indicates a rising portion of the pulse signal d, ↓ indicates a falling portion thereof, s indicates a signal on the S terminal of the D flip-flop 21, and the signal s is always “L”.
It is a level. Also, * indicates that either "L" or "H" may be used (don't care).

[0022]

[Table 1] When the own generator is connected in parallel with another generator and the AC output voltage is supplied from the other generator, the operation / stop controller 1
When the signal c is set to the “H” level by setting 7 as the operating state, the signal Q bar becomes the “L” level at the first rise of the signal d as shown in the third row of the table (see FIG. 2 (d) ( e)
), The reset state of the sine wave circuit 8 is released, and the output target waveform signal is output from the circuit 8 to the electronic volume 9. Thereby, the signal of the selected output target waveform is output from the electronic volume 9, and the self-generator can supply the AC output to the load. The output target waveform signal is a signal obtained by mixing the AC output voltage signal and the output target waveform signal at an appropriate ratio. However, when the AC output voltage is not supplied from another generator, the C of the D flip-flop 21 is
No pulse signal is supplied to the K terminal, its Q-bar terminal maintains the initial state of “H” level (see the fifth row of the table), and the sine wave circuit 8 remains in the reset state. Therefore, the output target waveform signal is not output from the circuit 8, and the self-generator cannot supply the AC output to the load.

The counter 22 is provided to eliminate the above-mentioned problems and allows the portable AC power supply device to start up independently. That is, when the operation / stop controller 17 is set to the operating state and the signal c is set to “H” and the signal f is set to “L”, the reset state of the counter 22 is released, and after a predetermined time elapses by the clock from the frequency divider 7. , The level of the output terminal Q6 is from "L" to "H", and then "H"
To "L", and the output signal level of the inverter 23 changes from "H" to "L" and from "L" to "H". As a result, as can be seen from the table, the output signal Q bar of the D flip-flop 21 becomes "L" level and the reset state of the sine wave conversion circuit 8 is released, so that the self-generator outputs the output from the circuit 8. It is possible to output AC power having a waveform based on the target waveform signal.

When the other generator is already started up, the own generator must be started up according to the waveform of the other generator. Otherwise, the generator will be overloaded at the same time when it starts up, and the energization of the load in use may be interrupted, or the waveform at PWM start may be distorted and the FET of the inverter circuit may be destroyed. In the present embodiment, whether the output target waveform signal at startup is the AC output voltage signal or the output target waveform signal matches the output phase of another generator at startup. .. This is performed at the reset terminal of the sine wave conversion circuit 8 or the like, as will be described later.

Next, the components 1 to 5, 10, 11 of FIG.
Will be described in detail with reference to FIGS.

3 to 5 are components 1 to 5 and 1 of FIG.
It is a block diagram which shows 0, 11 and its related circuit. In FIG. 3, 1a is a three-phase output winding independently wound around the stator of the AC generator 1, and 1b is a single-phase auxiliary winding. A rotor (not shown) of the AC generator 1 is formed with magnetic poles of multi-pole permanent magnets and is configured to be rotationally driven by an engine (not shown). Three-phase output winding 1a
The output end of is connected to the bridge rectifier circuit 2a composed of three thyristors and three diodes, and the output end of the bridge rectifier circuit 2a is connected to the smoothing circuit 2b. The bridge rectifying circuit 2a and the smoothing circuit 2b constitute the rectifying and smoothing circuit 2.

The output terminal of the single-phase auxiliary winding 1b is connected to a constant voltage supply device A1 having positive and negative output terminals E and F. The constant voltage supply device A1 includes two sets of a rectifying circuit, a smoothing circuit,
It consists of a constant voltage circuit A1a, and each circuit of one set works for the current in one direction from the single-phase auxiliary winding 1b, and the other set for the current in the opposite direction to the one direction. Each circuit operates, and thereby positive and negative constant voltages are output to the output terminals E and F, respectively.

A2 is a thyristor control circuit, one end of which is on the power supply input side is connected to the positive electrode output terminal E of the constant voltage supply device A1, and the other end is grounded together with the positive electrode terminal of the smoothing circuit 4. The signal input terminal of the thyristor control circuit A2 is composed of a series circuit of a capacitor C1 and resistors R1 to R3, one end of the capacitor C1 side is connected to the positive output terminal E of the constant voltage supply device A1, and the other end of the resistor R3 side is connected. It is connected to the negative terminal of the smoothing circuit 4. The connection point between the resistors R1 and R2 is connected to the base of the transistor Q1, the collector of the transistor Q1 is connected to the base of the transistor Q2, and the collector of the transistor Q2 is connected to the gate input circuit of each thyristor of the bridge rectifier circuit 2a. The input signal of the gate input circuit is controlled according to the potential of the connection point between R1 and the resistor R2.

The output side of the transient suppression circuit A3 is connected to the connection point K between the capacitor C1 and the resistor R1. According to the transient suppression circuit A3, the positive electrode output terminal E of the constant voltage supply device A1
The cathode side of the Zener diode D1 is connected to the input side (G) of the constant voltage circuit A1a provided on the side, and the anode side of the Zener diode D1 is connected to the negative output terminal F of the constant voltage supply device A1 via a resistor. , And the non-inverting terminal (+) of the inverting comparator A31 is grounded via a resistor. The output side of the inverting comparator A31 is NOR
Connected to the input side of the circuit A32, while the NOR circuit A32
A protective device A4 is connected to the other terminal on the input side of to detect that the generator is in an overcurrent condition or other condition requiring protection. When a condition requiring protection is detected, " The "H" level signal is supplied to the NOR circuit A32. The output side of the NOR circuit A32 is connected to the base of the transistor Q3 via an inverter A33 and a resistor. The emitter of the transistor Q3 is connected to the negative output terminal F of the constant voltage supply device A1, while the collector is connected to the positive output terminal E of the constant voltage supply device A1 via the resistor R4 and the constant voltage supply via the capacitor C2. It is connected to the negative electrode output terminal F of the supply device A1. The base of the transistor Q4 is connected to the positive terminal of the capacitor C2, the collector of the transistor Q4 is connected to the positive output terminal E of the constant voltage supply device A1, while the emitter is connected to the anode of the diode D2 and the thyristor control circuit. It is connected to a connection point K between the capacitor C1 of A2 and the resistor R1.
The cathode of the diode D2 is connected to the positive terminal of the capacitor C2.

The output side of the smoothing circuit 2b is connected to the bridge type inverter circuit 3a shown in FIG. The bridge-type inverter circuit 3a is composed of a bridge circuit composed of four FETs Q5 to Q8. Between the drains of the FETs Q5 and Q6 and the common line LN, there is a current detection resistor (current detector) R31 for detecting a load current value. R32 is provided. The drive signal circuit connected to each gate terminal of the FETs Q5 to Q8 will be described later.

The output side of the bridge type inverter circuit 3a is connected to output terminals T11, T12 to which a load (not shown) is connected via the LPF 3b. The LPF 3b is composed of coils L1 and L2 connected in series with a load, and a capacitor C3 connected in parallel with the load.

Reference numeral 4 is a voltage detector, and 5 is a current detection circuit, which has an output terminal T4 of the detector 4 and an output terminal T5 of the detector 5.
P is an operational amplifier 12, a rectangular wave converter 15, and a frequency divider 7.
Connected to the input side of.

In the current detection circuit 5, the connection points M and N between the pair of current detection resistors R31 and R32 and the FETs Q5 and Q6 are the non-inverting input terminal (+) and inverting input terminal of the input side operational amplifier 51 of the two-stage amplifier. (−), And the output side of the operational amplifier 51 is the output side operational amplifier 52 of the two-stage amplifier.
Connected to. The output side of the operational amplifier 52 is connected to the rectangular wave converter 15, and the operational amplifiers 53 and 5 are connected.
4 is connected to the input side.

A voltage corresponding to the output current (load current) of the bridge type inverter circuit 3a is generated in the pair of current detecting resistors R31 and R32 of the bridge type inverter circuit 3a. FIG. 15A shows the detected current waveform at the connection point M. The detected current waveform at the connection point N is as shown in FIG.
It is in the opposite phase of (a). The detected current waveform signal (output current signal) at the connection points M and N is input to the non-inverting input terminal (+) and the inverting input terminal (−) of the operational amplifier 51 of the current detection circuit 5. The operational amplifier 51 constitutes an integrating circuit,
High frequency components are removed from the input potential signals at the connection points M and N, and when attention is paid only to the potential signal at the connection point M, a signal including a DC component and a commercial frequency component is the operational amplifier 51.
Appears on the output side of. This signal is inverted and amplified by the operational amplifier 52 which constitutes the integrating circuit, so that FIG.
The signal of the commercial frequency from which the high-frequency component as shown in (3) is removed is output to the operational amplifiers 53 and 54. The operational amplifiers 53 and 54 perform full-wave rectification on the output current signal output from the operational amplifier 52 and output it to the LPF 55. LPF55
Smoothes the overall rectified signal and outputs it to the non-inverting terminal (+) of the operational amplifier 56. The operational amplifier 56 constitutes a comparator, compares the voltage division level of the voltage of the positive output terminal E by the resistors R51 and R52 with the input signal level to the non-inverting input terminal (+), and the input signal level is the above voltage division. When the voltage exceeds the level, the "H" level signal having the same positive potential as the potential of the terminal E is output to the frequency divider 7. When the input signal level does not exceed the voltage division level, an “L” level signal having the same negative potential as the potential of the negative output terminal F is output to the frequency divider 7.

Both ends H of the capacitor forming the LPF 3b
Is connected to the distortion detection circuit A5 (FIG. 5) including a division resistor and a differential amplifier. The distortion detection circuit A5 has an output terminal T1.
By directly comparing the waveforms of the output voltage appearing at 1 and T12, the waveform distortion or offset component of the output is detected and the detection signal is output. Then, this detection signal is also output to the terminal T ₄ as a voltage detection signal (phase detection of voltage waveform).

In FIG. 5, 10 is an LPF and 11 is a PW.
It is M. The output side of the electronic volume 9 is connected to the inverting input terminal (-) of the operational amplifier of the LPF 10. This LP
F10 makes the stepwise sine wave output from the electronic volume 9 a smooth sine wave. The output side of the LPF 10 is connected to the inverting input terminal (-) of the operational amplifier of the distortion correction circuit A6, and the non-inverting input terminal (+) of the operational amplifier is provided.
The output side of the distortion detection circuit A5 is connected to. The distortion correction circuit A6 corrects the sine wave level output from the electronic volume 9 via the LPF 10 with the detection signal output from the distortion detection circuit A5, and outputs a corrected sine wave signal.

In FIG. 5, reference numeral 111 denotes a rectangular wave oscillator, and the frequency of the rectangular wave oscillated by the rectangular wave oscillator 111 is set to a value significantly higher than the frequency of the sine wave output from the LPF 10. The output side of the rectangular wave oscillator 111 is connected to the integrating circuit 112, and the integrating circuit 112 integrates the rectangular wave and converts it into a triangular wave signal.

The distortion correction circuit A6 is output from the LPF 10.
The sine wave signal corrected by and the triangular wave signal output from the integrator circuit 112 are superimposed on each other and the inverter buffer 110
(Pulse width modulation circuit). The inverter buffer 110 has a predetermined threshold value (threshold level), outputs a signal of "L" level when a signal of a level exceeding this threshold is input, and outputs a signal of a level below the threshold. Signal of "H" level is output when the above signal is input to form a so-called pulse width modulation (PWM) signal. For example, a CMOS having a fixed threshold value with respect to the input signal to the gate terminal. It is composed of a gate IC.

The output side of the inverter buffer 110 is input to one input terminal of the NAND circuit 114 via the inverter 113 and is directly input to the NAND circuit 115.
Input to one input terminal of. The output terminal J of the NOR circuit A32 of the transient suppression circuit A3 is connected to the other input terminal of the NAND circuit 114 and the other input terminal of the NAND circuit 115.

The output terminal of the NAND circuit 114 is connected to the first push-pull amplifier composed of the transistors Q9 and Q10. Transistor Q of the first push-pull amplifier
The collector of 9 is the positive electrode output terminal E of the constant voltage supply device A1.
The collector of the transistor Q10 is a constant voltage supply device A
1 is connected to the negative electrode output terminal F.

The output terminal (the connection point between the emitters of the transistors Q9 and Q10) of the first push-pull amplifier is connected to the connection point between the anode of the diode D7 and the cathode of the diode D8. The cathode of the diode D7 is connected to the positive output terminal E of the constant voltage supply device A1, and the anode of the diode D8 is connected to the negative output terminal F of the constant voltage supply device A1. The diodes D7 and D8 are for absorbing a surge generated in a pulse transformer described later.

Anode of diode D7 and diode D
The connection point with the cathode of 8 is connected to each one end of the primary side coils L3 and L4 of the pulse transformers A and C via the capacitor C4 for cutting low frequency components. The other end of each of the primary side coils L3 and L4 is connected to the negative electrode output terminal F of the constant voltage supply device A1. The capacitor C4 is connected to the negative output terminal F of the high frequency power supply A1. The capacitor C4 is set to a constant value that allows only a high frequency PWM carrier frequency signal to pass but not a low frequency component.

Similarly to the above, the output terminal of the NAND circuit 115 is connected to the second push-pull amplifier composed of the transistors Q11 and Q12, and the output terminal of the second push-pull amplifier is the anode of the diode D9 and the diode D10.
Is connected to the connection point with the cathode. Similar to the above-mentioned capacitor C4, this connection point allows only the PWM carrier frequency signal to pass through, and the primary side coil L5 of the pulse transformers B and D through the capacitor C5 set to a constant value so as not to pass the low frequency component. It is connected to each end of L6.

Next, FETs Q5 to Q of the inverter circuit 3a
The drive signal circuit connected to each gate terminal 8 will be described. The secondary end of the pulse transformer A has a resistor R
5, demodulation capacitor C6, resistor R6 and diode D
13 is connected to the gate terminal of FETQ5 via a parallel circuit with 13, while the other end on the secondary side of the pulse transformer A is FETQ5.
5 is connected to the source terminal. The connection point between the capacitor C6 and the parallel circuit composed of the resistor R6 and the diode D13 is connected to the other end of the secondary side of the pulse transformer A via the series circuit of the Zener diodes D5 and D6. The diode D13 is connected such that its anode is on the gate terminal side of the FET Q5, and the Zener diodes D5 and D6 are connected such that their anodes face each other.

Secondary side of each pulse transformer B, C, D,
Between the corresponding gate terminals of the FETs Q6 to Q8,
A circuit exactly the same as the circuit provided between the secondary side of the pulse transformer A and the gate terminal of the FET Q5 is provided.

In FIG. 5, the inverter 116 and the AND circuit 117 form a gate circuit for the PWM signal, and the gate is opened when the signal Q bar from the D flip-flop 21 becomes "L". Therefore, the PWM signal is output from the falling point of the signal Q bar, that is, the zero-cross point of the positive slope of the AC output voltage.

FIG. 6 is a circuit diagram showing an example of a rectangular wave converter 14 for an AC output voltage signal. This circuit is a positive feedback amplifier circuit using an operational amplifier. A sine wave signal having a phase corresponding to the phase of the AC output voltage is output from the voltage detector 4 and input to the rectangular wave converter 14 via the operational amplifier 12, is positively feedback-amplified by the rectangular wave converter 14, and has a steep rise. , And a rectangular wave signal b having a falling characteristic.

FIG. 7 is a circuit diagram showing an example of a rectangular wave converter 15 for an AC output current signal. This circuit is a high amplification circuit using an operational amplifier. A sine wave signal (output current signal) having a phase corresponding to the phase of the load current is input to the rectangular wave amplifier 15 from the current detection circuit 5, and becomes a rectangular wave signal b ′ having steep rising and falling characteristics. Is output.

FIG. 8 is a circuit diagram showing an example of the phase difference detector 16. The operation of the phase difference detector 16 will be described with reference to FIG. The rectangular wave signal g output from the rectangular wave converter 14 and indicating the voltage phase of the AC output (FIG. 9A) and the rectangular wave signal h output from the rectangular wave converter 15 and indicating the current phase of the AC output (FIG. 9 (b) is input to the NAND circuit 161 via the input terminals 16T1 and 16T2 and becomes the NAND signal i (FIG. 9 (c)). The signal i and the signal g are input to the NAND circuit 162, and the signal i and the signal h are input to the NAND circuit 1.
63 to the NAND signal g '(Fig. 9).
(D)) and h '(FIG. 9 (e)). The signals g ′ and h ′ are input to the NAND circuit 164 and the NAND signal i ′ (FIG. 9).
(F)). As can be seen from FIGS. 9 (a), 9 (b) and 9 (f), the NAND signal i'is a pulse having a pulse width corresponding to the phase difference between the voltage and the current of the AC output and the rectangular wave signal g of the leading phase. This is a pulse in which the front end and the rear end are the rising portions.

Inverters 165 and 168 and NAND circuit 1
66, 167, capacitor 16C, resistors 16R1, 16
R2 constitutes a phase difference / voltage converter for generating a voltage corresponding to the phase difference between the voltage of the AC output and the current. The signal j (FIG. 9 (g)) receives the pulse output from the sine wave conversion circuit 8 via the input terminal 16T3, and the inverter 1
The signal obtained by inverting at 65 is a signal indicating the phase of the oscillation signal output from the VCO 6, and the frequency of this signal j is a double period of the output target waveform signal, that is, the AC output waveform. Of these half cycles, the half cycle is divided into the first half and the latter half to serve as a reference signal for discriminating whether the phase difference signal i is the delayed phase or the advanced phase. The signal j defines the gate section of the signal i '. In FIG. 8, the signal i ′ is output from the NAND circuit 166 while the signal j is “H”. In the section where the signal j is "L", the NAND circuit 167 outputs the signal i '.
However, since the signal i ′ is “L” in the “L” section of the signal j, the NAND circuit 167 is output.
Of the output signal of the inverter 168, that is, the output signal 1 of the inverter 168 does not change. That is, as shown in FIGS. 9 (h) and 9 (i), the signal k becomes "L" every time the signal i'becomes "H", while the signal l maintains "L". here,
The "H" level and the "L" level are, for example, 8V and -8V, and when the signal k is "H" and the signal l is "L", 8
V and -8V cancel each other, and the signal m (FIG. 9 (j)) becomes 0V. Next, when the signal k becomes "L", both the signals k and 1 also become "L", so that they are discharged toward -8V, and when the signal k becomes "H" next, they become 0V as shown in FIG. As a result, the average voltage level changes between 0V and -8V. Note that the above time chart is an example of the case where the current of the AC power is lagging behind the voltage, but when the current is lagging ahead of the voltage, FIG.
As shown in, the level of the average voltage changes between 0V and + 8V, and when the signal j has a doubled cycle of the output target waveform, it is -4V corresponding to the phase difference as a whole. A voltage of between + 4V will be generated.
The voltage corresponding to the phase difference is output from the output terminal 16T4 to the VCO.
6 is output.

FIG. 10 is a circuit diagram showing an example of the VCO 6, in which the oscillation frequency is controlled by the variable capacitance diode. That is, when the reverse bias voltage applied to the varactor diode increases, the junction capacitance decreases. For example, the frequency can be increased by increasing the reverse bias voltage, and the voltage of the AC output is The frequency can be increased when the phase is advanced from the current, and can be decreased when the phase is delayed. A voltage corresponding to the phase difference is input to the VCO 6 from the phase difference detector 16 via the input terminal 6T1, and the VCO 6 outputs an oscillation signal having a frequency corresponding to the voltage from the output terminal 6T2. In addition, VCO
When a crystal oscillator is used for 6, the frequency is stable, but it can change by about ± 0.01% depending on the combined capacitance value.

FIG. 11 is a circuit diagram showing an example of the frequency divider 7, which is composed of, for example, counters 4040 and 4017. The oscillation signal is input from the VCO 6 to the input terminal 7T1 of the frequency divider 7, and the frequency-divided signal obtained by dividing this signal is output from the output terminal 7T2.

SW71 is a switch that determines the frequency of the divided signal output from the output terminal 7T2, and is connected to the positive electrode output terminal E side for supplying a positive voltage or the negative electrode output terminal F side for supplying a negative voltage. In this case, a frequency-divided signal having a frequency such that the sine wave signal output from the sine wave conversion circuit 8 becomes 50 Hz or 60 Hz is output from the output terminal 7T2.
The terminal P is connected to the current detection circuit 5, and when the current detection circuit 5 detects an overload, a positive potential of “H” level is input, and when the overload is not detected, a negative potential of “L” level is input.
Therefore, in the case of overload, the sine wave signal output from the sine wave circuit 8 becomes 50 Hz.

FIG. 12 is a circuit diagram showing an example of the sine wave conversion circuit 8, which is composed of, for example, a multiplexer 4051. The terminal X of the multiplexer 4051 is an output terminal, and the input terminals X0 to X depending on the states of the terminals A, B, and C.
It is connected to any one of 7. Each input terminal X0 to X7
Is connected to the connection of each voltage dividing resistor. A voltage corresponding to the electrical position is generated in each connection portion, and voltages of these respective levels are sequentially output from the output terminal X via the input terminals X0 to X7, whereby a stepped sine wave is generated. A signal can be obtained and this sine wave signal is output to the electronic volume 9 via the terminal 8T4. Further, the clock signal is also sent from the sine wave conversion circuit 8 to the electronic volume 9 at the terminal 8T6.
Is output via. In FIG. 12, 8T1 is an input terminal for the frequency-divided signal from the frequency divider 7, 8T2 is an output terminal for outputting a pulse indicating the phase of the oscillation signal to the phase difference detector 16, and 8T3 and 8T5 are reset terminals. .. Since the signal Q bar is input to the terminals 8T3 and 8T5, a sine wave signal is generated at the falling edge of the signal Q bar, that is, from the zero crossing point of the positive slope of the AC output voltage. That is, the phase of the output target waveform signal matches.

FIG. 13 is a circuit diagram showing an example of the electronic volume 9 and is composed of, for example, a multiplexer 4051. The AC output voltage signal and the output target waveform signal are input from the operational amplifier 12 and the sine wave conversion circuit 8 to the input terminals 9T1 and 9T4 as signals indicating the output target waveform. Further, the sine wave conversion circuit 8 is connected to the input terminal 9T2.
From the D flip-flop 21 to the input terminal 9T3 as a reset release signal.
The bar is entered. The multiplexer 4051 is shown in FIG.
The same operation as that of the multiplexer 4051 of the sine wave conversion circuit 8 shown in FIG. 2 is performed, and the input terminals X0 to X7 are sequentially connected to the output terminal X. When the terminals X0 and X are connected, the voltage signal of the AC power from the operational amplifier 12 passes from the terminal 9T5 to the LPF 10 via the terminal X.
When the terminals X7 and X are connected to each other, the output target waveform signal from the sine wave conversion circuit 8 is output from the terminal 9T5 to the LPF 10 via the terminal X. Each of the terminals X1 to X6 located between the terminals X0 and X7 outputs a signal having more voltage signal components of AC power or a signal having more output target waveform signal components depending on the respective positions. For example, when the terminals X1 and X are connected to each other, the voltage signal component of the AC power becomes a signal having more output target waveform signal components. In this way, the target signal can be adjusted appropriately, the overload state at the time of rising can be avoided, and a smooth shift to parallel operation can be realized. Therefore, when starting up the electronic volume 9,
The AC voltage signal input to the terminal 9T1 can be prioritized over the output target waveform signal input to the terminal 9T4, and switching control of the inverter circuit 3a (FIG. 4) can be performed according to the AC voltage signal. Further, after starting, the output target waveform of the switching control of the inverter circuit 3a can be gradually switched from the waveform of the AC voltage signal to the waveform of the output target waveform signal. Since the signal Q bar is input to the reset terminal 9T3 of the electronic volume 9, the sine wave signal is output from the falling time of the signal Q bar, that is, the zero-cross point of the positive slope of the AC output voltage. This is because at this zero-cross point, the PWM modulation rate is zero, the drive waveform becomes the most stable state at the time of PWM start of the FET, and it is safely started.

As described above, the VCO is changed by the phase difference voltage.
Since the oscillation frequency of 6 can be automatically controlled and the phases of the AC output voltage and the output current of each generator can be automatically matched, the output phase of each generator (in any number) in parallel operation can be automatically adjusted. Can be matched.

When the current detection circuit 5 detects an overload, the frequency is changed from 60 Hz to 50 Hz. Therefore, for example, an induction motor shared by 50 Hz and 60 Hz is set to 60 Hz.
If it is used at Hz, if an overload condition is detected, the current supplied to the load is reduced by temporarily switching to an output of 50 Hz, and the current continues to be supplied within this current supply capacity range. It becomes possible to energize, and thus the starting characteristic can be improved for a load such as an electric motor. In the above embodiment, the case where the frequency is changed from 60 Hz to 50 Hz has been described, but it may be changed to a lower frequency such as 45 Hz.

When the power factor is 1, the phases of the AC output voltage and the current match and the phase difference disappears. However, when the power factor is not 1, that is, when the load is an inductive load or a capacitive load, the voltage is And the current does not match. However, the other generators also generate the same phase difference between the voltage and current as the self-generator, so that no mutual current is generated. In other words, stable parallel operation is performed with a phase difference between the voltage and the current. At such a low power factor, the AC output frequency deviates from the power factor of 1, but the deviation is within 0.01%, which is smaller than the fluctuation of the commercial power source.

FIG. 14 is a graph for explaining the usable output during parallel operation, and shows a case where two generators having characteristics S1 and S2 are operated in parallel. IA is the maximum current, the voltage at this time is VM, and in the characteristic S2, the voltage V
The output current at M is IB. Therefore, the maximum total output PM is PM = VM (IA + IB) VA.

Note that VX and VY are variations in the setting of the output voltage, and the voltage fluctuation rate (VX-VM) / VX needs to be within a predetermined range.

[0061]

As described above, according to the present invention, the direct current obtained by rectifying and smoothing the alternating current output from the generator main output winding is output as the alternating current output of a predetermined frequency through the inverter circuit. In the portable AC power supply device configured as described above, a reference signal forming circuit that outputs the reference signal of the predetermined frequency and a switching that forms an AC output of the predetermined frequency by switching-driving the inverter circuit based on the reference signal. A control circuit, a current detection circuit for detecting a load current, an overload detection circuit for detecting whether or not an overload condition is present by the load current signal, and an automatic frequency of the reference signal when an overload condition is detected. When a device with a lower frequency, such as an induction motor, starts less power, it is equipped with a frequency lowering means that lowers the power automatically. While reducing the temporary overload burden source apparatus can be improved its starting characteristics.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a portable AC power supply device according to the present invention.

FIG. 2 is a time chart for explaining the operation of the embodiment of FIG.

3 is a circuit diagram showing a part of the configuration of the embodiment of FIG. 1 in detail.

FIG. 4 is a circuit diagram showing a part of the configuration of the embodiment of FIG. 1 in detail.

5 is a circuit diagram showing a part of the configuration of the embodiment of FIG. 1 in detail.

FIG. 6 is a circuit diagram showing an example of a rectangular wave converter.

FIG. 7 is a circuit diagram showing an example of a rectangular wave converter.

FIG. 8 is a circuit diagram showing an example of a phase difference detector.

9 is a time chart for explaining the circuit operation of FIG.

FIG. 10 is a circuit diagram showing an example of a VCO.

FIG. 11 is a circuit diagram showing an example of a frequency divider (frequency reduction means).

FIG. 12 is a circuit diagram showing an example of a sine wave conversion circuit (sine wave reference signal forming circuit).

FIG. 13 is a circuit diagram showing an example of an electronic volume.

FIG. 14 is a graph for explaining usable output during parallel operation.

FIG. 15 is a waveform diagram showing a signal waveform of each part of the current detection circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 AC generator 2 Rectifying / smoothing circuit 3a Bridge type inverter circuit 5 Current detection circuit 7 Frequency divider (frequency lowering means) 8 Sine wave conversion circuit (sine wave reference signal forming circuit) 11 PWM (switching control circuit) R31, R32 current Detection resistor (current detector)

Claims (2)

[Claims] 1. A portable AC power supply device configured to rectify and smooth an alternating current output from a generator main output winding, and output a direct current obtained as an alternating current output of a predetermined frequency through an inverter circuit. A reference signal forming circuit that outputs a reference signal of the predetermined frequency; a switching control circuit that forms an AC output of the predetermined frequency by driving the inverter circuit based on the reference signal to detect a load current; A current detection circuit, an overload detection circuit for detecting whether or not an overload state is present by the load current signal, and a frequency lowering means for automatically lowering the frequency of the reference signal when an overload state is detected. A portable AC power supply characterized by being provided. 2. A bridge type inverter circuit for switching control of the output of a DC power supply circuit, a sine wave forming circuit for outputting a sine wave reference signal of a predetermined frequency, and a pulse width modulation for inputting this sine wave reference signal. A pulse width modulation circuit for outputting a PWM signal, and a switching control circuit for performing a switching operation of the bridge type inverter circuit based on the PWM signal output from the pulse width modulation circuit,
A portable AC power supply device, comprising: an output circuit that shapes the output of the bridge-type inverter circuit and outputs a sinusoidal AC power.
It is possible to detect whether or not an overload condition exists by superimposing a pair of current detectors, one end of each of which is connected to a common line, and a pair of load current signals detected by the pair of current detectors. A portable AC power supply device comprising: an overload detection circuit; and a frequency lowering means for automatically lowering the frequency of the reference signal when an overload condition is detected.