JP3173677B2 - Inverter controlled generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter control type generator used for a portable AC power supply or the like.

[0002]

2. Description of the Related Art In recent years, an inverter device has been increasingly used in an AC power supply device to stabilize an output frequency. For example, AC power of a commercial frequency is supplied by an AC generator driven by an engine. In a portable power supply device that outputs power, an engine is operated in a high-speed region to obtain a high-output AC current from a generator, and this AC current is temporarily replaced with DC. A device which converts the data into an output is known from Japanese Utility Model Laid-Open No. 59-132398.

In general, a drive power supply for driving an inverter device relies on a generator output, and the generator output is not sufficient in a low-speed rotation range of the generator in an early stage of engine start. The power supply voltage of the drive power supply for the device is likely to be unstable.

[0004] On the other hand, for example, the applicant of the present invention has disclosed in Japanese Patent Application No. 2-319800 that, after a generator output serving as a power supply source of a control circuit of an inverter device becomes a predetermined value,
It has been proposed to configure the inverter device to start supplying a drive signal from the inverter control circuit.

[0005]

However, in the above-mentioned conventional inverter device, when this kind of control circuit is constructed, for example, an IC element driven by two power supplies such as a positive and negative power supply like an operational amplifier is used. And a CMOS IC element driven by a normal single power supply are often mixed. The two power supplies are often constituted by a power supply IC such as a three-terminal regulator, and the two power supplies thus configured are applied to the power supply IC as shown in FIGS. 5 (a) and 5 (b). Although the input voltage increases in proportion to the rotation speed (FIG. 5A), the output voltage is
The rising is delayed as compared with the input voltage, and the rising point is shifted between the positive side and the negative side (FIG. 5).
(B)). These occur due to differences in element characteristics and the like, and the operational amplifier has a section where the rising point is shifted depending on the configuration of the input signal circuit (see FIG. 5).
An error signal may be output in the section (b) where the generator speed is 0 to 1800 rpm).

Further, when this erroneous signal is output,
Although the output voltage of the power supply IC circuit is not sufficient, CMOS
Since the IC element can operate even at a low power supply voltage, the IC element operates according to the error signal output of the operational amplifier, and for example, has a problem in that an abnormal drive signal is supplied to the inverter circuit.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and it is an object of the present invention to prevent a malfunction due to a difference in a rising characteristic of an output voltage caused by a difference in characteristics of two positive and negative power supply circuits immediately after starting an engine. It is an object of the present invention to provide an inverter-controlled generator capable of performing the following.

[0008]

In order to achieve the above object, the present invention rectifies an AC output from an output winding of an AC generator, and switches the AC output through an inverter circuit that performs a switching operation according to a drive signal. In the inverter control type generator for converting into an AC output having an arbitrary frequency, two positive and negative power sources are extracted from the output of the auxiliary output winding of the AC generator, and the power is supplied to an inverter control circuit for controlling the inverter circuit. A power supply circuit for supplying, a power supply input voltage detection circuit for determining whether or not an output voltage of the sub output winding has exceeded a predetermined voltage value, and a power supply circuit for determining whether or not the rotation speed of the AC generator has exceeded a predetermined rotation value. A rotation speed detection circuit for determining, and the power supply input voltage detection circuit determine that the output voltage of the auxiliary output winding has exceeded a predetermined voltage value, and the rotation speed detection circuit Control means for controlling so that supply of a drive signal from the inverter control circuit to the inverter circuit is started when it is determined that the rotation speed of the flow generator has exceeded a predetermined rotation value. I do.

Preferably, the power supply circuit constitutes a power supply circuit of two positive and negative power supplies by two three-terminal regulators, and the rotation speed detecting circuit is configured to generate the AC power by the output frequency of the sub output winding. It is characterized by detecting the rotation speed of the machine.

The rotation number detecting circuit compares a count number counted by a clock pulse generated irrespective of the pulse with a predetermined count value between pulses of a pulse train signal generated according to the output frequency. By doing so, it is determined whether or not the rotation speed has exceeded a predetermined rotation value, and the predetermined count value has a first threshold value for determining that the rotation speed has exceeded a predetermined rotation speed, and the rotation speed has been determined. A second threshold value for determining that the rotation speed has fallen below a predetermined number of revolutions, wherein the first threshold value is set to a value smaller than the second threshold value.

[0011]

According to the present invention, it is determined by the power supply input voltage detection circuit that the output voltage of the auxiliary output winding has exceeded a predetermined voltage value, and the rotation speed detection circuit has determined that the rotation speed of the AC generator has exceeded the predetermined rotation value. Then, the supply of the drive signal from the inverter control circuit to the inverter circuit is started by the control means.

Further, in the case where the first and second thresholds are provided for the count value for determining the number of rotations in the rotation speed detection circuit, after the count value becomes smaller than the first threshold value,
That is, after the rotation speed exceeds the rotation value indicated by the first threshold value and the rotation speed decreases and the count value becomes larger than the first threshold value, as long as the count value does not become larger than the second threshold value, Unless the number does not fall below the rotation value indicated by the second threshold value, it is determined that the rotation speed has exceeded the predetermined rotation value.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is an overall configuration diagram of an inverter-controlled generator according to the present invention. In the figure, reference numerals 1 and 2 denote output windings wound independently on a stator of an AC generator, respectively. 1
Denotes a three-phase output winding, and 2 denotes a single-phase auxiliary winding. The rotor (not shown) has, for example, nine pairs of magnetic poles of permanent magnets, and is configured to be rotationally driven by an engine (not shown). The output terminal of the three-phase output winding 1 is connected to a bridge rectifier circuit 3 including three thyristors and three diodes.
Are connected to a smoothing circuit 4.

The output terminal of the single-phase auxiliary winding 2 is connected to a constant voltage supply device 5 having positive and negative bipolar output terminals E and F. The constant voltage supply device 5 includes two sets of rectifier circuits, a smoothing circuit, and a constant voltage circuit 5a. One circuit of each set works for a current flowing from the single-phase auxiliary winding 2 in one direction, and the opposite set. With respect to the current in the direction, each circuit of the other set operates, whereby positive and negative constant voltages are output to the output terminals E and F, respectively.

A thyristor control circuit 6 has one end on the power input side connected to the positive output terminal E of the constant voltage supply device 5 and the other end grounded together with the positive terminal on the smoothing circuit 4. The signal input terminal of the thyristor control circuit 6 is a capacitor C
1, a series circuit of resistors R1 to R3, one end of the capacitor C1 side is connected to the positive output terminal E of the constant voltage supply device 5, and the other end of the resistor R3 side is connected to the negative terminal of the smoothing circuit 4. You. The connection point between the resistors R1 and R2 is at the base of the transistor Q1, the collector of the transistor Q1 is at the base of the transistor Q2, and the transistor Q2
Is connected to the gate input circuit of each thyristor of the bridge rectifier circuit 3 and is configured to control the input signal of the gate input circuit in accordance with the potential at the connection point between the resistors R1 and R2 (thyristor control). For a detailed description of the circuit 6, refer to Japanese Patent Application No. 1-230908 filed by the present applicant.
The description is omitted here.

The output side of the transient suppression circuit 7 is connected to a connection point K between the capacitor C1 and the resistor R1. According to the transient suppression circuit 7, the cathode side of the Zener diode D1 is connected to the input side (G) of the constant voltage circuit 5a provided on the positive electrode output terminal E side of the constant voltage supply device 5, and the anode side of the Zener diode D1 is connected to a resistor. Connected to the negative output terminal F of the constant voltage supply device 5 via R4 and R5. Resistance R4, R
The connection point 5 is connected to the inverting terminal (-) of the inverting comparator 701 composed of an operational amplifier, and the non-inverting terminal (+) of the inverting comparator 701 is grounded via a resistor. Inverting comparator 701
Output side is an inverter 7 having a level converter function.
02, is connected to the input side of an AND circuit 703, while another terminal on the input side of the AND circuit 703 is connected to a generator speed detection circuit 8 according to the present invention, which will be described later.
A high-level signal is supplied to the AND circuit 703 when the number of revolutions of the generator becomes equal to or greater than a predetermined number of revolutions. Hereinafter, the circuit from the Zener diode D1 to inverter 702 that controls the power supply voltage detection circuit _71. AND circuit 70
3 is connected to the base of a transistor Q3 via an inverter 704 and a resistor R6. Here, the inverting comparator 701 has a positive / negative power supply (E, F) connected to the inverter 70.
2, 703 and the AND circuit 703 are supplied with only the negative power (F). The emitter of the transistor Q3 is connected to the negative output terminal F of the constant voltage supply device 5, while the collector is
It is connected to the positive output terminal E of the constant voltage supply device 5 via the resistor R7 and to the negative output terminal F of the constant voltage supply device 5 via the capacitor C2. Capacitor C2
The base of the transistor Q4 is connected to the positive terminal of
The collector of the transistor Q4 is connected to the positive output terminal E of the constant voltage supply device 5, while the emitter is connected to the diode D
2 and to a connection point K between the capacitor C1 and the resistor R1 of the thyristor control circuit 6. The cathode of the diode D2 is connected to the positive terminal of the capacitor C2.

The output side of the smoothing circuit 4 is connected to an inverter circuit 9. The inverter circuit 9 is constituted by a bridge circuit including four FETs (field effect transistors) Q5 to Q8. A drive signal circuit connected to each gate terminal of the FETs Q5 to Q8 will be described later.

The output side of the inverter circuit 9 is connected to output terminals 11 and 12 to which a load (not shown) is connected via an output circuit 10 comprising a low-pass filter.

Both ends of the output terminals 11 and 12 (both ends H of the capacitor constituting the low-pass filter) are connected to a distortion detecting circuit 13 composed of a dividing resistor and a differential amplifier as shown in FIG. The distortion detection circuit 13 includes output terminals 11 and 12
The output waveform distortion or offset component is detected by directly comparing the output voltage waveforms
It outputs a detection signal.

A sine wave oscillator 14 generates a sine wave of a commercial frequency, for example, 50 Hz or 60 Hz. The output side of the sine wave oscillator 14 and the output side of the distortion detection circuit 13 are connected to a differential amplifier 15. The differential amplifier 15
The amplitude reference level of the sine wave output from the sine wave oscillator 14 is corrected by the detection signal output from the distortion detection circuit 13, and a corrected sine wave signal is output.

Reference numeral 16 denotes a rectangular wave oscillator. The frequency of the rectangular wave oscillated by the rectangular wave oscillator 16 is a sine wave oscillator 1
4 is set to a value that is much higher than the frequency of the sine wave output. The output side of the square wave oscillator 16 is an integrating circuit 1
7, and an integrating circuit 17 integrates the rectangular wave and converts it into a triangular wave signal.

The corrected sine wave signal output from the differential amplifier 15 and the triangular wave signal output from the integration circuit 17 are superimposed and supplied to an inverter buffer 18. The inverter buffer 18 is an amplifier having a predetermined threshold (threshold level), and outputs a low-level signal when a signal having a level exceeding the threshold is input,
On the other hand, when a signal having a level lower than the threshold value is input, a high-level signal is output and a so-called pulse width modulation (PWM) signal is formed. For example, the signal has a fixed threshold value for an input signal to a gate terminal. It is composed of a C-MOS gate IC.

The output side of the inverter buffer 18 is input to one input terminal of the NAND circuit 20 via the inverter 19 and is also input directly to one input terminal of the NAND circuit 21 as it is. A transient suppression circuit 7 is connected to the other input terminal of the NAND circuit 20 and the other input terminal of the NAND circuit 21.
The output terminal J of the AND circuit 703 is connected.

Each output side of the NAND circuits 20 and 21 is FE
They are connected to T gate drive signal circuits 22 and 23, respectively.
The FET gate drive signal circuit 22 is composed of a push-pull amplifier, a surge absorbing diode, a low frequency component cutting capacitor C3, and primary coils of pulse transformers A and C. Similarly, the FET gate drive signal circuit 23 is a push-pull circuit. Pull amplifier, surge absorbing diode, capacitor C4 for cutting low frequency components, pulse transformers B and D
Of the primary side coil. The secondary coil of the pulse transformer A (shown in the inverter circuit 9) is a damping resistor,
Demodulating capacitor C5, bidirectional voltage regulating diode D
3, connected to the gate of FET Q5 via D4. The secondary coils of the pulse transformers B, C, and D are also connected to the FETs via the same circuit as the secondary circuit of the pulse transformer A.
It is connected to each of the gates of Q6, Q7 and Q8.

Next, a detailed circuit configuration of the generator speed detecting circuit 8 according to the present invention will be described with reference to FIG.

The output side (L) of the single-phase auxiliary winding 2 in FIG.
The resistor R8 is connected to the anode side of the diode D5, the cathode side of the Zener diode D6 and one end of the capacitor C6, and is connected to the input side of the inverter 801. The cathode side of the diode D5 is grounded,
The anode side of the Zener diode D6 and the capacitor C
The other end of 6 is connected to the negative output terminal F of the constant voltage supply device 5. The circuit including the diodes D5 and D6 and the capacitor C6 is a circuit that converts a sine wave input from the output side (L) of the single-phase auxiliary winding 2 into a rectangular wave.

The output side of the inverter 801 is connected to the D input terminal of the D flip-flop 802, and its Q output terminal is connected via the inverter 803 to the D flip-flop 80.
4 D input terminal. Further, the clock input terminals of the D flip-flops 802 and 804 have a frequency of 20 kHz.
, And the R terminal and the S terminal are grounded. The Q output terminal of the D flip-flop 804
The AND circuit 80 is connected to one input terminal of the D circuit 805.
5 is connected to the Q terminal of the D flip-flop 802.
Output terminal is connected. As shown in FIG. 4, a circuit including D flip-flops 802, 804, an inverter 803, and an AND circuit 805 converts an output pulse of the inverter 801 into a pulse having a pulse width of 50 μs and the same frequency as the output pulse. Convert.

The output of the AND circuit 805 is branched into two, one is connected to the reset input terminal of the counter 806, and the other is connected to the clock input terminal of a D flip-flop 812 described later. The clock input terminal of the counter 806 is connected to the output side of the inverter 807, and the Q1, Q2, and Q3 output terminals are directly connected to the AND circuit 808.
The Q4 and Q5 output terminals are connected to two input terminals of an AND circuit 809, and the Q6 output terminal is connected to an OR circuit.
Connected to one input terminal of circuit 810. Counter 806
Counts the clock input to the clock input terminal and sequentially outputs the count value to the Q1 to Q7 terminals. When a reset signal is input to the reset input terminal, the count value is cleared. That is, the counter 806 counts the period of the output pulse of the AND circuit 805 by using a clock of an 11 KHz rectangular wave described later.

Further, the output side of the AND circuit 809 is
The R circuit 811 is connected to one input terminal, and the other input terminal is connected to the Q output terminal of the D flip-flop 812. The Q bar output terminal of the D flip-flop 812 is connected to another input terminal of the OR circuit 810. OR
The outputs of the circuits 810 and 811 are connected to the remaining input terminals of the AND circuit 808, and the output of the AND circuit 808 is
Connected to the D input terminal of flip-flop 813. That is, when the output pulse of the AND circuit 805 is counted by the counter 806, the AND circuit 808 switches between high-level output and low-level output according to the count value, that is, the number of revolutions of the generator. OR circuits 810, 811
Is used to provide hysteresis to the switching speed (count value). This hysteresis is used to confirm that the power supply has started up normally, and once the inverter circuit has started normal operation, the rotation of the generator has started. Due to pulsation or a drop in the number of revolutions due to a temporary overload condition,
This is for preventing the inverter circuit from being stopped unnecessarily.

An 11 KHz rectangular wave is input to the clock input terminal of the D flip-flop 813 via the inverter 814, and its Q bar output terminal is connected to the D input terminal of the D flip-flop 812 and the AND circuit 815. Connected to one input terminal. The other input terminal of the AND circuit 815 receives the 11 KHz rectangular wave,
The output side of the AND circuit 815 is connected to the input side of the inverter 807. The AND circuit 815 includes a counter 80
If the count value of the counter 6 exceeds the set value, it is determined that the rotation is sufficiently low, and a further 11 KHz rectangular wave is output to the counter 80.
6 is stopped from being supplied to the clock input terminal 6 to prevent the counter 806 from overflowing. That is, when the generator rotates at a low speed, the time interval of the pulse input to the reset input terminal of the counter 806 becomes long.
In the case of 06, an overflow occurs before the next pulse is input to the reset input terminal.
The supply of the KHz rectangular wave is stopped.

Further, the Q output terminal of D flip-flop 812 is connected to another input terminal of OR circuit 811 and to another input terminal of AND circuit 703 in FIG.

In the generator speed detecting circuit 8, the power of the inverter, the AND circuit, the OR circuit, the D flip-flop and the counter is supplied from the F terminal.

According to the generator speed detecting circuit 8 configured as described above, the high level is set when the generator speed (engine speed) is higher than a predetermined value, and the low level is set otherwise. Is output and supplied to the AND circuit 703. The details of the operation of the generator rotation speed detection circuit 8 will be described later.

Next, the operation of the inverter controlled generator configured as described above will be described.

The three-phase AC power output from the three-phase output winding 1 with the driving of the engine is rectified by the bridge rectifier circuit 3, smoothed by the subsequent smoothing circuit 4 and converted into DC power, and The fluctuation of the DC voltage at the resistor R2
The output voltage of the smoothing circuit 4 is stably maintained at a predetermined DC voltage by controlling the ON / OFF of each thyristor of the bridge rectifier circuit 3 based on the detection signal detected by the thyristor control circuit 6 via R3. Such feedback control is performed. The output signal from the transient suppression circuit 7 is also input to the thyristor control circuit 6, and the operation of the thyristor control circuit 6 and the bridge rectification circuit 3 based on this signal will be described later.

The gates of the FETs Q5 and Q7 and the FETs Q6 and Q8 of the inverter circuit 9 are supplied with a pulse width modulation signal (PWM) described later.
By switching TQ5 and Q7 and FETs Q6 and Q8 alternately, the DC output of the smoothing circuit 4 is switching-controlled and output to the output circuit 10. The output circuit 10 cuts high-frequency components and outputs AC power of a commercial frequency to output terminals 11,
12 to the load.

The waveform of the output voltage appearing at the output terminal 11 and the waveform of the output voltage appearing at the output terminal 12 are
3, the difference, that is, the distortion or offset component of the output voltage waveform is detected, and the detection signal is output to the differential amplifier 15.

The differential amplifier 15 compares the sine wave signal of the commercial frequency output from the sine wave oscillator 14 with the feedback signal containing the distortion of the output voltage output from the detection circuit 13 or the DC offset. Then, the amplitude reference level of the sine wave signal is corrected by the feedback signal, and the corrected sine wave signal is output.

The rectangular wave signal output from the rectangular wave oscillator 16 is integrated by the integrating circuit 17 and converted into a triangular wave signal. The triangular wave signal and the corrected sine wave signal from the differential amplifier 15 are superimposed to form a superimposed signal, which is input to the inverter buffer 18. The inverter buffer 18 outputs a low-level signal when the superimposed signal exceeds the threshold value, and outputs a high-level signal when the superimposed signal is less than the threshold value. As a result, a triangular wave signal is used as a carrier, and pulse width modulation is performed using a corrected sine wave. The output PWM signal is output. Since the PWM signal is formed based on the corrected sine wave signal, the distortion and the offset component of the output voltage can be reduced, and the inverter has a much faster response time than the comparator (about 1 μsec). Since the buffer (about 50 nsec) is used for forming the PWM signal, it is possible to increase the frequency of the carrier wave, thereby providing a higher quality AC voltage with a more approximate sine wave output waveform. Make it possible.

P output from the inverter buffer 18
One of the WM signals is inverted by an inverter 19 to form a NAND signal.
The other is input to the NAND circuit 21 as it is. When the output of the single-phase auxiliary winding 2 from the transient suppression circuit 7 is lower than the set voltage value or when the rotation speed of the generator is lower than a predetermined rotation value, the NAND circuits 20 and 21 output a low-level signal. And at this time, the NAND circuit 2
The outputs 0 and 21 become high-level signals regardless of the PWM signal, and the PWM signal is not transmitted because this state is maintained. On the other hand, when the output of the single-phase auxiliary winding 2 becomes higher than the set voltage value and the rotation speed of the generator becomes higher than a predetermined rotation value, a high-level signal is supplied from the transient suppression circuit 7. The NAND circuits 20 and 21 output a signal obtained by inverting the inverted or non-inverted PWM signal according to the input inverted or non-inverted PWM signal, respectively.
The PWM signal is supplied to the FET gate drive signal circuit 22, or the inverted PWM signal is supplied to the FET gate drive signal circuit 23.
An M signal is provided.

In the FET gate drive signal circuit 22, P
After the push-pull amplification of the WM signal, the capacitor C
At 3, the low frequency component, that is, the commercial frequency component is cut.
The signal immediately before passing through the capacitor C3 is a PWM signal having a constant amplitude with respect to the reference level. The average voltage (integral value) of this signal changes at the same cycle as the sine wave from the sine wave oscillator 14. Therefore, the PWM signal contains the same frequency (commercial frequency) component as the sine wave. After the PWM signal passes through the capacitor C3, the whole pulse train goes up and down in a phase opposite to the commercial frequency component, and is converted into a pulse signal example in which the average voltage is always zero.

Since the pulse signal train whose average voltage is always zero is supplied to the primary coils of the pulse transformers A and C, the transformer cores constituting the pulse transformers A and C have magnetic saturation due to the commercial frequency component. There is almost no adverse effect, so that the transformers A and C can be configured with a small size that does not cause magnetic saturation at the PWM carrier frequency.

The operation of the circuit 23 for the FET gate drive signal is exactly the same as the operation of the circuit 22 for the FET gate drive signal.

The pulse signal output from the secondary coil of the pulse transformer A is compared with the breakdown voltages of the Zener diodes D3 and D4, and the capacitor exceeding the breakdown voltage is charged and discharged by the capacitor C5. An average voltage (which has a commercial frequency) due to exceeding each breakdown voltage appears. Therefore, a signal in which the voltage between both ends of the capacitor C5 having the commercial frequency and the pulse signal output from the secondary coil of the pulse transformer A are superimposed between the gate and the source of the FET Q5, that is, the PWM signal before passing through the capacitor C3 is Demodulated. The FET Q5 conducts only while the positive pulse of the PWM signal is being input to the gate.

The pulse signal output from the secondary coil of the pulse transformer C is processed in exactly the same manner as the pulse signal output from the secondary coil of the pulse transformer A.
7 is conducted at the same timing as the conduction of the FET Q5.

The pulse signals output from the secondary coils of the pulse transformers B and D are processed in exactly the same manner as the pulse signals output from the secondary coils of the pulse transformers A and C. However, since the PWM signals input to the pulse transformers B and D and the PWM signals input to the pulse transformers A and C have opposite phases, when the FETs Q5 and Q7 become conductive, the FE
TQ6 and Q8 become non-conductive, and conversely, FETs Q5 and Q7
Are turned off, the FETs Q6 and Q8 operate to conduct.

As described above, the sine wave of the commercial frequency, which has been feedback-corrected based on the output waveform, is pulse-width-modulated with the high-frequency triangular wave, and the switching control is performed by the inverter circuit 9 based on the pulse-width modulated signal. The carrier frequency component is cut off by the circuit 10, and AC power of a commercial frequency approximate to a sine wave is supplied from the output terminals 11 and 12 to the load.

The above inverter circuit 9 and detection circuit 13
A more detailed description of the configuration and operation of the FET gate drive signal circuit 23 has already been described in the inverter apparatus disclosed in Japanese Patent Application Laid-Open No. Hei 4-207973 by the present applicant.

Next, the operation of the transient suppression circuit 7 will be described.

Since the output voltage of the AC generator is low immediately after the start of the engine, the constant voltage circuit 5
The voltage at the input of a is low and therefore does not exceed the breakdown voltage of the Zener diode D1 at start-up, and the Zener diode D1 is non-conductive. Therefore, the inverting comparator 7
01 is at a low level, and the inverting comparator 7
01 goes high, and the output of inverter 702 goes low.

The AND circuit 703 outputs a low-level signal when a low-level signal is input to at least one of the input sides. Therefore, the output of the AND circuit 703 is the low-level output of the inverter 702 or the number of revolutions of the generator. It becomes low level with the low level output of the generator rotation speed detection circuit 8 indicating that it is below the numerical value.

This low level signal is inverted by the inverter 704 to become a high level signal, and the transistor Q3 is turned on to discharge the capacitor C2. Therefore, the transistor Q4 is turned off, and the potential at the connection point K between the capacitor C1 and the resistor R1 becomes low.

Therefore, the transistor Q1 of the thyristor control circuit 6 is turned off, the transistor Q2 is turned on, and a low level signal is supplied to the gate of each thyristor of the bridge rectifier circuit 3. Thus, each thyristor does not conduct, and the bridge rectifier circuit 3 does not supply a rectified output. That is, when the output of the single-phase auxiliary winding 2 becomes lower than the set voltage value, or the rotation speed of the generator becomes lower than the predetermined rotation value, the bridge rectifier circuit 3 does not supply the rectified output, Thereby, the unstable operation of the inverter circuit at the time of starting the engine is suppressed.

Next, after the engine is started, the output voltage of the AC generator gradually increases, the voltage at the input terminal of the constant voltage circuit 5a increases, and when the voltage exceeds the breakdown voltage of the Zener diode D1, the Zener diode D1 becomes conductive. And the inverting comparator 70
1 inverting terminal (-) turns to high level, and inverting comparator 70
1 goes low and the output of inverter 702 goes high.

At this time, if the number of revolutions of the generator is equal to or greater than the set number of revolutions, the output of the AND circuit 703 turns to a high level, and the output of the inverter 704 goes to a low level. Therefore, the transistor Q3 is turned off, and the capacitor C2 is charged via the resistor R7. By this charging, the positive electrode side potential of the capacitor C2 becomes the capacitance of the capacitor C2 and the resistance R
7 gradually rises based on a time constant determined by the resistance value of 7. When the potential on the positive electrode side of the capacitor C2 rises, the transistor Q
However, if the emitter potential of the transistor Q4 rises due to the conduction of the transistor Q4 and becomes higher than the base potential of the transistor Q4, the transistor Q4 turns non-conductive. It is always maintained at a value slightly lower than the positive electrode side potential of C2. Therefore, the potential at the point K becomes a time constant determined by the capacity of the capacitor C2 and the resistance value of the resistor R7 after the output of the single-phase auxiliary winding 2 exceeds the set voltage value and the engine speed exceeds the set speed value. It will gradually rise based on this.

Therefore, the base-emitter voltage of the transistor Q1 gradually rises, the transistor Q1 gradually conducts, the transistor Q2 gradually becomes non-conductive, and the gate voltage input to each thyristor of the bridge rectifier circuit 3 gradually increases. To gradually increase the conduction angle.
Finally, the potential at the point K substantially reaches the positive output potential of the constant voltage supply device 5, and the gate voltage of each thyristor is controlled by a predetermined feedback control for maintaining the potential at the connection point between the resistors R1 and R2 at a predetermined value. Leads to the input value.

Thus, it is possible to prevent a sudden current from flowing into each thyristor of the bridge rectifier circuit 3 even when the load is still connected to the output terminals 11 and 12 when the engine is started. is there. At the same time, by controlling the gate voltage input to each thyristor of the bridge rectifier circuit 3 to gradually increase, the DC output of the smoothing circuit 4 gradually increases after the start of the engine, whereby each of the inverter circuits 9 A sudden voltage change is prevented from being applied to the FET. The effect of such prevention is greater as the load connected to the output terminals 11 and 12 is larger when the engine is started. Particularly, when the load is in a short-circuit state, the effect of suppressing the adverse effect on the thyristor and the FET is extremely large.

Next, the operation of the generator speed detecting circuit 8 according to the present invention will be described in detail.

The output of the single-phase auxiliary winding 2 is a diode D
5, a circuit composed of a zener diode D6 and a capacitor C6 and a resistor R8 are converted into a rectangular wave, inverted by an inverter 801 and D flip-flop 802.
Is input to the D input terminal. D flip-flop 802
In the above, the inverted rectangular wave is sampled by a clock signal composed of a 20 KHz rectangular wave and output from a Q output terminal. This output is branched into two, one of which is inverted by an inverter 803, sampled by a clock signal in a D flip-flop 804, and output from a Q output terminal to an AND circuit 805, similarly to the D flip-flop 802. The other is A
Input to the ND circuit 805 and the D flip-flop 804
Is calculated with the Q output of. The AND circuit 805 outputs a pulse having the same period as the output of the inverter 801 and a pulse width of 50 μs, which is the same as the clock input of the D flip-flops 802 and 804.

An output pulse of the AND circuit 805 (hereinafter, referred to as an output pulse)
The “sub-coil pulse”) resets the counter 806 at the rising point and clears the count value. The counter 806 counts the clock signal (11 KHz rectangular wave) supplied via the AND circuit 815 at its rising point, and counts the counted value as Q1 to Q1.
Output to Q7.

Thus, when the rising point of the sub-coil pulse is input and the clock signal is supplied from the AND circuit 815, the counter 806 starts counting the cycle of the sub-coil pulse from this point.

Hereinafter, when the engine speed is low immediately after starting the engine, the engine speed becomes a predetermined value, for example, 2400 rpm.
pm or more, and when the engine speed drops once after the engine speed exceeds 2400 rpm.
The sub-coil pulse counting operation will be described for each of the following cases.

First, the operation of counting the sub-coil pulse at a low rotational speed immediately after starting the engine will be described.

The counter 806 starts counting in response to the clock signal, and outputs the count value to Q1 to Q7. At this time, the Q output and the Q bar output of the D flip-flop 812 are at the low level and the high level, respectively, and all the Q1 to Q5 of the counter 806 are at the high level, that is, the count value is 31 (first threshold: 2400r
pm), the AND circuit 808 outputs a high level for the first time, and outputs a low level until then. A
While the ND circuit 808 outputs a low level, the D flip-flop 813 outputs a high level from the Q bar output terminal, so that a clock signal is supplied from the AND circuit 815 to the counter 806. On the other hand, when the AND circuit 808 outputs a high level, the D flip-flop 813 outputs a low level from the Q bar output terminal, and the AND circuit 815
Stops the supply of the clock signal. This prevents the counter 806 from overflowing when the cycle of the sub-coil pulse is long as described above.

When the engine speed is low, for example, when the engine speed is 2400 rpm (count value 31) or less, and the count value of the counter 806 becomes 31, the AND circuit 808 outputs a high level and the clock is supplied. The operation is stopped, and the AND circuit 808 keeps the high level. Thereafter, when the rising point of the next sub-coil pulse is output from the AND circuit 805, the D flip-flop 812 holds the low level output of the D flip-flop 813, and outputs the low level and the low level to the Q and Q bar output terminals, respectively. Output high level. Therefore, the AND circuit 703
Out of the two inputs, the Q output of the D flip-flop 812 is low, so that
The output of the D circuit 703 becomes low level, and the PWM modulation is not executed as described above.

Next, the engine speed is increased to 2400
The counting operation when the rotation speed reaches rpm or more will be described.

When the engine speed becomes 2400 rpm or more, the period of the sub-coil pulse is shortened.
Output the rising point of the next subcoil pulse. At this time, since the output of the AND circuit 808 is at the low level, the Q bar output of the D flip-flop 813 is at the high level, and the D flip-flop 812 holds this high level output by the next pulse of the AND circuit 805. , Q, and Q bar output terminals output a high level and a low level, respectively. As a result, the Q output of the D flip-flop 812, which is one input of the AND circuit 703, becomes high level, and the control power supply voltage detection circuit 7 _1, which is the other input.
Is high level, that is, when the output value of the single-phase auxiliary winding 2 exceeds the set voltage, PWM modulation is executed.

Next, once the engine speed is 2400 rpm
The counting operation when the number of rotations decreases after the rotation speed exceeds m will be described.

As described above, once the engine speed is 2
When the speed exceeds 400 rpm, the Q bar output of the D flip-flop 812 becomes low level, so that the output of the OR circuit 810 depends on the output of the Q6 output terminal of the counter 806.
Thus, the outputs of the Q1-Q3 and Q6 output terminals of the counter 806 are all high (count value is 39; second threshold), that is, the output of the AND circuit 808 is low until the engine speed reaches 1900 rpm. To maintain. Due to this, hysteresis is provided for the engine speed,
As described above, it is possible to prevent the inverter circuit from being stopped unnecessarily after the operation of the inverter circuit is started after confirming that the power supply has been normally started.

Thereafter, the rotation speed is reduced to 1900 rpm
When the counter 806 counts 39,
The AND circuit 808 outputs a high level, stops the clock signal supplied from the AND circuit 815 as described above, and outputs a low level from the D flip-flop 812 to the AND circuit 703 to stop the PWM modulation.

As described above, when the generator speed detecting circuit 8 determines whether or not the engine speed is equal to or higher than the predetermined speed, the generator speed is provided with a hysteresis. 808 can output a stable output signal irrespective of a change in the number of revolutions caused by a change in the generator load.

As described above, according to the present embodiment,
Since the output of the generator rotation speed detection circuit 8 and the output of the control power supply voltage detecting circuit ₇₁ is to perform both of PWM modulation in the high-level unstable inverter generated during low engine speed immediately after engine start up Operation can be prevented.

[0074]

As described above, according to the first aspect of the present invention, the AC output from the output winding of the AC generator is rectified, and the AC output is switched according to the drive signal. In an inverter-controlled generator that converts to an AC output with an arbitrary frequency through a circuit,
A power supply circuit that extracts two positive and negative power supplies from the output of the sub output winding of the AC generator and supplies the power to an inverter control circuit that controls the inverter circuit, and an output voltage of the sub output winding has a predetermined voltage value. A power supply input voltage detection circuit for determining whether or not the rotation speed of the AC generator has exceeded a predetermined rotation value; and a rotation speed detection circuit for determining whether or not the rotation speed of the AC generator has exceeded a predetermined rotation value. When it is determined that the output voltage of the line has exceeded a predetermined voltage value, and when the rotation speed detection circuit determines that the rotation speed of the AC generator has exceeded a predetermined rotation value, the inverter control circuit determines And control means for controlling the supply of the drive signal to the inverter circuit to be started, so that the output voltage of the sub output winding supplied to the positive and negative dual power sources is directly detected to prevent the fluctuation of the temperature characteristic and the like. It is possible to reliably determine that the output has become equal to or higher than the predetermined output value, and the rotation speed is equal to or higher than the predetermined value with respect to the startup variation of the positive and negative dual power supplies that cannot be detected only by monitoring the output voltage value of the sub output winding. In addition, it compensates by adding the judgment that the inverter has become unstable, so that the unstable operation of the inverter due to the variation in the rising of the positive and negative power sources that occurs at the time of low engine rotation, such as immediately after the start of the engine, is more reliably suppressed. (The method of detecting only the number of revolutions cannot be adopted because the relationship between the number of revolutions and the output voltage changes depending on temperature characteristics and aging.)

According to the second aspect of the present invention, since the power supply circuit constitutes a power supply circuit of two positive and negative power supplies by using two three-terminal regulators, there is an effect that the rotational configuration is extremely simplified.

According to the third aspect of the present invention, the rotation speed detection circuit detects the rotation speed of the AC generator based on the output frequency of the auxiliary output winding. There is no need to newly provide a detection device for detection, and an effect that it is possible to suppress an increase in cost due to this is provided.

Further, according to the invention described in claim 4, the rotation speed detecting circuit determines the interval between the pulses of the pulse train signal generated according to the output frequency by the clock pulse generated regardless of the pulse. By comparing the counted number with a predetermined count value, it is determined whether or not the rotation speed has exceeded a predetermined rotation value, and the predetermined count value determines that the rotation speed has exceeded a predetermined rotation speed. And a second threshold value for determining that the rotation speed has fallen below a predetermined rotation speed, and the first threshold value is set to a value smaller than the second threshold value. Once the normal operation is started, the operation can be stably continued without interruption even if the rotational speed slightly changes due to a load change or the like.

[Brief description of the drawings]

FIG. 1 is an overall configuration diagram of an inverter-controlled generator according to the present invention.

FIG. 2 is an overall configuration diagram of an inverter-controlled generator according to the present invention.

FIG. 3 is a detailed circuit diagram of a generator speed detection circuit 8 shown in FIG.

FIG. 4 is a diagram showing outputs of an inverter 801 and an AND circuit 805.

FIG. 5 is a diagram showing a rotation speed of a generator and output voltage characteristics of a positive / negative power supply IC.

[Explanation of symbols]

Reference Signs List 1 output winding 2 auxiliary output winding 5 power supply circuit 5a 3-terminal regulator 6 thyristor control circuit (inverter control circuit) 7 ₁ control power supply voltage detection circuit (power supply input voltage detection circuit) 8 generator rotation speed detection circuit (rotation speed detection) Circuit) 806 counter 9 inverter circuit

Continued on the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H02M 7/48 H02P 9/08 H02P 9/30

Claims (4)

(57) [Claims] An inverter control for rectifying an AC output from an output winding of an AC generator and converting the AC output into an AC output having an arbitrary frequency via an inverter circuit that performs a switching operation according to a drive signal. In the power generator, a power supply circuit that extracts two positive and negative power supplies from an output of a sub output winding of the AC generator and supplies the power to an inverter control circuit that controls the inverter circuit, and an output voltage of the sub output winding A power input voltage detection circuit for determining whether or not exceeds a predetermined voltage value; a rotation speed detection circuit for determining whether the rotation speed of the AC generator exceeds a predetermined rotation value; and the power input voltage detection circuit. It is determined that the output voltage of the auxiliary output winding has exceeded a predetermined voltage value, and that the rotation speed of the AC generator has exceeded the predetermined rotation value by the rotation speed detection circuit. Inverter control generator, characterized in that a control means for the control so that the supply of the drive signals from the inverter control circuit to the inverter circuit is started when it is different. 2. The inverter controlled generator according to claim 1, wherein said power supply circuit comprises a power supply circuit of two positive and negative power supplies by two three-terminal regulators. 3. The inverter-controlled generator according to claim 1, wherein the rotation speed detection circuit detects the rotation speed of the AC generator based on an output frequency of the auxiliary output winding. 4. The rotation number detection circuit compares a count number counted by a clock pulse generated irrespective of the pulse between a pulse of a pulse train signal generated according to the output frequency and a predetermined count value. By doing so, it is determined whether or not the rotation speed has exceeded a predetermined rotation value, and the predetermined count value has a first threshold value for determining that the rotation speed has exceeded a predetermined rotation speed, and the rotation speed has been determined. 4. The method according to claim 1, further comprising a second threshold value for determining that the rotation speed has fallen below a predetermined value, wherein the first threshold value is set to a value smaller than the second threshold value. An inverter controlled generator as described.