JPH0587153B2 - - Google Patents
Info
- Publication number
- JPH0587153B2 JPH0587153B2 JP61302866A JP30286686A JPH0587153B2 JP H0587153 B2 JPH0587153 B2 JP H0587153B2 JP 61302866 A JP61302866 A JP 61302866A JP 30286686 A JP30286686 A JP 30286686A JP H0587153 B2 JPH0587153 B2 JP H0587153B2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- level shift
- heterojunction
- forming layer
- diode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 claims description 20
- 150000001875 compounds Chemical class 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 13
- 238000010586 diagram Methods 0.000 description 11
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 5
- 238000005036 potential barrier Methods 0.000 description 5
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8618—Diodes with bulk potential barrier, e.g. Camel diodes, Planar Doped Barrier diodes, Graded bandgap diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
Description
【発明の詳細な説明】
〔概要〕
本発明は、レベル・シフト・ダイオードに於い
て、ヘテロ接合界面にて電子親和力の差でエネル
ギ・バンドの不連続を生ずる一導電型異種化合物
半導体ヘテロ接合形成層を積層することに依り、
電圧シフト量を段階的でなく連続的に変え得るよ
うにしたものである。[Detailed Description of the Invention] [Summary] The present invention is directed to the formation of a single conductivity type dissimilar compound semiconductor heterojunction in which energy band discontinuity occurs due to a difference in electron affinity at the heterojunction interface in a level shift diode. By stacking layers,
This allows the voltage shift amount to be changed continuously rather than stepwise.
本発明は、半導体のヘテロ接合に於けるエネル
ギ・バンドの不連続性を利用したレベル・シフ
ト・ダイオードに関する。
The present invention relates to a level shift diode that utilizes energy band discontinuity in a semiconductor heterojunction.
従来、シリコン系半導体装置に於いては、pn
接合に於ける順方向の電圧降下が略一定であるこ
とを利用し、トランジスタを用いた論理回路など
の電圧レベルを所定値だけシフトさせる為のダイ
オードを構成している。一つのpn接合に依る電
圧降下で足りない場合には、必要に応じて複数個
のダイオードを直列接続して使用する。
Conventionally, in silicon-based semiconductor devices, pn
Utilizing the fact that the voltage drop in the forward direction at a junction is approximately constant, a diode is configured to shift the voltage level of a logic circuit using a transistor by a predetermined value. If the voltage drop caused by one pn junction is insufficient, use multiple diodes connected in series as necessary.
また、GaAs系半導体装置に於いては、pn接合
の代わりにシヨツトキ接合を用いるようにしてい
る。 Furthermore, in GaAs-based semiconductor devices, a Schottky junction is used instead of a pn junction.
前記説明したGaAs系半導体装置に於けるシヨ
ツトキ接合を用いたレベル・シフト・ダイオード
は、接合一つ当たりの電圧シフト量は0.6〜0.7
〔Ｖ〕と一定であるから、複数の接合を利用する
場合も、その整数倍のシフト量しか得られない。
In the level shift diode using a shotgun junction in the GaAs-based semiconductor device described above, the amount of voltage shift per junction is 0.6 to 0.7.
Since [V] is constant, even if a plurality of junctions are used, only an integral multiple of the shift amount can be obtained.
本発明は、GaAs系半導体装置に於いてもレベ
ル・シフト・ダイオードの電圧シフト量を任意に
設定できるように、しかも、逆方向耐圧を高く維
持できるようにしようとする。 The present invention attempts to make it possible to arbitrarily set the amount of voltage shift of a level shift diode even in a GaAs-based semiconductor device, and to maintain a high reverse breakdown voltage.
前記問題点のうち、GaAs系半導体装置に於い
てもレベル・シフト・ダイオードの電圧シフト量
を任意に設定できるようにする、という問題のみ
を解消したいのであれば、次に説明するようなレ
ベル・シフト・ダイオードを用いると良い。
Among the above-mentioned problems, if you want to solve only the problem of being able to arbitrarily set the voltage shift amount of the level shift diode even in GaAs-based semiconductor devices, the level shift diode described below can be used. It is better to use a shift diode.
第１図は電圧シフト量を任意に設定できるよう
にしたレベル・シフト・ダイオードを表す要部切
断側面図である。 FIG. 1 is a cutaway side view of a main part of a level shift diode in which the amount of voltage shift can be set arbitrarily.
図に於いて、１はn+型GaAsアノード・コンタ
クト層、２はｎ型GaAsヘテロ接合形成層、３は
ｎ型AlGaAsヘテロ接合形成層、４はn+型
AlGaAsカソード・コンタクト層、５はアノード
電極、６はカソード電極をそれぞれ示している。 In the figure, 1 is an n + type GaAs anode contact layer, 2 is an n type GaAs heterojunction forming layer, 3 is an n type AlGaAs heterojunction forming layer, and 4 is an n + type
An AlGaAs cathode contact layer, 5 an anode electrode, and 6 a cathode electrode, respectively.
第２図は第１図に見られるレベル・シフト・ダ
イオードのエネルギ・バンド・ダイヤグラムを表
している。 FIG. 2 represents the energy band diagram of the level shifting diode seen in FIG.
図に於いて、Ecは伝導帯の底、ΔEaはｎ型
GaAsヘテロ接合形成層２とｎ型AlGaAsヘテロ
接合形成層３との電子親和力の差で生成されるエ
ネルギ・バンド・ギヤツプに於けるバリヤ高さを
それぞれ示している。 In the figure, E c is the bottom of the conduction band, ΔE a is n-type
The barrier heights in the energy band gap generated due to the difference in electron affinity between the GaAs heterojunction forming layer 2 and the n-type AlGaAs heterojunction forming layer 3 are shown.
このレベル・シフト・ダイオードでは、アノー
ド電極５に正電圧を、カソード電極６に負電圧を
それぞれ印加し、その電圧を高めることに依り、
バリヤ高さEBが小さくなり、電流が流れるよう
になる。 In this level shift diode, by applying a positive voltage to the anode electrode 5 and a negative voltage to the cathode electrode 6, and increasing the voltage,
Barrier height E B becomes smaller and current begins to flow.
第３図及び第４図はその様子を説明する為のも
ので、第３図Ａ，Ｂ，Ｃはアノード電圧Vaの如
何に対応したエネルギ・バンド・ダイヤグラム
を、第４図はアノード電圧Va対アノード電流Iaの
線図をそれぞれ表し、第１図及び第２図に於いて
用いた記号と同記号は同部分を示すか或いは同じ
意味を持つものとする。 Figures 3 and 4 are for explaining the situation, and Figures 3A, B, and C are energy band diagrams corresponding to the anode voltage V a , and Figure 4 is the anode voltage V a. The graphs of a versus anode current I a are shown, and the same symbols as those used in FIGS. 1 and 2 indicate the same parts or have the same meanings.
第３図Ａはアノード電圧Va＝０の場合であつ
て、バリヤ高さΔEaは充分に高く、アノード電流
Iaは流れない。 Figure 3A shows the case where the anode voltage V a = 0, the barrier height ΔE a is sufficiently high, and the anode current
I a does not flow.
第３図Ｂはアノード電圧Va≦ΔEa／ｅの場合
であつて、バリヤ高さΔEaは低下し、アノード電
流Iaは僅かに流れ始める。 FIG. 3B shows a case where the anode voltage V a ≦ΔE a /e, the barrier height ΔE a decreases, and the anode current I a begins to flow slightly.
第３図Ｃはアノード電圧Va≒ΔEa／ｅの場合
であつて、バリヤ高さΔEaは更に低下し、アノー
ド電流Iaは大量に流れて飽和する。 FIG. 3C shows a case where the anode voltage V a ≈ΔE a /e, the barrier height ΔE a further decreases, and the anode current I a flows in a large amount and becomes saturated.
前記説明したレベル・シフト・ダイオードで
は、ヘテロ接合界面に於けるバリヤ高さΔEaの如
何に依つて電圧シフト量が変化し、そして、その
バリヤ高さΔEaはヘテロ接合界面を生成する為の
一方の半導体層であるｎ型AlGaAsヘテロ接合形
成層３に於ける組成、即ち、ｘ値に依つて変える
ことができるものである。 In the level shift diode described above, the amount of voltage shift changes depending on the barrier height ΔE a at the heterojunction interface, and the barrier height ΔE a is This can be changed depending on the composition of the n-type AlGaAs heterojunction forming layer 3, which is one of the semiconductor layers, that is, the x value.
従つて、その電圧シフト量として、シヨツトキ
接合を用いた場合のように段階的なものでなく、
連続的に変えたものを実現することは極めて容易
である。 Therefore, the amount of voltage shift is not gradual as in the case of using a Schottky junction, but
It is extremely easy to realize continuous changes.
ところで、前記したレベル・シフト・ダイオー
ドは、ｎ型AlGaAsヘテロ接合形成層３側、即
ち、カソード側に正電圧を印加した場合、ｎ型
GaAsヘテロ接合形成層２に於ける伝導帯レベル
が高くなり、ヘテロ接合界面のポテンシヤル・バ
リヤを電子がトンネリングしてしまう。 By the way, when a positive voltage is applied to the n-type AlGaAs heterojunction forming layer 3 side, that is, the cathode side, the level shift diode described above becomes an n-type
The conduction band level in the GaAs heterojunction forming layer 2 becomes high, and electrons tunnel through the potential barrier at the heterojunction interface.
これは、前記レベル・シフト・ダイオードが、
連続的に電圧シフト量を変化させることができる
という優れた特性をもつていても、逆方向耐圧が
極めて低い旨の重大な欠点があることを意味して
いる。 This means that the level shift diode is
This means that even though it has the excellent property of being able to continuously change the amount of voltage shift, it has a serious drawback of extremely low reverse breakdown voltage.
そこで、本発明に依るレベル・シフト・ダイオ
ードに於いては、半導体基板上にアノード側一導
電型化合物半導体ヘテロ接合形成層及び該一導電
型化合物半導体ヘテロ接合形成層に比較して電子
親和力が小さいカソード側一導電型化合物半導体
ヘテロ接合形成層を一組とする積層体の複数が積
層形成されてなる構成を採つている。 Therefore, in the level shift diode according to the present invention, the electron affinity is smaller than that of the anode-side one-conductivity type compound semiconductor heterojunction-forming layer and the one-conductivity type compound semiconductor heterojunction-forming layer on the semiconductor substrate. A structure is adopted in which a plurality of laminates each having one conductivity type compound semiconductor heterojunction forming layer on the cathode side are stacked.
前記手段を採ることに依り、本発明のレベル・
シフト・ダイオードは、少なくとも三つのポテン
シヤル・バリヤが生成される構成になつていて、
逆方向耐圧は充分に高く維持することができ、ま
た、pn接合を利用するものに於ける段階的な電
圧シフト量と異なり、広い範囲にわたつて連続的
に適正な電圧シフト量を選択して設定することが
可能となり、そして、そのようなきめ細かい電圧
シフト量を得るには、エネルギ・バンドに不連続
を発生させるヘテロ接合界面を構成する一導電型
化合物半導体ヘテロ接合形成層の組成を適宜に変
えれば済み、従つて、その実施は容易である。
By taking the above means, the level of the present invention can be improved.
The shift diode is configured to generate at least three potential barriers,
The reverse breakdown voltage can be maintained sufficiently high, and unlike the stepwise voltage shift amount in devices that use pn junctions, the appropriate voltage shift amount can be continuously selected over a wide range. In order to obtain such a fine-grained voltage shift amount, it is necessary to appropriately adjust the composition of the one conductivity type compound semiconductor heterojunction forming layer that constitutes the heterojunction interface that causes discontinuity in the energy band. Therefore, its implementation is easy.
第５図は本発明一実施例で関するエネルギ・バ
ンド・ダイヤグラムであり、ＡはVa＝０の場合、
ＢはVa＝２×ΔEa／ｅの場合をそれぞれ表し、
また、第６図は第５図に見られる実施例のアノー
ド電圧Va対アノード電流Iaの線図を表し、それぞ
れ第１図乃至第４図に於いて用いた記号と同記号
は同部分を示すか或いは同じ意味を持つものとす
る。
FIG. 5 is an energy band diagram related to one embodiment of the present invention, where A is when V a =0;
B represents the case of V a =2×ΔE a /e, respectively,
In addition, FIG. 6 shows a diagram of the anode voltage V a versus anode current I a of the embodiment shown in FIG. 5, and the same symbols as those used in FIGS. or have the same meaning.
第５図から理解できようが、本実施例は、第１
図に見られるレベル・シフト・ダイオードを二つ
直列に接続した構成になつていることが明らかで
あり、その結果、三つのポテンシヤル・バリヤが
生成されている。 As can be understood from FIG. 5, this embodiment
It is clear that the two level shift diodes shown in the figure are connected in series, resulting in the creation of three potential barriers.
即ち、二つのレベル・シフト・ダイオードを接
続した関係から、その間に逆直列のダイオードが
入つた構成となり、その結果、n+型GaAsアノー
ド・コンタクト層１側に正の電圧を印加した場
合、電圧シフト量は２×ΔEa／ｅとなる。 In other words, since the two level shift diodes are connected, an anti-series diode is inserted between them, and as a result, when a positive voltage is applied to the n + type GaAs anode contact layer 1 side, the voltage The shift amount is 2×ΔE a /e.
また、n+型AlGaAsカソード・コンタクト層４
側に正の電圧を印加した場合、電圧シフト量は中
央のポテンシヤル・バリヤの一つ分、従つて、
ΔEa／ｅとなる。 In addition, n + type AlGaAs cathode contact layer 4
When a positive voltage is applied to the side, the voltage shift amount is one central potential barrier, and therefore,
ΔE a /e.
前記したところから明らかであるが、本実施例
では、順方向で２×ΔEa／ｅの電圧シフト、逆方
向でΔEa／ｅの電圧シフトを有するレベル・シフ
ト・ダイオードが実現され、逆方向にも充分な耐
圧が得られているのである。 As is clear from the above, in this embodiment, a level shift diode having a voltage shift of 2×ΔE a /e in the forward direction and a voltage shift of ΔE a /e in the reverse direction is realized. Sufficient pressure resistance is also obtained.
第７図は本発明に依るレベル・シフト・ダイオ
ードを用いたBFL（buffered field effect
transistor logic）回路の回路図を表している。 FIG. 7 shows a BFL (buffered field effect) using a level shift diode according to the present invention.
(transistor logic) circuit diagram.
図に於いて、Ｑ１乃至Ｑ４はトランジスタ、Ｄ
はレベル・シフト・ダイオード、INは入力端、
OTは出力端、VDDは正側電源電圧、VSSは接地側
電源電圧をそれぞれ示している。 In the figure, Q1 to Q4 are transistors, D
is the level shift diode, IN is the input terminal,
OT represents the output terminal, V DD represents the positive power supply voltage, and V SS represents the ground power supply voltage.
第８図は第７図に於いて破線で囲んだ部分を具
体化した半導体装置の要部切断側面図を表し、第
７図に於いて用いた記号と同記号は同部分を示す
か或いは同じ意味を持つものとする。 FIG. 8 shows a cutaway side view of the main parts of a semiconductor device embodying the part surrounded by the broken line in FIG. 7, and the same symbols as those used in FIG. 7 indicate the same parts or are the same. It shall have meaning.
図に於いて、１１は半絶縁性のGaAs基板、１
２はアン・ドープGaAs能動層、１３はn+型
AlGaAs電子供給層、１４はレベル・シフト・ダ
イオード形成層、１５は素子間分離領域、１６は
合金化領域、１７は二次元電子ガス層、SQ３及
びSQ４はソース電極、DQ３並びにDQ４はドレ
イン電極、GQ３及びGQ４はゲート電極をそれ
ぞれ示している。 In the figure, 11 is a semi-insulating GaAs substrate;
2 is undoped GaAs active layer, 13 is n + type
AlGaAs electron supply layer, 14 is a level shift diode forming layer, 15 is an element isolation region, 16 is an alloying region, 17 is a two-dimensional electron gas layer, SQ3 and SQ4 are source electrodes, DQ3 and DQ4 are drain electrodes, GQ3 and GQ4 indicate gate electrodes, respectively.
ここでは、トランジスタＱ３及びＱ４として高
電子移動度トランジスタ（high electron
mobility transistor：HEMT）を採用している。 Here, high electron mobility transistors (high electron mobility transistors) are used as transistors Q3 and Q4.
mobility transistor (HEMT).
第９図は第８図に見られるレベル・シフト・ダ
イオード形成層１４の層構成を具体的に表した要
部切断側面図であり、第１図乃至第８図に於いて
用いた記号と同記号は同部分を示すか或いは同じ
意味を持つものとする。 FIG. 9 is a cross-sectional side view of a main part specifically showing the layer structure of the level shift diode forming layer 14 shown in FIG. 8, and is the same as the symbols used in FIGS. 1 to 8. Symbols shall indicate the same part or have the same meaning.
このレベル・シフト・ダイオード形成層１４
は、その不純物濃度の高さからして、電極コンタ
クト層としても充分に機能することは勿論であ
る。 This level shift diode forming layer 14
Of course, because of its high impurity concentration, it also functions satisfactorily as an electrode contact layer.
第８図及び第９図から明らかなようにトランジ
スタＱ３のソース電極SQ３とトランジスタＱ４
のドレイン電極DQ４、従つて、出力端OTとの
間にはレベル・シフト・ダイオード形成層１４か
らなるレベル・シフト・ダイオードＤが介挿され
た構成になつていて、回路としてみれば、第７図
として示した回路と全く同じである。 As is clear from FIGS. 8 and 9, the source electrode SQ3 of the transistor Q3 and the transistor Q4
A level shift diode D consisting of a level shift diode forming layer 14 is inserted between the drain electrode DQ4 of the circuit and the output terminal OT. The circuit is exactly the same as the one shown in the figure.
本発明に依るレベル・シフト・ダイオードに於
いては、ヘテロ接合界面にて電子親和力の差でエ
ネルギ・バンドの不連続を生ずる一導電型異種化
合物半導体ヘテロ接合形成層を積層するようにし
ている。
In the level shift diode according to the present invention, heterojunction-forming layers of different compound semiconductors of one conductivity type are laminated to produce discontinuity in energy bands due to differences in electron affinities at the heterojunction interface.
前記構成を採ることに依り、本発明のレベル・
シフト・ダイオードに於いては、少なくとも三つ
のポテンシヤル・バリヤが生成されることになつ
て、順方向耐圧は勿論のこと、逆方向耐圧も充分
に高く維持することができる。また、pn接合を
利用するものに於ける段階的な電圧シフト量と異
なり、広い範囲にわたつて連続的に適正な電圧シ
フト量を選択して設定することが可能となり、そ
して、そのようなきめ細かい電圧シフト量を得る
には、エネルギ・バンドに不連続を発生させるヘ
テロ接合界面を構成する一導電型化合物半導体ヘ
テロ接合形成層の組成を適宜に変えれば済み、従
つて、その実施は容易である。 By adopting the above configuration, the level of the present invention can be improved.
Since at least three potential barriers are generated in the shift diode, not only the forward breakdown voltage but also the reverse breakdown voltage can be maintained sufficiently high. Also, unlike the stepwise voltage shift amount in devices that use p-n junctions, it is possible to continuously select and set the appropriate voltage shift amount over a wide range, and such fine-grained In order to obtain the amount of voltage shift, it is only necessary to appropriately change the composition of the one-conductivity type compound semiconductor heterojunction forming layer that constitutes the heterojunction interface that causes discontinuity in the energy band, and therefore it is easy to implement. .
第１図はヘテロ接合を利用したレベル・シフ
ト・ダイオードを表す要部切断側面図、第２図は
第１図に見られるレベル・シフト・ダイオードの
エネルギ・バンド・ダイヤグラム、第３図Ａ，
Ｂ，Ｃは第１図に見られるレベル・シフト・ダイ
オードの動作を説明するためのエネルギ・バン
ド・ダイヤグラム、第４図はアノード電圧Va対
アノード電流Iaの関係を示す線図、第５図Ａ及び
Ｂは本発明一実施例を説明する為のエネルギ・バ
ンド・ダイヤグラム、第６図は第５図に見られる
実施例のアノード電圧Va対アノード電流Iaの関係
を示す線図、第７図は本発明に依るレベル・シフ
ト・ダイオードを用いたBFL回路の回路図、第
８図は第７図に見られる回路の一部を具体化した
半導体装置の要部切断側面図、第９図は第８図に
見られるレベル・シフト・ダイオード形成層の層
構成を具体的に示した要部切断側面図をそれぞれ
そ表している。
図に於いて、１はn+型GaAsアノード・コンタ
クト層、２はｎ型GaAsヘテロ接合形成層、３は
ｎ型AlGaAsヘテロ接合形成層、４はn+型
AlGaAsカソード・コンタクト層、５はアノード
電極、６はカソード電極をそれぞれ示している。
Figure 1 is a cutaway side view of the main part of a level shift diode using a heterojunction, Figure 2 is an energy band diagram of the level shift diode shown in Figure 1, Figure 3 is A,
B and C are energy band diagrams for explaining the operation of the level shift diode shown in Fig. 1, Fig. 4 is a diagram showing the relationship between anode voltage V a and anode current I a , and Fig. 5 Figures A and B are energy band diagrams for explaining one embodiment of the present invention, and Figure 6 is a diagram showing the relationship between anode voltage V a and anode current I a of the embodiment shown in Figure 5. FIG. 7 is a circuit diagram of a BFL circuit using a level shift diode according to the present invention, FIG. 9 is a cross-sectional side view of a main part specifically showing the layer structure of the level shift diode forming layer shown in FIG. 8. In the figure, 1 is an n + type GaAs anode contact layer, 2 is an n type GaAs heterojunction forming layer, 3 is an n type AlGaAs heterojunction forming layer, and 4 is an n + type
An AlGaAs cathode contact layer, 5 an anode electrode, and 6 a cathode electrode, respectively.
Claims (1)
導体ヘテロ接合形成層及び該一導電型化合物半導
体ヘテロ接合形成層に比較して電子親和力が小さ
いカソード側一導電型化合物半導体ヘテロ接合形
成層を一組とする積層体の複数が積層形成されて
なること を特徴とするレベル・シフト・ダイオード。[Scope of Claims] 1. On a semiconductor substrate, an anode side one conductivity type compound semiconductor heterojunction forming layer and a cathode side one conductivity type compound semiconductor heterojunction having a smaller electron affinity than the one conductivity type compound semiconductor heterojunction forming layer. A level shift diode characterized in that it is formed by laminating a plurality of laminated bodies each having a set of forming layers.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61302866A JPS63156367A (en) | 1986-12-20 | 1986-12-20 | Level shift diode |
| EP87311148A EP0272885B1 (en) | 1986-12-20 | 1987-12-17 | Semiconductor device having level shift diode |
| US07/398,281 US4963948A (en) | 1986-12-20 | 1989-08-22 | Semiconductor device having level shift diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61302866A JPS63156367A (en) | 1986-12-20 | 1986-12-20 | Level shift diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63156367A JPS63156367A (en) | 1988-06-29 |
| JPH0587153B2 true JPH0587153B2 (en) | 1993-12-15 |
Family
ID=17914040
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61302866A Granted JPS63156367A (en) | 1986-12-20 | 1986-12-20 | Level shift diode |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US4963948A (en) |
| EP (1) | EP0272885B1 (en) |
| JP (1) | JPS63156367A (en) |
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07120807B2 (en) * | 1986-12-20 | 1995-12-20 | 富士通株式会社 | Constant current semiconductor device |
| JP2513887B2 (en) * | 1990-02-14 | 1996-07-03 | 株式会社東芝 | Semiconductor integrated circuit device |
| JPH0414314A (en) * | 1990-05-08 | 1992-01-20 | Toshiba Corp | Source electrode coupling type logic circuit |
| KR100356883B1 (en) * | 1991-06-12 | 2003-01-08 | 텍사스 인스트루먼츠 인코포레이티드 | Precharge triggering method, precharge triggered digital device, precharge triggered function stage, and synchronous pipeline system |
| US5398077A (en) * | 1992-05-19 | 1995-03-14 | Eastman Kodak Company | Method for adjusting the luminance of a color signal |
| EP0935294A1 (en) * | 1998-02-06 | 1999-08-11 | Canare Electric Co., Ltd. | Variable capacity device with quantum-wave interference layers |
| US20030015708A1 (en) * | 2001-07-23 | 2003-01-23 | Primit Parikh | Gallium nitride based diodes with low forward voltage and low reverse current operation |
| US7183575B2 (en) | 2002-02-19 | 2007-02-27 | Nissan Motor Co., Ltd. | High reverse voltage silicon carbide diode and method of manufacturing the same high reverse voltage silicon carbide diode |
| US7534633B2 (en) | 2004-07-02 | 2009-05-19 | Cree, Inc. | LED with substrate modifications for enhanced light extraction and method of making same |
| US8519437B2 (en) * | 2007-09-14 | 2013-08-27 | Cree, Inc. | Polarization doping in nitride based diodes |
| US9012937B2 (en) | 2007-10-10 | 2015-04-21 | Cree, Inc. | Multiple conversion material light emitting diode package and method of fabricating same |
| US9287469B2 (en) * | 2008-05-02 | 2016-03-15 | Cree, Inc. | Encapsulation for phosphor-converted white light emitting diode |
| JP5506258B2 (en) | 2008-08-06 | 2014-05-28 | キヤノン株式会社 | Rectifier element |
| EP2157613B1 (en) * | 2008-08-20 | 2019-10-09 | Ommic | Method for monolithic integration of a pseudomorphic Resonant Interband Tuneling Diode (RITD) and a transistor made from III-V materials |
| US8415692B2 (en) | 2009-07-06 | 2013-04-09 | Cree, Inc. | LED packages with scattering particle regions |
| US8536615B1 (en) | 2009-12-16 | 2013-09-17 | Cree, Inc. | Semiconductor device structures with modulated and delta doping and related methods |
| US8604461B2 (en) | 2009-12-16 | 2013-12-10 | Cree, Inc. | Semiconductor device structures with modulated doping and related methods |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CA1145482A (en) * | 1979-12-28 | 1983-04-26 | Takashi Mimura | High electron mobility single heterojunction semiconductor device |
| US4353081A (en) * | 1980-01-29 | 1982-10-05 | Bell Telephone Laboratories, Incorporated | Graded bandgap rectifying semiconductor devices |
| JPS58170054A (en) * | 1982-03-31 | 1983-10-06 | Fujitsu Ltd | Light composite semiconductor device |
| JPS59231920A (en) * | 1983-06-15 | 1984-12-26 | Agency Of Ind Science & Technol | Gaas logical integrated circuit |
| JPS6095973A (en) * | 1983-10-31 | 1985-05-29 | Fujitsu Ltd | Semiconductor device |
| US4575924A (en) * | 1984-07-02 | 1986-03-18 | Texas Instruments Incorporated | Process for fabricating quantum-well devices utilizing etch and refill techniques |
| JPS61274369A (en) * | 1985-05-22 | 1986-12-04 | Fujitsu Ltd | Field effect type semiconductor device |
| JPH0614536B2 (en) * | 1985-09-17 | 1994-02-23 | 株式会社東芝 | Bipolar integrated circuit |
-
1986
- 1986-12-20 JP JP61302866A patent/JPS63156367A/en active Granted
-
1987
- 1987-12-17 EP EP87311148A patent/EP0272885B1/en not_active Expired - Lifetime
-
1989
- 1989-08-22 US US07/398,281 patent/US4963948A/en not_active Expired - Lifetime
Non-Patent Citations (1)
| Title |
|---|
| IBM TECHNICAL DISCLOSURE BULLETIN=1978 * |
Also Published As
| Publication number | Publication date |
|---|---|
| US4963948A (en) | 1990-10-16 |
| JPS63156367A (en) | 1988-06-29 |
| EP0272885A2 (en) | 1988-06-29 |
| EP0272885A3 (en) | 1990-08-01 |
| EP0272885B1 (en) | 1994-09-07 |
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