JP2013041975A - Nitride semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a normally-off nitride semiconductor device capable of bi-directional operation that prevents the breakdown of a gate insulating film and improves reliability.SOLUTION: A nitride semiconductor element 10 includes a first MOSFET part 30 and a second MOSFET part 31. A first SBD metal electrode 28 and a second SBD metal electrode 29 provided between a first gate electrode 26 and a second gate electrode 27 are Schottky-coupled to an AlGaN layer 20. The first SBD metal electrode 28 is connected to a first electrode 24 and they are electrically shorted to each other. The second SBD metal electrode 29 is connected to a second electrode 25 and they are electrically shorted to each other.

Description

  The present invention relates to a bidirectional semiconductor normally-off nitride semiconductor device.

  Conventionally, gallium nitride (GaN) -based compound semiconductor devices (hereinafter referred to as GaN-based semiconductor elements) have been used as semiconductor materials in semiconductor elements for high-frequency devices. In a GaN-based semiconductor device, a buffer layer formed by using, for example, a metal-organic chemical vapor deposition (MOCVD) method or an electron transit layer doped with impurities is provided on the surface of a substrate. ing. In recent years, GaN-based semiconductor elements that handle high withstand voltages and large currents have been studied based on the recognition that they can be applied to power semiconductor elements (power devices) in addition to high-frequency applications.

  Patent Document 1 describes a gallium nitride semiconductor device having a MOS structure. FIG. 14 shows a schematic configuration diagram of a gallium nitride based semiconductor device having a MOS structure described in Patent Document 1. In FIG. As shown in FIG. 14, the conventional gallium nitride based semiconductor device 100 functions as a GaN layer 116 that functions as an electron transit layer and an electron supply layer via a buffer layer 114 for stacking GaN crystals on a substrate 112. AlGaN layers 120 to be stacked are laminated to form a heterojunction structure. In the gallium nitride semiconductor of FIG. 14, a two-dimensional electron gas (2DEG: Two Dimensional Electron Gas, hereinafter referred to as 2DEG) formed immediately below the interface between the GaN layer 116 and the AlGaN layer 120 (the surface of the GaN layer 116) is used as a carrier. Used.

  A recess 132 is formed on a part of the surface of the AlGaN layer 120. A gate electrode 126 is disposed in the recess 132 via a gate insulating film 122 to form a MOS (n-type MOS) structure (MOSFET portion).

  When a voltage is applied to the gate electrode 126, electrons gather on the surface of the GaN layer 116 in contact with the gate insulating film 122 to form a MOS channel (turned on) and form at the interface between the GaN layer 116 and the AlGaN layer 120. The 2DEG layer 118 is electrically connected, and the source electrode 124 and the drain electrode 125 are electrically connected.

  In addition, when the MOS channel is in an off state, when a voltage is applied between the source electrode 124 and the drain electrode 125, the 2DEG layer 118 is depleted from the gate end portion, and a high breakdown voltage can be maintained. It functions as a high power and high breakdown voltage semiconductor element. Therefore, in recent years, the development of nitride-based semiconductor elements as power semiconductor elements with high frequency and high efficiency has been progressing. Conventionally, a so-called HEMT device in which the gate portion is a Schottky junction has been mainly developed. In such a device, the drive circuit is easier for the insulated gate, and when the gate voltage applied to the MOSFET portion is 0 V (when no gate voltage is applied), the device is electrically turned off. Since it is easy to use for a normally-off device, it attracts attention.

  In recent years, an element that can apply a withstand voltage in both directions to the source and drain has been attracting attention as being usable for an AC-AC direct conversion circuit, such as a matrix converter. Patent Document 2 describes a semiconductor element having a reverse breakdown voltage using GaN as a main semiconductor. FIG. 15 shows a schematic configuration diagram of a semiconductor element having a reverse breakdown voltage described in Patent Document 2. In FIG. 15, the substrate 212, the buffer layer 214, the electron transit layer 216, the 2DEG layer 218, the electron supply layer 220, the first main electrode 224, the second main electrode 225, the first gate electrode 226, the first A two-gate electrode 227, a first diode forming electrode 228, and a second diode forming electrode 229 are provided. In the semiconductor element 200, the left and right first main electrodes 224 and second main electrodes 225 in FIG. 15 can operate as source electrodes or drain electrodes depending on the voltage application direction. By applying signals to the first gate electrode 226 (G1) and the second gate electrode 227 (G2), the left and right transistors can be turned on and off, and the breakdown voltage can be maintained in both directions. It is. A matrix converter using a semiconductor element having such a bi-directional breakdown voltage can perform smooth motor control as compared with motor control using a conventional inverter, hardly generate harmonics, and has less noise. Further, it has features such as easy power regeneration operation and is said to be an important conversion circuit in energy saving technology.

International Publication No. 2003/071607 Pamphlet JP 2009-200169 A

  For use as a power semiconductor element, it is a great advantage that it operates at high speed and has low conduction resistance. On the other hand, in the gallium semiconductor device 100 (see FIG. 14) described in Patent Document 1 described above, when the 2DEG layer 118 is to be depleted, a large electric field concentrates on the drain side end portion 134 of the MOSFET portion, and the gate It has been found that the problem that the insulating film 122 is broken often occurs. This is because holes generated in a high electric field gather at the interface between the gate insulating film 122 and the AlGaN layer 120 / GaN layer 116 close to the gate insulating film 122, and most of the voltage applied to the drain electrode 125 is the gate insulating film 122. It was found that this was because it was applied to the.

  Further, even when the voltage is not destroyed, when a large voltage is continuously applied to the drain electrode 126 for a long time, a high electric field is applied to the gate insulating film 122 for a long time, and the characteristics deteriorate with time. In some cases, a reliability problem may occur.

In order to prevent this, it is conceivable that the electron concentration of 2DEG is set to about 2 × 10 ¹² cm ⁻² or less. As a result, 2DEG is easily depleted, and an effect of maintaining the withstand voltage is obtained. However, if the concentration of 2DEG is lowered, the conduction resistance of the 2DEG layer 118 increases, so that the on-resistance of the entire device increases, and the advantage as the original nitride semiconductor is lost. There is a difficulty that it ends.

As another means, the gate electrode 128 is extended on an insulating film thicker than the gate insulating film 122, which is called a field plate, at the drain side end of the gate electrode 128, and the electric field of the thin gate insulating film 122 portion is extended. A means of relieving However, even in this means, it has been found that it is difficult to protect the gate insulating film 122 when the electron concentration of 2DEG is 3 × 10 ¹² cm ⁻² or more.

Further, as another means, by making the GaN layer 116 p-type, holes gathered around the gate insulating film 122 are discharged to the p-type region, and the 2DEG layer 118 is easily depleted. It is done. For example, as shown in Patent Document 1, this means has an advantage that the depletion layer is easily expanded by controlling the acceptor concentration, and a high breakdown voltage can be achieved. However, in general, it is difficult to form a p-type layer of gallium nitride, and it is very difficult to control the concentration at about 1 × 10 ¹⁷ cm ⁻³ . In particular, when the substrate 112 is made of silicon, it is difficult to obtain the p-type layer itself. In other words, it is necessary to select a substrate crystal having a very limited concentration range.

  Further, in the structure of FIG. 14, since the source side and the drain side have a basically contrasting structure with the gate electrode 126 interposed therebetween, there is no so-called freewheeling diode (hereinafter referred to as FWD). For this reason, for example, when used for an inverter or the like, it is necessary to connect in parallel a diode having a function of FWD outside the nitride semiconductor element.

  On the other hand, the semiconductor element 200 (see FIG. 15) described in Patent Document 2 described above has bidirectionality by incorporating the FWD and having reverse breakdown voltage. In the reverse direction, since the transistor is turned on and off in the reverse direction, FWD is usually unnecessary. In the semiconductor device 200 of FIG. 15, high-speed switching has been proposed as a main purpose. However, in a bidirectional device, when both transistors provided on both sides are normally on, the power supply is short-circuited when the power is turned on. Therefore, it is important that at least one of the transistors is normally off. Patent Document 2 also shows an example in which a gate insulating film is provided immediately below the first gate electrode 226 and the second gate electrode 227. However, when such an insulating gate is usually used, the threshold voltage is negative. It is known to shift to the side, and normally-off is difficult.

  The present invention has been made in view of the above, and provides a nitride-based semiconductor device capable of normally-off bidirectional operation with improved reliability while preventing breakdown of a gate insulating film. Objective.

  The nitride semiconductor device according to claim 1, wherein a substrate, a buffer layer formed on the substrate, an electron transit layer made of a nitride compound formed on the buffer layer, and the electron transit layer An electron supply layer having a band gap energy different from that of the electron transit layer; a first electrode and a second electrode formed at opposing positions on the electron supply layer; the first electrode and the first electrode; A first recess portion that divides the electron supply layer formed between two electrodes, and a first recess portion that extends from the first recess portion to the surface of the electron supply layer so as to cover the inside of the first recess portion. A gate insulating film, a first gate electrode formed on the first gate insulating film, and the electron supply layer between the first electrode and the second electrode are joined by a rectifying junction. And in contact with the first electrode. A first carrier transporting electrode for transporting carriers to the first electrode, and a second recess for dividing the electron supply layer formed between the first recess and the second electrode; A second gate insulating film formed over the surface of the electron supply layer from the second recess so as to cover the inside of the second recess, and a second gate electrode formed on the second gate insulating film And comprising.

  The nitride semiconductor device according to claim 2 is the nitride semiconductor device according to claim 1, wherein the control unit is connected to the electron supply layer by a rectifying junction, and the second semiconductor device is the second semiconductor device. A second carrier transporting electrode connected to the electrode for transporting carriers to the second electrode;

  The nitride semiconductor device according to claim 3 is the nitride semiconductor device according to claim 2, wherein the rectifying junction in the second carrier transporting electrode is a heterojunction, a pn junction, and a Schottky. One of the junctions.

The nitride semiconductor device according to claim 4, wherein a substrate, a buffer layer formed on the substrate, an electron transit layer formed of a nitride compound formed on the buffer layer, and the electron transit layer An electron supply layer having a band gap energy different from that of the electron transit layer; a first electrode and a second electrode formed at opposing positions on the electron supply layer; the first electrode and the first electrode; A first recess portion that divides the electron supply layer formed between two electrodes, and a first recess portion that extends from the first recess portion to the surface of the electron supply layer so as to cover the inside of the first recess portion. A gate insulating film, a first gate electrode formed on the first gate insulating film, and the electron supply layer between the first electrode and the second electrode are joined by a rectifying junction. And in contact with the first electrode. A first carrier transporting electrode for transporting carriers to the first electrode, a Schottky junction, a heterojunction, and a pn junction formed between the first recess and the second electrode. A second gate electrode joined to the electron supply layer.
The nitride semiconductor device according to claim 5 is the nitride semiconductor device according to any one of claims 1 to 4, wherein the rectifying junction in the first carrier transporting electrode is: Either a heterojunction, a pn junction, or a Schottky junction.

  The nitride semiconductor device according to claim 6 is the nitride semiconductor device according to any one of claims 1 to 5, wherein the electron transit layer is made of undoped GaN and has a thickness of It is 2 nm or more and 500 nm or less.

  The nitride semiconductor device according to claim 7 is the nitride semiconductor device according to any one of claims 1 to 6, wherein the electron supply layer has an aluminum composition ratio of 0.01. It is made of AlGaN of 0.99 or less and has a thickness of 1 nm or more and 50 nm or less.

  There is an effect that it is possible to provide a nitride-based semiconductor device capable of preventing the breakdown of the gate insulating film and improving the reliability and capable of normally-off bidirectional operation.

It is sectional drawing which shows an example of schematic structure of the nitride type semiconductor element which concerns on the 1st Embodiment of this invention. FIG. 2 is an explanatory diagram for explaining current-voltage characteristics of the nitride-based semiconductor element shown in FIG. 1. FIG. 2 is a circuit diagram showing an equivalent circuit of the nitride-based semiconductor element shown in FIG. 1. FIG. 3 is an explanatory diagram for explaining a relationship between a carrier concentration of 2DEG and a withstand voltage of the nitride-based semiconductor device shown in FIG. 1 and a conventional nitride-based semiconductor device. 2 is a cross-sectional view showing an example of a cross-sectional structure in more detail than the schematic configuration shown in FIG. 1 of the nitride-based semiconductor device according to the first embodiment of the present invention. It is explanatory drawing for demonstrating one process of an example of the manufacturing method of the nitride-type semiconductor element shown in FIG. It is explanatory drawing for demonstrating one process of an example of the manufacturing method of the nitride-type semiconductor element shown in FIG. It is sectional drawing which shows an example of schematic structure of the nitride-type semiconductor element which concerns on the 2nd Embodiment of this invention. FIG. 9 is a circuit diagram showing an equivalent circuit of the nitride semiconductor device shown in FIG. 8. It is sectional drawing which shows an example of schematic structure of the nitride-type semiconductor element which concerns on the 3rd Embodiment of this invention. It is sectional drawing which shows an example of schematic structure of the nitride-type semiconductor element which concerns on the 4th Embodiment of this invention. FIG. 12 is a plan view showing an example of a schematic configuration of the nitride-based semiconductor element shown in FIG. 11 as viewed from above. It is sectional drawing which shows an example of schematic structure of the nitride-type semiconductor element which concerns on the 5th Embodiment of this invention. It is sectional drawing which shows an example of schematic structure of the conventional nitride semiconductor device. It is sectional drawing which shows an example of schematic structure of the conventional nitride semiconductor device.

  [First Embodiment]

  Hereinafter, the nitride semiconductor device of the present embodiment will be described in detail with reference to the drawings. Note that this embodiment is an example of a semiconductor device of the present invention, and the present invention is not limited to this embodiment.

  FIG. 1 is a cross-sectional view showing an example of a schematic configuration of a nitride-based semiconductor element that is a nitride-based semiconductor device of the present embodiment.

  The nitride semiconductor device 10 of the present embodiment includes a substrate 12, a buffer layer 14, a GaN layer 16, an AlGaN layer 20, a first gate insulating film 22, a second gate insulating film 23, a first electrode 24, and a second electrode. 25, a first gate electrode 26, a second gate electrode 27, a first SBD (Schottky Barrier Diode) metal electrode 28, and a second SBD metal electrode 29. Have. Further, the nitride-based semiconductor element 10 of the present embodiment is configured by a first MOSFET portion 30 and a second MOSFET portion 31 when viewed as an equivalent circuit.

A specific example of the substrate 12 is a substrate capable of crystal growth of a nitride compound semiconductor such as silicon, sapphire, SiC, ZrB ₂ , Si, GaN, or MgO. The buffer layer 14 is a layer having a function for laminating GaN crystals, and GaN, AlN, AlGaN or the like can be used, and an electron transit layer (GaN layer in the present embodiment) formed on the buffer layer 14. It may be lattice-matched with the GaN crystal forming 16). The substrate 12 may be short-circuited (connected) to one of the first electrode 24 and the second electrode 25 according to the bias condition, or may not be connected to either.

  The GaN layer 16 functions as an electron transit layer and is made of undoped GaN or the like. The GaN layer 16 may be N-type or P-type. The AlGaN layer 20 functions as an electron supply layer and is made of AlGaN having a band gap energy different from that of the GaN layer 16. The AlGaN layer 20 may have a plurality of layer configurations with different Al concentrations. A band offset is formed at the interface between the GaN layer 16 and the AlGaN layer 20, and positive charges are generated at the AlGaN / GaN interface due to spontaneous polarization and piezoelectric polarization of the AlGaN layer 20 and the GaN layer 16. On the surface of 16, 2DEG is generated. In the present embodiment, the surface layer of the GaN layer 16 in which 2DEG is generated is referred to as a 2DEG layer 18. At this time, the amount of positive charges is controlled by adjusting the film thickness and Al composition of the GaN layer 16 and AlGaN layer 20. In the present embodiment, the thickness of the GaN layer 16 is preferably 2 nm or more and 500 nm or less. The thickness of the AlGaN layer 20 is preferably 1 nm or more and 50 nm or less, and the Al composition ratio is preferably 0.01 or more and 0.99 or less.

  The combination of the electron transit layer and the electron supply layer is not limited to the combination of GaN / AlGaN, and the electron supply layer may be a combination of materials having a larger band gap energy than the electron transit layer. For example, GaN / AlInGaN, InGaN / GaN, GaNAs / GaN, GaInNAsP / GaN, GaInNP / GaN, GaNP / GaN, GaN / AlGaInNAsP, or a combination of AlInGaN / AlGaN. Even in the case of these combinations, the film thickness and the composition ratio of the electron supply layer and the electron transit layer may be appropriately adjusted in order to keep the concentration of 2DEG within the optimum range.

In the present embodiment, the first recess portion 32 and the second recess portion 33 are formed so as to divide at least a part of the AlGaN layer 20 to a depth reaching the GaN layer 16 through the AlGaN layer 20. As shown in FIG. 1, the first gate insulating film 22 is formed in the first recess 32 and on the surface of the AlGaN layer 20 (the surface between the first electrode 24 and the first gate electrode 26, and the first gate electrode 26 and It is formed so as to cover the surface between the first SBD metal electrode 28). Further, the second gate insulating film 23 is formed inside the second recess portion 33 and on the surface of the AlGaN layer 20 (the surface between the second electrode 25 and the second gate electrode 27, and the second gate electrode 27 and the second SBD metal electrode). 29). For the first gate electrode 26 and the second gate electrode 27, SiO ₂ , Al ₂ O ₃ , SiN, SiON, or a composite film thereof can be used.

  The first electrode 24 and the second electrode 25 are ohmic electrodes and are directly formed on the AlGaN layer 20. Each of the first electrode 24 and the second electrode 25 has a function of operating as a source electrode or a gate electrode depending on a combination of gate signals (voltages) applied to the first gate electrode 26 and the second gate electrode 27. (Details will be described later).

  The first gate electrode 26 is formed in the first recess portion 32. In this embodiment, the lower portion of the first gate electrode 26 (lower portion of the first MOSFET portion 30) is the GaN layer 16. By applying a voltage to the first gate electrode 26, a gate voltage is applied through the first gate insulating film 22. The second gate electrode 27 is formed in the second recess portion 33, and in this embodiment, the lower portion of the second gate electrode 27 (lower portion of the second MOSFET portion 31) is the GaN layer 16. By applying a voltage to the second gate electrode 27, a gate voltage is applied through the second gate insulating film 23. By applying a voltage (gate voltage) to the first gate electrode 26 and the second gate electrode 27, each of the first MOSFET unit 30 and the second MOSFET unit 31 can operate as a transistor. Since the AlGaN layer 20 is divided, both are normally off and operate bidirectionally (details will be described later).

  The first SBD metal electrode 28 and the second SBD metal electrode 29 are formed on the AlGaN layer 20 between the first gate electrode 26 and the second gate electrode 27 by Schottky junction with the AlGaN layer 20 respectively. The first SBD metal electrode 28 is electrically connected to the first electrode 24 and is short-circuited. The second SBD metal electrode 29 is electrically connected to the second electrode 25 and is short-circuited.

  FIG. 2 shows a current-voltage characteristic (IV curve) of the nitride-based semiconductor element 10 shown in FIG. FIG. 3 shows an equivalent circuit diagram of the nitride-based semiconductor element 10 shown in FIG. In the nitride semiconductor device 10 of the present embodiment, since the first MOSFET unit 30 and the second MOSFET unit 31 are normally off, an on signal is input to both the first gate electrode (G1) 26 and the second gate electrode (G2) 27. Then, it operates as a bidirectional transistor. On the other hand, when an off signal is input to at least one of the first gate electrode (G1) 26 and the second gate electrode (G2) 27, whether the signal input to the other is an on signal or an off signal. Regardless, it operates as a diode having the breakdown voltage characteristic shown in FIG. When an off signal is input to both the first gate electrode (G1) 26 and the second gate electrode (G2) 27, the diode operates as a diode having a breakdown voltage on both sides of the voltage.

  In the nitride-based semiconductor element 10, when an off signal is input to the first gate electrode 26, the first MOSFET unit 30 is turned off, so that a positive voltage (bias voltage) is applied to the second electrode 25. The first SBD metal electrode 28 short-circuited to the first electrode 24 discharges holes accumulated on the drain side (near the end 34) of the first MOSFET portion 30 to the first electrode 24. As a result, an excessive voltage is prevented from being applied to the first gate insulating film 22, and the first gate insulating film 22 is prevented from being destroyed.

  On the other hand, when an ON signal is input to the first gate electrode 26, the first MOSFET part 30 is turned on, so that the drain side voltage of the first MOSFET part 30 is close to the source side (first electrode 24 side) voltage. Thus, the first SBD metal electrode 28 shifts from the off state to the on state, and becomes conductive throughout the device.

  Further, in a bidirectional operation, when a negative voltage (bias voltage) is applied to the second electrode 25, the first SBD metal electrode 28 is in the forward direction, so that the second MOSFET unit 31 causes the main current to be reduced. The on / off operation can be controlled to control the on / off operation. Note that this operation is a symmetric operation only in that the bias relation is reversed from the above description. Therefore, the nitride-based semiconductor device 10 can perform a bidirectional switching operation.

FIG. 4 shows the relationship between the 2DEG carrier concentration and the breakdown voltage of the nitride semiconductor device 10 of the present embodiment and the conventional nitride semiconductor device 100 shown in FIG. In general, the carrier concentration of 2DEG is 2 × 10 ¹² cm ⁻² or more and 1 × 10 ¹³ cm ⁻² or less. However, in the conventional nitride-based semiconductor device 100 as shown in FIG. 12, the breakdown voltage is extremely lowered when the carrier concentration of 2DEG is increased to 2 × 10 ¹² cm ⁻² or more. The semiconductor element 10 can maintain the breakdown voltage even when the carrier concentration of 2DEG is increased to 5 × 10 ¹² cm ⁻² or more, which is a preferable concentration, by adopting the above-described structure. Became. That is, a low on-resistance and a high breakdown voltage can be realized at the same time.

Further, when the nitride-based semiconductor element 10 of the present embodiment and the conventional nitride-based semiconductor element 100 are compared, the characteristics of the two DEG carrier concentration is about 1 × 10 ¹² cm ^−2. A major change has occurred. Thus, as shown in FIG. 4, in the nitride semiconductor device 10 of the present embodiment, the carrier concentration of 2DEG is 1 × 10 ¹² cm ⁻² or more, which is remarkable as compared with the conventional nitride semiconductor device 100. It has a great effect. Therefore, when the carrier concentration of 2DEG is 1 × 10 ¹² cm ⁻² or more, the onset of the nitride-based semiconductor element 10 of the present embodiment is lower than that of the conventional nitride-based semiconductor element 100. A remarkable effect is obtained that a higher breakdown voltage can be realized at the same time.

  Furthermore, since the large voltage is not applied to the drain side (end portion 34) of the first MOSFET portion 30 when the first MOSFET portion 30 is in the OFF state, the first gate insulating film 22 can be protected. Similarly, in the second MOSFET portion 31, since a large voltage is not applied to the drain side (end portion (34)) of the second MOSFET portion 31 in the off state, the second gate insulating film 23 can be protected. It has become possible.

  FIG. 5 shows an example of a more detailed cross-sectional structure than the cross-sectional view of the schematic configuration shown in FIG.

  As shown in FIG. 5, a field insulating film 36 is provided on the surface of the AlGaN layer 20 between the first SBD metal electrode 28 and the second SBD metal electrode 29, and the surface of the first gate electrode 26 and the first gate electrode 26. An insulating film 37 is provided so as to cover the surface of each of the two gate electrodes 27. The first electrode 24 for short-circuiting with the first SBD metal electrode 28 constitutes an eaves-like field plate structure 24a (hereinafter referred to as FP) between the first SBD metal electrode 28 and the field insulating film 36. Electric field concentration at the end of the 1SBD metal electrode 28 is prevented. Similarly, an eaves-like FP 25 a is formed between the second SBD metal electrode 29 and the field insulating film 36 by the second electrode 25 for short-circuiting with the second SBD metal electrode 29, and the end of the second SBD metal electrode 29 is formed. The electric field concentration in the part is prevented.

  The surface of the nitride-based semiconductor device 10 (the surface on which the electrodes such as the first electrode 24 and the second electrode 25 are formed, the surface corresponding to the upper side in FIG. 5) is minimally affected by external dust and influences. A surface protective film 38 is provided to suppress the above. A back surface electrode 35 is formed on the back surface of the substrate 12. The back electrode 35 can be short-circuited with one of the first electrode 24 and the second electrode 25 or not short-circuited with (not connected to) the first electrode 24 and the second electrode 25 in accordance with the bias condition, application, package structure, and the like.

  In the nitride-based semiconductor element 10, an area for providing the first SBD metal electrode 28 and the second SBD metal electrode 29 on the AlGaN layer 20 is required. In order to reduce the increase in device resistance due to the increase in device size and the increase in the distance between the source and the drain (the distance between the first electrode 24 and the second electrode 25), Although it is preferable to make the lengths L1 and L2 shown in FIG. 5 as small as possible, the lengths L1 and L2 are determined in consideration of the limitations as described below. The length L1 is the distance from the junction between the first gate insulating film 22 and the AlGaN layer 20 on the inner wall of the first recess 32 to the end of the first SBD metal electrode 28 on the first gate electrode 26 side. The length L2 is the length of the first SBD metal electrode 28 (the length from the end on the first gate electrode 26 side to the end on the second SBD metal electrode 29 side). In the present embodiment, since the nitride-based semiconductor element 10 has a substantially bilaterally symmetric structure, the lengths L1 and L2 are similarly determined also on the second MOSFET portion 31 side.

  When the nitride-based semiconductor device 10 is in the OFF state, 2DEG is depleted immediately below the first SBD metal electrode 28 and the second SBD metal electrode 29 of the 2DEG layer 18 at the interface of the AlGaN layer 20 / GaN layer 16, and FIG. Can be modeled as a capacitance C1.

  Thereby, the voltage value V1 directly under the 1st SBD metal electrode 28 and the 2nd SBD metal electrode 29 is obtained by following formula (1)-(3).

  V1 = C2 × Vds / (C1 + C2) (Vds: drain-source voltage) Expression (1)

  C1∝L2 / L4 (L4: layer thickness of the AlGaN layer 20) Formula (2)

  C2∝L3 / L5 (L3: layer thickness of the GaN layer 16, L5: distance from the end of the first SBD metal electrode 28 to the end of the second SBD metal electrode 29) Formula (3)

  For example, as a specific example, when L2 = 1 μm, L3 = 1 μm, L4 = 20 nm, and L5 = 10 μm, V1 is given by the following formula (4).

  V1 = 0.002 × Vd (Vd: drain voltage) Expression (4)

  When a voltage is applied with Vd = 1 kV, V1 = 2V. This is an explanation based on a simple model. Actually, however, the capacities C1 and C2 are not represented by the simple equations such as the above equations (2) and (3) due to various factors. In consideration of the above, the voltage V1 is actually accompanied by a voltage increase of about 5 times the above equation (4).

  Therefore, in the actual device structure, the following formula (5) is obtained together with the above formulas (2) to (4).

  V1 = 0.1 × Vd / (L5 × L2) (both L2 and L5 are in μm) Expression (5)

  In order to achieve a level that does not cause a problem even when the voltage V1 is constantly applied to the gate electrode 28, the following formula (6) needs to be satisfied.

  V1 <Emax × dox (Emax: maximum electric field value that may be constantly applied to the first gate insulating film 22 and the second gate insulating film 23, dox: the first gate insulating film 22 and the second gate insulating film 23 Film thickness) ... Formula (6)

  When the above formulas (5) and (6) are combined, it is necessary to satisfy the relationship of the following formula (7) with respect to the length L2.

  L2> 0.1 × Vd / (L5 × Vd × Emax) (7)

The electric field value Emax is generally about 3 MV / cm when the gate insulating film 22 is made of SiO ₂ . Since it is generally known that the electric field value obtained from the voltage Vd and the length L5 is about 100 V / μm, the above equation (7) is simplified as the following equation (8).

  L2> 10 / (Emax × dox) (8)

  For example, when the film thickness dox of the first gate insulating film 22 and the second gate insulating film 23 is 60 nm, the length L2 is about 0.6 μm or more. When the first gate insulating film 22 and the second gate insulating film 23 are made thinner, it is difficult to further shorten the length L2. In view of these and the actual manufacturing method of the nitride-based semiconductor device 10, when the thickness of the first gate insulating film 22 and the second gate insulating film 23 is increased to about 0.1 μm, the above formula From (8), about L2 = 0.3 μm is obtained as the lower limit value.

  It is generally understood by those skilled in the art that the length L1 is also a factor that determines the source-drain breakdown voltage of the first MOSFET unit 30 and the second MOSFET unit 31. That is, the voltage values at the drain side end portions of the first MOSFET portion 30 and the second MOSFET portion 31 are substantially the same voltage value as the above-described voltage value V1, and therefore if the length L1 is extremely shortened, the withstand voltage Will fall. When the withstand voltage decreases, when a large voltage is applied to the second electrode 25, the drain side end of the first MOSFET portion 30 (if the large voltage is applied to the first electrode 24, the second MOSFET portion 31 A large voltage higher than the breakdown voltage is applied to the drain side end portion, and the first gate insulating film 22 (second gate insulating film 23) is destroyed. Therefore, even when the voltage V1 is applied, it is necessary to set the length L1 so that breakdown does not occur in the region indicated by the length L1. Specifically, the length L1 is determined by the breakdown voltage of the GaN layer 16. According to the inventor's experience, the lateral breakdown voltage of the GaN layer 16 is about 100 V / μm as described above. Therefore, in order to have a breakdown voltage of 20 V or more as the voltage V1, L1 = 0.2 μm or more. There is a need.

  Note that the nitride-based semiconductor device 10 of the present embodiment described above can be manufactured as follows, for example. In addition, the manufacturing method shown below is an example and is not limited to this.

  The buffer layer 14 and the GaN layer 16 are sequentially stacked on the substrate 12 by an epitaxial crystal growth method such as an MOCVD method or a molecular beam epitaxial (MBE) method. Further, the AlGaN layer 20 is similarly formed on the GaN layer 16 by the epitaxial growth method (see FIG. 6). In order to control the carrier concentration of 2DEG, in the AlGaN layer 20, the Al composition and the layer thickness are adjusted.

Next, a photoresist is applied to the surface of the AlGaN layer 20, and patterning is performed by a photolithography process to form a predetermined pattern. Using the photoresist as a mask, the AlGaN layer 20 and the GaN layer 16 (part) in the region where the first recess portion 32 and the second recess portion 33 are formed are removed by etching. Further, a first gate insulating film 22 such as a SiO ₂ film is formed on the surface of the element on the side where the first recess portion 32 and the electrode are formed by a chemical vapor deposition (CVD) method or the like. A two-gate insulating film 23 is formed on the surface of the element on the side where the second recess 33 and the electrode are formed. Thereafter, patterning is performed using a photolithography process, and the first gate insulating film 22 and the second region such as a region where the first electrode 24, the second electrode 25, the first SBD metal electrode 28, and the second SBD metal electrode 29 are formed. The gate insulating film 23 is removed by etching (see FIG. 7).

  Further, the first electrode 24, the second electrode 25, the first gate electrode 26, and the second gate electrode 27 are formed by a sputtering method, a vacuum evaporation method, or the like. In addition, the first SBD metal electrode 28 and the second SBD metal electrode 29 are formed. Further, the first electrode 24 and the first SBD metal electrode 28 are electrically connected, and the second electrode 25 and the second SBD metal electrode 29 are electrically connected, so that the present embodiment shown in FIG. The nitride semiconductor device 10 is manufactured.

  As described above, the nitride-based semiconductor device 10 of the present embodiment obtained as a result of the inventors' many experiments and analysis of the breakdown mechanism includes the first MOSFET unit 30 and the second MOSFET unit 31. A first SBD metal electrode 28 and a second SBD metal electrode 29 provided between the first gate electrode 26 and the second gate electrode 27 are in Schottky junction with the AlGaN layer 20. Further, the first SBD metal electrode 28 and the first electrode 24 are connected and electrically short-circuited, and the second SBD metal electrode 29 and the second electrode 25 are connected and electrically short-circuited. ing.

  In the nitride-based semiconductor device 10 of the present embodiment, the first MOSFET unit 30 and the second MOSFET unit 31 are normally off. Therefore, when the ON signal is input to both the first gate electrode 26 and the second gate electrode 27, bidirectional. Operates as a transistor. On the other hand, when an off signal is input to at least one of the first gate electrode 26 and the second gate electrode 27, the withstand voltage characteristic (see FIG. 5) regardless of whether the signal input to the other is an on signal or an off signal. 2).

  In the nitride-based semiconductor element 10 of the present embodiment, when the first MOSFET unit 30 is in the off state, the first SBD metal electrode 28 stores holes accumulated on the drain side (near the end 34) of the first MOSFET unit 30. Discharge to the first electrode 24. Since a large voltage is not applied to the drain side (end portion 34) of the first MOSFET portion 30, it is possible to prevent the first gate insulating film 22 from being destroyed. Similarly, in the second MOSFET portion 31, when the second MOSFET portion 31 is in the off state, a large voltage is not applied to the drain side (end portion (34)) of the second MOSFET portion 31. Can be prevented from being destroyed.

  In the bidirectional operation, when a negative bias voltage is applied to the second electrode 25, the first SBD metal electrode 28 is in the forward direction. It can function as a control circuit for controlling

  Therefore, it is possible to obtain the nitride-based semiconductor element 10 that can prevent the breakdown of the first gate insulating film 22 and the second gate insulating film 23 and improve the reliability and can perform the normally-off bidirectional operation.

  [Second Embodiment]

  Since the nitride-based semiconductor device of the second embodiment has substantially the same configuration and operation as the nitride-based semiconductor device 10 of the first embodiment, the same parts are denoted by the same reference numerals and detailed description thereof is omitted. The description will be omitted, and only different parts will be described in detail.

  In the first embodiment, the description has been given of the nitride-based semiconductor device 10 in which both of the two transistors are configured as normally-off having a MOSFET structure. However, in this embodiment, only one transistor is normally-off. A nitride semiconductor device having the MOSFET structure will be described.

  FIG. 8 shows a cross-sectional view of an example of a schematic configuration of a nitride-based semiconductor element that is the nitride-based semiconductor device of the present embodiment. FIG. 9 shows an equivalent circuit diagram of the nitride-based semiconductor element 40 shown in FIG. The nitride semiconductor device 40 according to the present embodiment includes the first MOSFET unit 30 and the HEMT unit 44. As described above in the first embodiment, the first MOSFET section 30 that is a switch on the first electrode 24 side is a normally-off transistor. On the other hand, the transistor which is the switch on the second electrode 25 side has a HEMT structure (HEMT portion 44) having a Schottky gate (SBD metal gate electrode) 42. The SBD metal gate electrode 42 can be the same as the second SBD metal electrode 29 of the first embodiment, for example.

Mobility of the 1MOSFET portion 30 is generally, but there is a 100~200cm ² / Vs, which is compared to 1500~2000cm ² / Vs is the mobility of the channel layer of the HEMT 44, significantly smaller. Therefore, by making one transistor have a HEMT structure, it is possible to suppress an increase in resistance of the entire nitride-based semiconductor element 10 as compared to the case where both have a MOSFET structure.

  In the bidirectional switch, it is necessary to prevent failure of the gate control circuit and short circuit between the electrodes when the power is turned on. However, as in the nitride-based semiconductor element 40 of the present embodiment, one switch has a MOSFET structure ( By configuring the first MOSFET portion 30) and the other switch as a HEMT structure (HEMT portion 44), a short-circuit between electrodes can be prevented and a low-resistance bidirectional switch (nitride-based semiconductor element 40) is provided. It becomes possible to provide.

  As in the present embodiment, when one has an HMET structure, the first SBD metal electrode 28 is in the forward direction under the condition that the second electrode 25 is negatively biased with respect to the first electrode 24. Even if an OFF signal is input to the first gate electrode 26, it is short-circuited. Therefore, if there is a possibility that a short-circuit will occur, the nitride-based semiconductor device 40 is configured with a circuit in which the second electrode 25 side is always positively biased. It is necessary to use

  [Third Embodiment]

  Since the nitride-based semiconductor device of the third embodiment has substantially the same configuration and operation as the nitride-based semiconductor device 10 of the first embodiment, the same parts are denoted by the same reference numerals and detailed description thereof is omitted. The description will be omitted, and only different parts will be described in detail.

  FIG. 10 is a cross-sectional view showing an example of a schematic configuration of a nitride-based semiconductor element that is the nitride-based semiconductor device of the present embodiment. In the nitride semiconductor device 50 of the present embodiment, in the nitride semiconductor device 10 of the first embodiment, the first SBD metal electrode 28 and the second SBD metal electrode as the Schottky junction electrodes with the AlGaN layer 20 are used. However, instead of this, a semiconductor layer pn-junctioned to the AlGaN layer 20 and an ohmic-junction electrode are provided on the semiconductor layer.

  In the nitride-based semiconductor device 50 of the present embodiment, a p-AlGaN layer 52 that is pn-junctioned is provided on the AlGaN layer 20, and an ohmic electrode 54 is formed on the p-AlGaN layer 52. Yes. A p-AlGaN layer 53 pn-junction is provided on the AlGaN layer 20, and an ohmic electrode 55 is formed on the p-AlGaN layer 53.

  Also in the p-AlGaN layer 52 and the p-AlGaN layer 53 of the nitride semiconductor device 50 of the present embodiment, the first SBD metal electrode 28 and the second SBD metal electrode of the nitride semiconductor device 10 of the first embodiment. As in the case of 29, since it has a function of discharging holes collected at the drain side end portions of the first MOSFET portion 30 and the second MOSFET portion 31 to the first electrode 24 and the second electrode 25, the same effect can be obtained. .

  Note that the first SBD metal electrode 28 shown in the first embodiment and the p-AlGaN layer 52 of the present embodiment may be mixedly mounted. Further, the second SBD metal electrode 29 shown in the first embodiment and the p-AlGaN layer 53 of the present embodiment may be mixedly mounted.

  [Fourth Embodiment]

  The nitride semiconductor device according to the fourth embodiment has substantially the same configuration and operation as the nitride semiconductor device 10 according to the first embodiment and the nitride semiconductor device 50 according to the second embodiment. For this reason, the same parts are denoted by the same reference numerals, detailed description thereof is omitted, and only different parts will be described in detail.

  FIG. 11 is a cross-sectional view showing an example of a schematic configuration of a nitride-based semiconductor element that is the nitride-based semiconductor device of the present embodiment, and the upper side (the side on which the first electrode 24 and the second electrode 25 are formed). FIG. 12 shows a plan view as seen from FIG. FIG. 11 shows a configuration taken along the line AA in FIG. In the nitride semiconductor device 60 of the present embodiment, the first SBD metal electrode 28 and the second SBD metal electrode 29 provided on the AlGaN layer 20 in the nitride semiconductor device 10 of the first embodiment are replaced, A first SBD metal electrode 62 and a second SBD metal electrode 63 embedded in the AlGaN layer 20 and the GaN layer 16 are provided.

  In the present embodiment, the first recess portion 64 and the second recess portion 65 are formed from the surface of the AlGaN layer 20 through the AlGaN layer 20 until reaching the GaN layer 16, and the first recess portion 64. The first SBD metal electrode 62 is provided, and the second recess portion 65 is provided with the second SBD metal electrode 63. The configuration at the BB cross section in FIG. 12 is the configuration as shown in FIG. Note that the first recess portion 64 and the second recess portion 65 are partially provided as shown in FIG.

  As described above, the first recess portion 64 is provided with the first SBD metal electrode 62, and the second recess portion 65 is provided with the second SBD metal electrode 63, whereby the first MOSFET portion 30 and the second MOSFET portion. The holes accumulated at the 31 interface can be discharged to the first electrode 24 and the second electrode 25 more efficiently.

  Note that the depth of the first recess portion 64 and the second recess portion 65 may be at least as far as the AlGaN layer 20, but preferably reaches the GaN layer 16 as shown in FIG. It is preferable that the first SBD metal electrode 62 and the second SBD metal electrode 63 are in contact with the 2DEG generation portion (2DEG layer 18).

  [Fifth Embodiment]

  The nitride-based semiconductor element of the fifth embodiment includes the nitride-based semiconductor element 10 of the first embodiment, the nitride-based semiconductor element 50 of the third embodiment, and the fourth embodiment. Since the configuration and operation are substantially the same as those of the nitride-based semiconductor device 60, the same portions are denoted by the same reference numerals, detailed description thereof is omitted, and only different portions are described in detail.

  FIG. 13 is a cross-sectional view showing an example of a schematic configuration of a nitride-based semiconductor element that is the nitride-based semiconductor device of the present embodiment. In the nitride-based semiconductor device 70 of the present embodiment, the n + AlGan layer 74-1 and the n + GaN layer 72-1 on the first electrode 24 side that becomes the n + region in the lower region of the first gate insulating film 22, and the first SBD metal electrode 28 side n + AlGaN layer 74-2 and n + GaN layer 72-2 are provided. Similarly, in the lower region of the second gate insulating film 23, the n + AlGan layer 75-1 and the n + GaN layer 73-1 on the second electrode 25 side that become the n + region, the n + AlGaN layer 75-2 on the second SBD metal electrode 29 side, and An n + GaN layer 73-2 is provided.

  The n + AlGaN layer 74-1 that is the n + region of the lower region of the first gate insulating film 22 between the first electrode 24 and the first gate electrode 26 is joined to the first electrode 24. The n + GaN layer 72-2 and the n + AlGaN layer 74-2, which are n + regions in the lower region of the first gate insulating film 22 between the first gate electrode 26 and the first SBD metal electrode 28, are connected to the first SBD metal electrode 28. It has not been. Similarly, the n + AlGaN layer 75-1, which is the n + region in the lower region of the second gate insulating film 23 between the second electrode 25 and the second gate electrode 27, is joined to the second electrode 25. The n + GaN layer 73-2 and the n + AlGaN layer 75-2, which are n + regions in the lower region of the second gate insulating film 23 between the second gate electrode 27 and the second SBD metal electrode 29, are connected to the second SBD metal electrode 29. It has not been.

The n + regions (n + GaN layers 72-1, 72-2, 73-1, 73-2 and n + AlGaN layers 74-1, 74-2, 75-1, 75-2) of the present embodiment are the same as the AlGaN layer 20. After the formation, Si is ion-implanted into the corresponding portion at about 10 ¹⁵ cm ⁻² , and then heat-treated at about 1000 ° C., so that the AlGaN layer 20 becomes the n + AlGaN layers 74-1, 74-2, 75-1, 75-2. In addition, the GaN layer 16 is formed by changing to n + GaN layers 72-1, 72-2, 73-1, 73-2.

  Thus, by providing the n + region in the lower region of the first gate insulating film 22 and the second gate insulating film 23, the side wall portions (first recess portions) of the first gate insulating film 22 and the second gate insulating film 23 are provided. 32 and the side wall portion of the second recess portion 33) are channel regions, so that the resistance component flowing through the side wall portion can be removed, and the resistance of the entire nitride-based semiconductor element 70 can be reduced. Can be small.

  In the nitride semiconductor devices (10, 40, 50, 60, 70) of the first to fifth embodiments described above, the AlGaN layer 20 is used as the electron supply layer. It is not limited as long as AlGaN is the main component. In the nitride-based semiconductor elements (10, 40, 50, 60, 70) of the first to fifth embodiments described above, one nitride-based semiconductor element (10, 40) is formed on the substrate 12. 40, 50, 60, and 70) have been described. However, the present invention is not limited to this, and a plurality of the first embodiment to the first embodiment that are electrically insulated from each other on one substrate 12 are described. An inverter or the like may be configured by arranging the nitride-based semiconductor elements (10, 40, 50, 60, 70) of the fifth embodiment and wiring them to each other.

  In the nitride semiconductor devices (10, 40, 60, 70) of the first embodiment, the second embodiment, the fourth embodiment, and the fifth embodiment described above, AlGaN The case where the Schottky electrode (the first SBD metal electrodes 28 and 62 and the second SBD metal electrodes 29 and 63) formed by Schottky junction with the layer 20 is described has been described. The Schottky electrode is a p-AlGaN electrode or p -It may be replaced with a GaN electrode. When a p-AlGaN electrode or a p-GaN electrode is used, a p-AlGaN electrode or a p-GaN electrode is formed to produce a nitride-based semiconductor device (10, 40, 60, 70). Therefore, the manufacturing method is slightly more complicated than the case where the Schottky electrode is provided, but the leakage current of the first gate electrode 26 and the second gate electrode 27 can be reduced in each stage.

10, 40, 50, 60, 70 Nitride-based semiconductor element 12 Substrate 14 Buffer layer 16 GaN layer 18 2DEG layer 20 AlGaN layer 22 First gate insulating film 23 Second gate insulating film 24 First electrode 25 Second electrode 26 First 1 gate electrode 27 2nd gate electrode 28 1st SBD metal electrode 29 2nd SBD metal electrode 30 1st MOSFET part 31 2nd MOSFET part 32 1st recess part 33 2nd recess part

Claims (7)

A substrate,
A buffer layer formed on the substrate;
An electron transit layer made of a nitride compound formed on the buffer layer;
An electron supply layer formed on the electron transit layer and having a band gap energy different from that of the electron transit layer;
A first electrode and a second electrode formed at opposing positions on the electron supply layer;
A first recess for dividing the electron supply layer formed between the first electrode and the second electrode;
A first gate insulating film formed over the surface of the electron supply layer from the first recess so as to cover the inside of the first recess;
A first gate electrode formed on the first gate insulating film;
The electron supply layer between the first electrode and the second electrode is bonded to the electron supply layer by a rectifying bond, and connected to the first electrode to transport carriers to the first electrode. 1 carrier transport electrode;
A second recess for dividing the electron supply layer formed between the first recess and the second electrode;
A second gate insulating film formed over the surface of the electron supply layer from the second recess so as to cover the inside of the second recess;
A second gate electrode formed on the second gate insulating film;
A nitride-based semiconductor device comprising:   The electrode according to claim 1, further comprising a second carrier transport electrode connected to the electron supply layer by a rectifying junction and connected to the second electrode to transport carriers to the second electrode. Nitride semiconductor devices.   The nitride-based semiconductor device according to claim 2, wherein the rectifying junction in the second carrier transport electrode is any one of a heterojunction, a pn junction, and a Schottky junction. A substrate,
A buffer layer formed on the substrate;
An electron transit layer made of a nitride compound formed on the buffer layer;
An electron supply layer formed on the electron transit layer and having a band gap energy different from that of the electron transit layer;
A first electrode and a second electrode formed at opposing positions on the electron supply layer;
A first recess for dividing the electron supply layer formed between the first electrode and the second electrode;
A first gate insulating film formed over the surface of the electron supply layer from the first recess so as to cover the inside of the first recess;
A first gate electrode formed on the first gate insulating film;
The electron supply layer between the first electrode and the second electrode is bonded to the electron supply layer by a rectifying bond, and connected to the first electrode to transport carriers to the first electrode. 1 carrier transport electrode;
A second gate electrode formed between the first recess portion and the second electrode and joined to the electron supply layer by any of a Schottky junction, a heterojunction, and a pn junction;
A nitride-based semiconductor device comprising:   The nitride-based semiconductor according to any one of claims 1 to 4, wherein the rectifying junction in the first carrier transport electrode is any one of a heterojunction, a pn junction, and a Schottky junction. apparatus.   The nitride-based semiconductor device according to any one of claims 1 to 5, wherein the electron transit layer is made of undoped GaN and has a thickness of 2 nm or more and 500 nm or less.   7. The electron supply layer according to claim 1, wherein the electron supply layer is made of AlGaN having a composition ratio of aluminum of 0.01 or more and 0.99 or less, and has a thickness of 1 nm or more and 50 nm or less. The nitride semiconductor device according to claim 1.

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