JPH0582782B2 - - Google Patents
Info
- Publication number
- JPH0582782B2 JPH0582782B2 JP59196172A JP19617284A JPH0582782B2 JP H0582782 B2 JPH0582782 B2 JP H0582782B2 JP 59196172 A JP59196172 A JP 59196172A JP 19617284 A JP19617284 A JP 19617284A JP H0582782 B2 JPH0582782 B2 JP H0582782B2
- Authority
- JP
- Japan
- Prior art keywords
- document
- latch
- value
- image signal
- histogram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Facsimile Image Signal Circuits (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59196172A JPS6173481A (ja) | 1984-09-19 | 1984-09-19 | 画像処理装置 |
US07/700,993 US5086486A (en) | 1984-09-19 | 1991-05-10 | Apparatus for reading a document and processing the image |
US07/786,601 US5228099A (en) | 1984-09-19 | 1991-11-01 | Apparatus for reading a document and processing the image |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59196172A JPS6173481A (ja) | 1984-09-19 | 1984-09-19 | 画像処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6173481A JPS6173481A (ja) | 1986-04-15 |
JPH0582782B2 true JPH0582782B2 (enrdf_load_stackoverflow) | 1993-11-22 |
Family
ID=16353395
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59196172A Granted JPS6173481A (ja) | 1984-09-19 | 1984-09-19 | 画像処理装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6173481A (enrdf_load_stackoverflow) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9466596B2 (en) | 2006-12-28 | 2016-10-11 | Marvell World Trade Ltd. | Geometry of MOS device with low on-resistance |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5829674B2 (ja) * | 1976-09-01 | 1983-06-24 | 三菱電機株式会社 | 2値化信号制御回路 |
-
1984
- 1984-09-19 JP JP59196172A patent/JPS6173481A/ja active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9466596B2 (en) | 2006-12-28 | 2016-10-11 | Marvell World Trade Ltd. | Geometry of MOS device with low on-resistance |
Also Published As
Publication number | Publication date |
---|---|
JPS6173481A (ja) | 1986-04-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EXPY | Cancellation because of completion of term |