JPH0582697A - Lead frame of semiconductor device - Google Patents

Abstract

PURPOSE:To provide a lead frame of semiconductor device Wherein if a noise elimination chip element is mounted, this chip element is protected from separation due to expansion resulting from heating. CONSTITUTION:A first inner lead 14 having the sides 141, 142 which are provided in parallel to the sides 121, 122 of the outer lead 12 which are provided at the right angle is coupled to such outer lead 12 including the sides 121, 122 formed at the right angle with a first and a second tie bard 131, 132, and a second inner frame 15 is also coupled with a third die bar 15 protruded at the side 121. This inner frame 16 is provided with a side 161 extended in parallel to the side 122 and a side 162 set in parallel to the side 142 and is coupled by bonding to a chip capacitor 17 to couple the sides 141 and 162 with conductive bonding agents 181, 182.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a lead frame of a semiconductor device in which a chip element is incorporated and set.

[0002]

2. Description of the Related Art For example, in a semiconductor device forming an integrated circuit such as a semiconductor circuit having a noise power source or a semiconductor circuit used in an environment where giant noise is applied, a lead frame molded with resin is used. On the other hand, chip elements such as chip capacitors and chip resistors for removing noise components are mounted.

Specifically, a chip capacitor is attached and set to a lead frame to which an integrated circuit element is attached by using a conductive adhesive. The lead frame on which the chip element is attached together with the semiconductor circuit element is molded with resin. Then, the semiconductor integrated circuit device is completed.

FIG. 3 shows a conventional example in which a noise removing chip element for removing noise is mounted on a lead frame. This lead frame includes outer leads 51 and first and second inner leads 52 and 53. ..

Here, the outer lead 51 is provided with two side portions 511 and 512 extending in the directions perpendicular to X and Y so as to form a frame. The side portions 511 and 512 are provided.
First and second tie bars 54 and 55 are provided so as to extend inwardly, and the tie bars 54 and 55 support the first and second inner leads 52 and 53, respectively. I have to. Then, the chip capacitor 56 is attached using an adhesive 57 made of a conductive paste so as to connect the first and second inner leads 52 and 53.

In such a lead frame, the chip capacitor 56 is bonded so as to bond the inner leads 52 and 53 to each other, and then heated to form a molded semiconductor circuit device. Exists. When the lead frame is heated, thermal expansion occurs, and the first and second tie bars 54 and 55 extend in a direction away from the side portions 511 and 512 of the outer lead 51, respectively.

The force of this thermal expansion is due to the tie bars 54 and
Since the first and second inner leads 52 and 53, which are respectively coupled to 55, act as they are, and the first and second inner leads 52 and 53 are coupled by the chip capacitor 56, Forces f in opposite directions act on the inner leads 52 and 53, respectively, as indicated by arrows. That is, due to the heating action, a twisting force and a shearing force act on the chip capacitor 56, and the chip capacitor 56 comes off.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and an inner lead is connected to an outer lead via a tie bar, and the inner lead is connected to a chip resistor, a chip capacitor, or the like. Even when the chip element is bonded and mounted, the chip element is not detached in the subsequent heat treatment process of the lead frame, and the lead frame of the semiconductor device can be configured with high reliability. It is the one we are trying to provide.

[0009]

In the lead frame according to the present invention, the first and second inner leads are joined to the outer leads by the first and second tie bars, respectively. A chip element is adhesively bonded between the inner leads, and the first and second tie bars are provided on a portion of the outer lead that extends in one direction and project in parallel to the extending direction at a right angle. To be formed.

[0010]

In the lead frame of the semiconductor device having the above-described structure, when the chip element is mounted and heated, the parts of the first and second inner leads to which the chip element is bonded are thermally expanded. The forces in the same direction are applied by. Therefore, the twisting force does not act on the connecting portions of the chip element with the first and second inner leads, and naturally, the shearing force also does not act. Therefore, even if the lead frame is heat-treated, the chip element is not detached, and the reliability of this semiconductor device is reliably ensured.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a planar structure of a lead frame 11. The lead frame 11 includes outer leads 12 formed by punching a metal plate.

The outer lead 12 is provided with side portions 121 and 122 which are bent at right angles.
First and second tie bars 131 and 132 are formed so as to project inwardly from and 122, respectively. Further, the first inner lead 14 is arranged on the inner portion of the outer lead 12 formed at a right angle, with a space from the outer lead 12.

The first inner lead 14 has side portions 141 and 142 which are parallel to the side portions 121 and 122 of the outer lead 12, respectively.
142 is the first and second tie bars 131 and 132, respectively.
Combined by

The outer lead 12 is further provided with a third tie bar 15 protruding in parallel with the first tie bar 131.
Then, the second inner lead is attached to the third tie bar 15.
16 is to be connected and held, and this second inner lead
16 is a side portion 161 set in the extending direction of the tie bar 15,
The side portion 161 is bent at a right angle and is constituted by a side portion 162 which is parallel to the side portion 121 of the outer lead 12.

That is, the side portion of the first inner lead 14
141 and the side portion 162 of the second inner lead 16 are set in parallel with each other at a predetermined interval, and the portion of the first inner lead 14 coupled to the first tie bar 131 and the first The chip capacitor 17 is heat-cured and bonded between the second inner lead 16 and the intermediate portion of the side portion 162 by adhesives 181 and 182 made of a conductive paste.

In this figure, the side portion of the outer lead 12
When the rectangular coordinates in which the extending direction of 121 (vertical direction in the figure) is the Y direction and the direction perpendicular to the Y direction is the X direction are set, when the lead frame 11 is heated, the outer lead 12 and the first and second lead frames 11 and 12 are set. The inner leads 14 and 16 thermally expand corresponding to the X axis and the Y axis.

First, at the connecting portion of the second inner lead 16 with the chip capacitor 17, the force f _y22 is generated by thermal expansion because it is not constrained in the (Y-) direction. Since the side portion 162 is set to extend in the (Y +) direction, f _y21 is generated by thermal expansion, and a large expansion amount of f _y22 is canceled. Further, the inner lead 16 is not constrained in the (X +) direction, and a force f _x2 is generated by heating.

In this way, especially in the portion of the second inner lead 16 to which the chip capacitor 17 is coupled, f _{xy2 is} obtained by the combined vector of f _x2 and (fy22 −fy21).
Thermal expansion will occur in the direction of.

On the other hand, in the first inner lead 14, the side portion 141 is formed so as to extend in the (Y-) direction so that the second inner lead 16 has the same thermal expansion direction. .. In order to restrict the expansion of the side portion 141, the first and second tie bars 131 and 132 cause the first inner lead 14 to move to the outer lead 12.
To be combined with.

That is, the portion of the first inner lead 14 to which the chip element 17 is joined is indicated by f _x1 (X
The expansion in the − direction and the expansion in the opposite (X +) direction are restricted by the first tie bar 131. Therefore, the first inner lead 14 thermally expands in the direction of f _{xy1 due to} the _combination of f _x1 and f _y1 .

Therefore, it is possible to make the expansion directions and the expansion amounts of f _xy1 and f _xy2 approximately equal, and the chip capacitor 17 coupling between the first and second inner leads 14 and 16 is formed. The twisting and shearing forces acting on the are effectively relieved. Therefore, the chip capacitor 17 is not removed even during the heat treatment process, and the reliability of this semiconductor device is improved.

FIG. 2 shows another embodiment, in which one side portion of the outer lead 21 extends in a direction perpendicular to the extending direction of the side portion, and the first and second inner leads 22 and 22 are formed. Set to 23. The tie bars 24 and 25 are provided between the base ends of the first and second inner leads 22 and 23 and the outer leads 21, respectively.
Try to combine by.

That is, in this lead frame 11, the first and second inner leads 22 and 23 are set to have the same take-out direction and dimensions, and the inner leads 22 and 23 are parallel to each other. The chip capacitor 17 is adhesively bonded between them by adhesives 181 and 182. Therefore, the expansion direction and the expansion amount of f ₁ and f ₂ generated by heating can be made equal in the adhesive joints of the inner leads 22 and 23 and the chip capacitor 17, respectively.

[0024]

As described above, in the lead frame of the semiconductor device according to the present invention, a chip element such as a chip resistor or a chip capacitor is provided as a countermeasure against a noise power source or a giant noise applied. In the case where the chip element is mounted, it is possible to suppress a twisting force, a shearing force, or the like from being applied to the mounting portion of the chip element due to thermal expansion even if the lead frame is subjected to heat treatment or the like. There is no separation or the like, and the reliability of this semiconductor device is surely improved.

[Brief description of drawings]

FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention.

FIG. 2 is a plan view showing a lead frame according to another embodiment of the present invention.

FIG. 3 is a plan view illustrating a conventional lead frame.

[Explanation of symbols]

11 ... Lead frame, 12, 21 ... Outer leads, 131,
132, 15, 24, 25 ... Tie bar, 14, 22 ... First inner lead, 16, 23 ... Second inner lead, 17 ... Chip capacitor, 181, 182 ... Adhesive.

Front page continuation (72) Inventor Ichiro Izawa, 1-1, Showa-cho, Kariya city, Aichi Prefecture, Nihon Denso Co., Ltd. (72) Inventor, Hatsuko Kato, 1-1, Showa-cho, Kariya city, Aichi prefecture (72) Inventor Katsumi Ishikawa 1-1-1, Showa-cho, Kariya city, Aichi prefecture Nihon Denso Co., Ltd.

Claims (1)

[Claims] 1. A first inner lead joined to an outer lead by a first tie bar, a second inner lead joined to the outer lead by a second tie bar, and the first and second inner leads. A chip element adhesively bonded between the leads, wherein the first and second tie bars are directed to a portion of the outer lead extending in one direction in a direction perpendicular to the extending direction of the outer lead. A lead frame for a semiconductor device, wherein the lead frame is set in a parallel state.